Date: 4 April 2005, Pasadena, CA
ANALOG AND MIXED-SIGNAL IC LAYOUT TOOL INCREASES DESIGN
PRODUCTIVITY WITH FASTER DE-BUGGING AND VERIFICATION
Tanner EDA, the worldwide leader in tools for analog/mixed-signal IC and MEMS
design on the Windows operating system, today announced the release of L-Edit v11.1,
the company’s flagship analog and mixed-signal IC design platform. This newest release
includes node highlighting functionality that allows users to display all the geometry
connected to a node in a circuit layout, regardless of hierarchy. Users can rapidly identify
and debug differences between layout and schematic netlists by using LVS (layout vs.
schematic) which displays discrepancies between the schematic and the extracted
netlist from the layout. Verification productivity has been enhanced proportional to
design size; v11.1 can process larger designs up to 22% faster. A representative circuit
of more than 2.2 million devices now loads in less than 8 minutes, using about 400
megabytes of RAM. Also, v11.1 includes support for large format printers and optional
plot decorations such as custom header, ruler and layer indicators.
Node highlighting in L-Edit v11.1 improves design productivity significantly during
LVS. For example, when the LVS indicates an open circuit between two nodes, the
nodes can be highlighted to determine where they are in close proximity – the most likely
point at which a connection may have been intended. Where accidental short-circuits
occur highlighting the node incrementally helps determine where the crossover to
another node occurs. The tool can also identify the shortest path between two nodes,
help with visual analysis of crosstalk, and carry out certain signal integrity checks.
Although DRC debugging often takes more total time in the design process, LVS
debugging is usually more complicated, with each individual fix taking a correspondingly
longer time. LVS performance is significantly improved, especially in merging series
devices including MOSFETS.
Other new features of L-Edit v11.1 are enhanced DRC that allows the user to
customize the color in which specific violations are displayed, and a number of new UPI
commands have been added.
About Tanner EDA
Tanner EDA is a leading provider of easy-to-use, PC-based electronic design
automation (EDA) software solutions for the design, layout and verification of
analog/mixed-signal integrated circuits, ASICs and MEMS. Its solutions help speed
designs from concept to silicon and are used by thousands of companies to develop
devices cost-effectively in the biomedical, consumer electronics, next-generation
wireless, imaging, power management and RF market segments. Founded in 1988,
Tanner EDA is a division of privately held Tanner Research, Inc. For more information,
go to www.tannereda.com.
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