DESIGN OPTIMIZATION OF ANALOG INTEGRATED CIRCUITS USING SIMULATION
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DESIGN OPTIMIZATION OF ANALOG INTEGRATED CIRCUITS
USING SIMULATION-BASED GENETIC ALGORITHM
M. Taherzadeh-Sani, R. Lotfi, H. Zare-Hoseini and O. Shoaei
IC-Design Lab, ECE Department, University of Tehran, Tehran, Iran
Taherzadeh@ece.ut.ac.ir, WWW: http://eng.ut.ac.ir/ICLab
ABSTRACT generation of parameters population converges to the
global optimized point, with a long-enough search time.
One of the most important facilities required in the
synthesis of an advanced mixed-mode system is the The main advantage of the approach proposed here leading
efficient and if possible automated analog design tool. In to high accuracy of the final results is that it uses the
this paper an accurate method to determine the device simulation results using the advanced models and
sizes in an analog integrated circuit on the basis of genetic therefore acts similar to a designer who uses the HSPICE
algorithm (GA) is presented. In order to evaluate the tool [8] to simulate the circuit. Although the HSPICE has a
fitness of the circuit specifications in any iteration of the built-in optimization algorithm, it is not practical in
GA, HSPICE simulation is used. Examples in both time complicate op-amp sizing. The use of HSPICE tool as the
and frequency domains for an operational fitness evaluator is particularly important in time domain
transconductance amplifier are presented. The simulation specifications because of non-accurate analytical equations
results confirm the efficiency of GA in determining the for time domain behavior.
device sizes in an analog circuit. In this study, by using GA as a search algorithm and the
1. INTRODUCTION HSPICE tool as the fitness evaluator, a two-stage
operational amplifier is optimized as an example.
In a mixed-analog/digital integrated circuit, the analog Optimization characteristics include both frequency- and
circuit might be the most challenging and time-consuming time-domain characteristics.
design bottleneck. This is mainly due to lack of design
automation toolboxes for analog circuits. Therefore, This method is more accurate and general than the
developing reliable automatic tools in analog IC design previous approaches [1-6] particularly in time domain
seems very attractive. optimizations. However, in a few cases it may consume
more time than the others.
There have been several analog tools developed for
specific applications such as operational amplifiers and 2. OPAMP DESIGN
filters [1-6] but most of them suffer from low precision The main and often most power consuming and of course
and rough modeling due to use of simple macro models. challenging-to-design building block in an analog
Additionally, most of them have not emphasized on the integrated circuit is the operational amplifier. It could also
time-domain optimizations of the analog circuits which be time consuming to design.
seems much more sophisticated to be modeled. However
this paper presents a universal method to optimize circuits A two-stage operational amplifier shown in Figure 1 is a
in both time- and frequency-domain. simple design example of such a circuit. It provides high
gain and high output swing and is very suitable for low-
There are two main steps in the design of an analog circuit. voltage applications where few transistors can be stacked
First the topology satisfying the requirements is chosen to provide sufficient gain.
and then the devices using linear first order equations are
appropriately sized. This sizing usually needs several The opamp is optimized in two cases which are described
iterations, tries and errors with computer simulations. This here. In the first example, the gain, unity-gain bandwidth,
time-consuming trial and error is caused by non-linearity, slew-rate, phase margin and power consumption are
approximations used in the hand equations and high-order determined for the algorithm as objective goals and the
effects in advanced MOS transistor models. fitness function is defined. If this function is maximized all
specifications are met.
Soft computing methods can be used to decrease design
duration and therefore time-to-market of integrated In this problem, unknown-parameter vector contains W
circuits. One of those methods, called Genetic Algorithm and L of all MOS transistors, Cc and Rc (Cc and Rc are
(GA) is a global search algorithm, which models the used in compensation network). Of course, some of W’s or
process of the natural evolution in order to optimize the L’s in the two-stage opamp are equal (for example
parameter of a problem [7]. In this algorithm, the W1=W2), some of them can be defined by user (e.g.
L1=Lmin) and W7 is determined by the systematic offset The number of genes in chromosome is equal to the
cancellation relation: number of unknown parameters. Hence, for the
representation of the two-stage opamp, a chromosome
L7 W 6 L3
W 7 = 0.5 × × × ×W 5 with 12 genes was used. Each gene of chromosome has a
L5 W 3 L6 value corresponding to a device size.
Thus the parameter vector is:
VDD
[W1, W3, L3, W5, L5, W6, L6, L7, W8, L8, Cc, Rc]
The GA program determines this vector of the parameters
M8 M5 M7
such that the fitness function is maximized. For this
opamp, VDD=3.3V and CL=1pF are assumed.
In the second case, the settling time of the opamp with the
Inp Inn
configuration shown in Figure 2 is defined and the M1 M2
Out
parameters are determined in order to minimize the Cc Rc
settling time. CL
Ibias
3. GENETIC ALGORITHM AS AN
OPTIMIZATION ALGORITHM M3 M4
M6
The simulation-based algorithms work similar to human
designers (Figure 3). In these methods, the optimization
algorithm produces the population of circuits and passes
them to circuit simulator. The output of circuit simulator is Figure 1. Two-stage opamp (miller OTA)
fed back to optimization algorithm. Then the optimization
algorithm modifies the old circuits with attention to the
outputs of circuit simulator and produces a new population Ф2
of circuits. This flow is repeated to attain desired output
for the circuit simulator. As we discussed before, GA is Ф1
used as the optimization algorithm. Vin
Ф1
The genetic algorithm (GA) utilizes a non-gradient-based -
random search and is used in the optimization of complex Vout
Ф1
systems. This algorithm models the process of biological +
evolution and optimizes the parameters of the problem Ф2
[7].
Vref Ф1
In GA, each unknown parameter is called gene and the
vector of parameters is called chromosome. The purpose Figure 2. The test configuration
of the GA is to determine the elements of the unknown
vector (chromosome) to maximize the defined fitness
function. In each generation, new population of
New
chromosomes is enhanced in fitness function by means of
Feasible
some operators such as cross over and mutation. The Optimization Point
initial population is chosen randomly.
Algorithm
Interpret
The fitness evaluation of the multi-objective function Simulation
(objective function shows the fitness of an object) is the Modify
Results
Device
main challenge of applying GA to this problem. The
Sizes
representation of the size of the opamp devices and the
fitness evaluation is discussed here. Circuit
simulator Evaluate
3.1. Representation
Instead of simple GA that represents each unknown
parameter with bits (a vector of zeros and ones) real GA Figure 3. Simulation based approach
where each gene can choose a real number between two
particular values is used here.
3.2 Fitness evaluation measured by ac analysis in HSPICE. To determine the
swing the effective voltages of the output transistors, and
For fitness evaluation in a multi-objective problem, several for SR, the analytical equation shown below are used.
methods can be used. Here, the fitness function (ff) is
defined as: I tail
SR = k
1 n Cc
ff = ∑ opt ( wi . f i )
n i =1 In an ideal equation k=1, but because of some
considerations k was chosen equal to 0.9.
where
opt(x) =1 − e−x After using the GA program the performance
characteristics that were even better than the desired
fi =(desired value-determined value) for object i objects were obtained. The circuit size vector and the
wi=weight coefficient of object i performance characteristics are shown in Figures 4 and 5.
n= Number of objects Here, an equation-based Genetic Algorithm could also be
used, but it would lead to less optimized results.
This method of aggregation of several objective functions
(fi) produces better results compared to the other methods. 4.2 Case 2
In this method, the fitness function (ff) is always less than In the second case, since there are poorly accurate
1. If an object reaches its desired value, its effect in fitness equations to model the transient behavior, a simulation-
function is reduced and the GA exerts to provide other based algorithm is also used. In this case again satisfying
objects results were achieved in a short optimization time. Such
One important feature of this approach is to be simulation- results would require a long try-and-error operation if no
based rather than equation-based especially in time- intelligent software was used.
domain analyses. Therefore in order to evaluate objects The test configuration (Figure 2) is a multiply-by-two
such as power, gain, UGBW, swing and settling time, ac amplifier with tow non-overlapping phases. It canbe easily
or transient analyses are used. obtained that Vout=2 Vin-Vref. But this value is settled after a
First, the netlist of each parameters vector is created and certain time so called settling time. In this case an opamp
then HSPICE is called. Then, the output file of HSPICE is with the following specifications is needed.
used for object evaluation. 0.25% settling time < 10ns
4. SIMULATION RESULTS And ess (steady state error) <0.02 %.
Now this tool is evaluated with two different examples. In order to evaluate these characteristics, the HSPICE
The miller-compensated two-stage OTA, shown in Figure transient analysis was used. By using GA program, the
1 is optimized for two cases: optimized circuit converges to an output with:
1. power <10 mW 0.25% settling time = 8.2 ns
gain >70 dB ess = 0.02% (Figure 6).
swing >2.4 V
The sizes of Circuit components are shown in Figure 7.
ft >300 MHz
phase margin >55 degrees 5. CONCLUSION
SR (slew rate) >250 V/us. In this paper, the Genetic Algorithm and simulation based
2. 0.25% settling time < 10ns optimization were combined to produce an accurate tool
for analog circuit design. If the circuit configuration is pre-
ess (steady state error) <0.02 %
determined the software can optimize the device sizes in
This opamp is used in the switched-capacitor order to meet a vector of objectives.
configuration shown in Figure 2. As it is obvious, the first
This tool is even more useful when the objects are the
case is almost a frequency-domain optimization problem
time-domain characteristics of analog circuits where the
and the second is in the time domain.
first-order equations are poorly accurate as what utilized in
4.1 Case 1 the previous works. It can be even used in analyzing
several other characteristics, such as noise and distortion
In case 1, excluding the SR and the output swing, all behavior or in dc analyses, and so on.
performance characteristics (objects) can be directly
W1=W2=92.8u L1=L2=0.6u
W1=W2=199u L1=L2=0.6u W3=W4=160.6u L3=L4=2.5u
W3=W4=245u L3=L4=1.3u W5=198.8u L5=3u
W5=309u L5=2u W6=832.2u L6=2u
W6=360u L6=1.4u W7=322u L7=1.5u
W7=432u L7=4.1u W8=259.6u L8=3.4u
W8=310u L8=4.6u
Cc =0.986p Rc=1263
Cc=3.2pf Rc=545
Figure 7. The sizes of Circuit components
Figure 4. The sizes of Circuit components
6. ACKNOWLEDGMENT
This work was supported in part by a grant of Iran
Desired Obtained Unit Telecommunication Research Center.
value value
7. REFERENCES
Power 10 8 mW
[1] W. Nye et al. “DELIGTH.SPICE: An optimization-
Gain 70 72.65 dB
based system for the design of integrated circuits”
Phase margin 55 61 Degrees
IEEE Transactions on Computer-Aided Design, 7:
SR 250 300 V/us
501-518, April 1988.
Swing 2.4 2.46 V
ft 300 263 MHz [2] Ricardo S. Zebulum, Marco A.C. Pacheco e Marley
M.B.R. Vellasco, “Synthesis of CMOS Operational
Figure 5. Comparison Amplifiers Through Genetic Algorithms”, XI Brazilian
Symposium on Integrated Circuit (SBCCI'98), pp. 125-
128, Buzios, Rio de Janeiro, 30 September to 3
October 1998.
[3] W. Kruiskamp and D. Leenaerts, “DARWIN: CMOS
op amp synthesis by means of a genetic algorithm,” in
32nd Annual Design Automation conference, pages
433-438, 1995.
[4] M. G. R. Degrauwe et al., “Towards an analog system
design environment,” in IEEE Journal of Solid-State
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[5] R. Harjani, R. A. Rutenbar, and L. R. Carley,
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in IEEE Transactions on Computer-Aided Design, 8:
1247-1265, December 1989.
[6] Maria del Mar Hershenson, Stephen P. Boyd, Thomas
H. Lee,” GPCAD: A Tool for CMOS Op-Amp
Figure 6. Step response (phase 2 gets on at t=15 ns, Synthesis,” in IEEE Transactions on Computer-Aided
Vref=0.8 V, final value=2.3 V) Design, pp. 296-303, November 1998.
[7] D. E., Goldenberg, “Genetic algorithms in search,
optimization and machine learning,” Addison Wesley,
Reading MA, 1989.
[8] HSPICE Users Manual, Meta Software, May 1996.
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