Flow Analysis for Tight WCET Estimation of Embedded Software by vgw19124

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									Last Modifcation: 07.07.2009



                   Studienarbeit / Bachelor Thesis
 Flow Analysis for Tight WCET Estimation of
            Embedded Software
Background
Hard real-time systems like automotive systems are systems, which operate with
strict timing constraints. If timing requirements cannot be met, this could lead to
disastrous consequences. For designing hard real-time systems realized in
software, bounding the worst-case execution time (WCET) of each task is
essential to verify the satisfaction of timing constraints. Today, static analysis
still dominates the research on WCET. Static analysis does not execute the
programs, but rather estimates the WCET bounds in an analytical way. It yields
safe WCET bounds, if the system is modeled correctly.

Description of The Thesis
Typically, the static WCET analysis of a program consists of three phases: (1)
flow analysis for loop bounding and infeasible path detection, (2) low-level
timing analysis to determine instruction timing, and (3) finally, WCET
calculation to find an upper bound on the execution time. Constraining the
possible control flows in a program is essential for a tight WCET bound. So, this
thesis focuses on the flow analysis. It is aimed to implement an algorithm to
bound loop iterations and exploit infeasible paths in C programs.


Candidate Profile
  Experience in C/C++ programming
  English or German

Contact
Zhonglei Wang
Institute for Integrated Systems, TU München
Theresienstr. 90, Building N1-Room N2116
Phone: 089/289-25294, E-mail: Zhonglei.Wang@tum.de

								
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