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CSCE 212 Computer Architecture

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					         CSCE 211 Digital Design

                    Lecture 4
             Circuits Simplification
            Topics
                       Combinational Circuit Analysis
                       Sums-of-Products Form
                       Products-of-Sums Form
                       Karnaugh Maps
                       Lab 1 Handout (kits not in yet)
            Readings 4.2-4.3

September 2, 2003
Overview
Last Time
         Basic Gates
         Adders: Half-adder, full-adder, ripple-carry adder
         Boolean Algebra: Axioms, Theorems,
On last Time’s Slides(what we didn’t get to)
         Principle of Duality
         N-variable Theorems
New
         Combinational Circuit Analysis
         Algebraic analysis, Truth tables, Logic Diagrams
         Sums-of-Products and Products-of-Sums
         Circuit Simplification: Karnuagh Maps
VHDL – Half-Adder
–2–                                                            CSCE 211H Fall 2003
Principle of Duality
The Dual of an expression is Swapping 0 & 1, and
  swapping AND & OR.
Given say
         X+X' = 1

Taking the dual yields
         X . X' = 0

Principle of Duality : If we completely parenthesize an
   equation that is true and then take the dual of both
   sides then the result is still true.
Why?
         Each axiom (A1-A5) has a dual (A1-A5

–3–                                                 CSCE 211H Fall 2003
Principle of Duality
Given say
         (X+Y).(X'+Z).(Y+Z) = (X+Y).(X'+Z)

Taking the dual yields
         (X.Y)+(X' .Z)+(Y.Z) = (X.Y)+(X'.Z)

Principle of Duality : If we completely parenthesize an
   equation that is true and then take the dual of both
   sides then the result is still true.


Why?
         Each axiom (A1-A5) has a dual (A1-A5



–4–                                                 CSCE 211H Fall 2003
N-variable Theorems
Generalized idempotency
T12    X+X+X…+X=X
T12’   X.X.X….X=X
DeMorgan’s theorems
T13    (X1 . X2 . X3 … . Xn)’ = X1’ + X2’ + X3’ … + Xn’
T13’ (X1 + X2 + X3 … + Xn)’ = X1’ . X2’ . X3’ … . Xn’


Prove using finite induction
Most important: DeMorgan’s theorems

–5–                                                   CSCE 211H Fall 2003
N-variable Dual Theorems
We will use F(X1, X2, … , Xn, +, ., ') to denote a
  completely parenthesized boolean expression
The the dual can be denoted
      FD(X1, X2, … , Xn, +, ., ') = F(X1, X2, … , Xn, ., +, ')
Demorgan’s theorem expressed using the dual operator
      F(X1, X2, … , Xn)' = FD(X1 ', X2 ', … , Xn ')
Shannon provided the expansion theorems
         F(X1, X2, … , Xn ) = X1.F(1, X2, … , Xn ) + X1 '.F(0, X2, … , Xn )
         F(X1, X2, … , Xn ) = [X1+F(0, X2, … , Xn )] . [X1 '+F(1, X2, … , Xn )]




–6–                                                                 CSCE 211H Fall 2003
Combinational Circuit Analysis
A combinational circuit is one whose outputs are a
   function of its inputs and only its inputs.
These circuits can be analyzed using:
1. Truth tables
2. Algebraic equations
3. Logic diagrams – timing considerations; graphical




–7–                                           CSCE 211H Fall 2003
Switching Algebra Terminology
Literal – a variable or the complement of a variable
Product term – a single literal or the AND of several
   literals
Sum term – a single literal or the OR of several literals


Sums-of-products
Product-of-sums
Normal term – a product (sum) term in which no
  variable appears twice
Minterm – a normal product term with n literals
Maxterm – a normal sum term with n literals
–8–                                               CSCE 211H Fall 2003
Boolean Algebra Proofs
Axioms
       Statements (boolean equations) that are assumed to be true that
        form the basis of a mathematical system.
Theorems
       Statements that can be “proved” from the axioms and earlier
        theorems.
Lemmas, Corollaries, Postulates
Proof by truth-table
       For a “possible theorem” with a small number of variables, we can
        exhaustively consider all possible cases.
Algebraic Proofs
       Apply axioms and previously proven theorems to rewrite a
        “possible theorem” until it is reduced to an equation known to be
        true.
Induction
       Basis case: P(1)
–9–    Inductive hypothesis: Assuming P(n) show P(n+1)         CSCE 211H Fall 2003
 Proof by truth-table
 Prove Demorgan’s Law: (X+Y)' = X ' . Y '

         X      Y    (X+Y) (X+Y)'   X'   Y'   X' . Y'
          0     0
          0     1
          1     0
          1     1



 Note the table considers all possible cases and in each
 case the value in the column for (X+Y)' is equal to the
 value in the column for X' . Y'
  So, (X+Y) ' = X' . Y'
– 10 –                                                  CSCE 211H Fall 2003
 Algebraic Simplification
 Simplify F = A.B.C’.D + D.C.A + B.C.D + A’.B’.C.D




– 11 –                                               CSCE 211H Fall 2003
 Proof by Induction
 Thereom 13 (X1 . X2 . X3 … . Xn)’ = X1’ + X2’ + X3’ … + Xn’
 Proof: Basis Step n = 2, (X1 . X2)’ = X1’ + X2’ was
   proven using a truth-table.
 Now suppose as inductive hypothesis that
         (X1 . X2 . X3 … . Xn)’ = X1’ + X2’ + X3’ … + Xn’
 Then consider
              (X1 . X2 . … . Xn . Xn+1)’
            = ((X1 . X2 . X3 … . Xn ) . Xn+1)’ by associativity
            = (X1 . X2 . X3 … . Xn )’ + Xn+1’  by the basis step
            = (X1’ + X2’ + X3’ … + Xn’) + Xn+1’ by the inductive hypothesis



– 12 –                                                           CSCE 211H Fall 2003
 Logic Diagrams (Xilinx)




– 13 –                     CSCE 211H Fall 2003
 Timing Analysis
 We will do some extensive timing analysis in the labs
   but for right now we will assume the delay for and an
   AND-gate and an OR-gate is “d”


 When we fabricate circuits there are a couple special
   circumstances:
 1. Inverters (Not gates) cost nothing
 2. Circuits are usually fabricated from “NANDs”




– 14 –                                          CSCE 211H Fall 2003
 Circuit Simplification
 Why would we want to simplify circuits?
            To minimize time delays
            To minimize costs
            To minimize area




– 15 –                                     CSCE 211H Fall 2003
 Sums-of-Products




 What is the delay of sums-of-products circuit?
– 16 –                                            CSCE 211H Fall 2003
 Products-of-Sums




– 17 –              CSCE 211H Fall 2003
 Circuit Simplification
 Minterms – a product term in which every variable occurs
   once either complemented or uncomplemented

                      X             Y           F      minterm
                      0             0           1        X’ . Y’
                      0             1           0        X’ . Y
                      1             0           1        X . Y’
                      1             1           1        X.Y


 Sum of minterms form:
         F(X,Y) = X’ . Y’ + X . Y’ + X . Y
         F(X,Y) = SUM(0, 2, 3)           (use capital sigma)
– 18 –                                                             CSCE 211H Fall 2003
 Karnaugh Maps
 Tabular technique for simplifying circuits
  two variable maps          three variable map
     X                       XY
                 0   1            00    01   11   10
    Y                    Z
    0        00 10       0        000 010 110 100
    1        01 11       1        001 011 111 101


             X
                             XY
     Y           0   1             00   01   11   10
                         Z
         0       0   2
                             0     0    2     6    4
         1       1   3       1     1    3     7    5

– 19 –                                                 CSCE 211H Fall 2003
 Karnaugh Map Simplification
 F(X,Y,Z) =

                  XY   00   01   11   10
              Z
                  0    1    1    1    1
                  1              1    1    Z

  Sum of minterms form
   F(X,Y,Z)=
  Minimize ? Fewer gates, fewer inputs
  F(X,Y,Z)=
  F(X,Y,Z)=
– 20 –                                         CSCE 211H Fall 2003
 Karnaugh Map Terminology
 F(X,Y,Z) =

                  XY   00   01   11   10
              Z
                  0         1    1
                  1              1    1    Z

  Implicant set - rectangular group of size 2i of adjacent
    containing ones
  Each implicant set of size 2i of corresponds to a
    product term in which i variables are true and the
    rest false
  Implicant Sets:
– 21 –                                            CSCE 211H Fall 2003
 Karnaugh Map Terminology
 F(X,Y,Z) =

                  XY   00   01   11   10
              Z
                  0

                  1                        Z

  Prime implicant – an implicant set that is as large as
     possible
  Implies – We say P implies F if everytime P(X1, X2, … Xn)
    is true then F (X1, X2, … Xn) is true also.
  If P(X1, X2, … Xn) is a prime implicant then P implies F

– 22 –                                            CSCE 211H Fall 2003
 Karnaugh Map Terminology
 F(X,Y,Z) =

                  XY   00   01   11   10
              Z
                  0         1    1    1
                  1              1    1    Z

  Prime implicants –


  If P(X1, X2, … Xn) is a prime implicant then P implies F
     and if we delete any variable from P this does not
     imply F.

– 23 –                                            CSCE 211H Fall 2003
 Karnaugh Map Simplification
 F(X,Y,Z) =

                  XY   00   01   10   11
              Z
                  0

                  1                        Z

  F(X,Y,Z) =




– 24 –                                         CSCE 211H Fall 2003
 Karnaugh Map Simplification
 F(X,Y,Z) =

                  XY   00   01   10   11
              Z
                  0

                  1                        Z

  F(X,Y,Z) =




– 25 –                                         CSCE 211H Fall 2003
 4 Variable Map Simplification
 F(W,X,Y,Z) =
                            X

             WX   00   01       11       10
         YZ
           00 0000 0100 1100 1000

             01 0001 0101 1101 1001
                                              Z
             11 0011 0111 1111       1011
         Y
             10 0010 0110 1110 1010

                                     W




– 26 –                                            CSCE 211H Fall 2003
 4 Variable Map Simplification
 F(W,X,Y,Z) =
                            X

             WX   00   01       11       10
         YZ
           00     0    4        12       8

             01   1    5        13       9
                                              Z
             11   3    7        15       11
         Y
             10   2    6        14       10

                                     W




– 27 –                                            CSCE 211H Fall 2003
 Karnaugh Map Simplification
 F(W,X,Y,Z) =
                            X

             WX   00   01       11       10
         YZ
           00

             01
                                              Z
             11
         Y
             10

                                     W




– 28 –                                            CSCE 211H Fall 2003
 Karnaugh Map Simplification
 F(W,X,Y,Z) =
                            X

             WX   00   01       11       10
         YZ
           00

             01
                                              Z
             11
         Y
             10

                                     W




– 29 –                                            CSCE 211H Fall 2003
 Karnaugh Map Simplification
 F(W,X,Y,Z) =
                            X

             WX   00   01       11       10
         YZ
           00

             01
                                              Z
             11
         Y
             10

                                     W




– 30 –                                            CSCE 211H Fall 2003
 Larger Maps
 Five variable maps - Figure X4.72 page 307




 Six variable maps - Figure X4.74 page 308




 But who cares, use Quine-McKluskey section 4.5

– 31 –                                        CSCE 211H Fall 2003
 Don’t Care Conditions
 F(W,X,Y,Z) =
                            X

             WX   00   01       11       10
         YZ
           00

             01
                                              Z
             11
         Y
             10

                                     W




– 32 –                                            CSCE 211H Fall 2003
 Don’t Care Conditions
 F(W,X,Y,Z) =
                            X

             WX   00   01       11       10
         YZ
           00

             01
                                              Z
             11
         Y
             10

                                     W




– 33 –                                            CSCE 211H Fall 2003
 Don’t Care Conditions
 F(W,X,Y,Z) =
                            X

             WX   00   01       11       10
         YZ
           00

             01
                                              Z
             11
         Y
             10

                                     W




– 34 –                                            CSCE 211H Fall 2003
 Don’t Care Conditions
 F(W,X,Y,Z) =
                            X

             WX   00   01       11       10
         YZ
           00

             01
                                              Z
             11
         Y
             10

                                     W




– 35 –                                            CSCE 211H Fall 2003
 Summary
 Homework
 1. 4.6b
 2. 4.31
 3. 4.39b
 4. 4.40
 5. 4.55
 6. 4.13d
 7. 4.19c,e



– 36 –        CSCE 211H Fall 2003

				
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