sensor based RFID

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					10/20/2008

Introduction

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Electronic Nose Integrated in RFID Tag

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Prepared by : Aliyar Attaran(1031194657)

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Supervisor: Mr. Moderator: Mr.
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Faisal Mohd.Yasin
Introduction 2

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SK wong

Content
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1.Overview of the project and objectives 2.overview of combined circuitry 3.identify all blocks of RFID and Sensor 4.analysis of the design topologies 5.simulation results of the blocks 6.discussion about the topologies

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7.demonstrate the fabricated sensor
8. Conclusion and recommendation 9. References

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Introduction

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Overview of the Project
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Combined circuitry of the RFID and Sensor

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Discuss all topologies of the block diagrams

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Discuss the results of the schematics

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Modify the design specifications

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Introduction

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Project Objectives:
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To study Mentor Graphics tool
To investigate methodology of RFID tag To investigate methodology of Gas sensor To evaluate the results of sensor and blocks of RFID To increase the performance of sensor and RFID tag ( operating frequency)

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Introduction

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Standards
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ISO 10374: Freight Containers ISO 10536: Close Coupling Smart cards ISO 11784/5: Animal ID ISO 14443: Contactless Smartcards ISO 15693: Vicinity Cards ISO 18000: Item ID – 18000-2 (125 kHz), -3 (13.56 MHz), -4 (2.45 GHz), -6 (900 MHz), -7 (active tags, assets locating) EPCglobal (supply chain)
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Design specification
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RFID tag operating at 900 MHz Gas sensor operating from 300 to 500 MHz 3 Bit flash ADC VCOs’ operating at 400MHz, 2.06 GHz, 4 GHz, 7 GHz, 10 GHz

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Design Constraints for UHF Passive Transponder
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Ultra low power (μW range) – Dynamic operating range Regulations: Allocated spectrum, bandwidth, radiated power Transponder complexities Technology – Schottky, DTMOS

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Basic RFID System
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Potential successor to the bar coding technologies: Contactless & rugged. 3 components; an antenna, a reader and a tag. A reader typically contains a radio frequency module (transmitter and receiver), a control unit and an interface to forward the data received to a computer. Backers: DoD, Walmart, Pharmaceutical companies

Source: Weber Marking Systems Inc

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Transponder Building Blocks

Current state: Designed UHF Passive RFID tag, Designed and Fabricated: SAW Gas Sensor
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Principle of Sensor based RFID
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SAW Gas sensors are useful in wide areas and gigantic chemical companies in which the possibility of gas leakage is critical. And its essential to identify the source of the gas leakage for further adjustments. SAW gas sensors are very sensitive to a tiny changes of gas ,detecting 100 ^-12 g/cm^2. A change in mass is registered as a frequency change. So now If we can assign the changes in frequency to a DC discrete value, we can identify what kind of gas and how much of it, is present in the area. By integrating this SAW Gas sensor in our RFID tags, the reader can tell the blur location of the gas leakage that is taking place. Another approach is to integrate RFID tags in GPS navigating system to indentify the location of RFID tag exactly.

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How to identify the Gas?
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The outputs of the SAW sensors will go to 3 bit ADC and 3 bit streamline will determine what portion of ROM in RFID will be send to reader. ROM memory of RFID is assigned to different binary numbers so that for each input gas that sensor detects, it generates a specific bit line and send to the reader. Then it’s known by reading the reader’s receiving signal that what gas has been detected by the sensor.

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Demonstration using only sensor based tag

Sensor based RFID

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Demonstration using GPS embedded tags
To navigate the RFID tag

Sensor based RFID

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Block diagram of RFID tag integrated with Gas sensor

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All Blocks of RFID only

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FSK Modulator

f oat890MHz  1 / 2 LC f1at900MHz  1 / 2 L(C  Cp )
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Clock Regenerator

Vin Vref Vout pulses

: : :

Sinosoidal wave VDD Full GND-VDD Square

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128 bit ROM
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Using 3 bit Column counter (multiplexer) And 4 bit row counter

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a

(a)
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(b)

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a)Simulation result of Column counter b) Row counter c) 128 bit ROM
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Simulation result of 128 bit ROM

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Concept of DTMOS for very low voltage operation

(a) Cross section of an SOI NMOSFET with body and gate tied together. (b) Gate to body connection by using aluminum to short the gate and P+ region.
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Simulation result

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Drain current of an SOI NMOSFET operated as a DTMOS and as a regular
device.

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DTMOS design

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Power-hungry modules such as rectifier must be designed with low power requirement. It is done by varying VBS component in the body effect equation in ON and OFF state.

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DTMOS design
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Advantages: Less Capacitance (~5-40%) Lower power Reduced effective VT, short channel effects, body effect Layout simplicity (no wells, plugs, …) Disadvantages: History-dependent timing Increased device leakage Body effect issues Self heating Decoupling capacitance
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Conclusion
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DTMOS is ideal for very low voltage ( < 0.6 V ) operation Operation: when input=0, the off N-ch MOS has a high Vth as its body is also “0” (low leakage) and the on P-ch MOS has a low Vth as its body is “0” (fast transistor).

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monoflop
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It generates a pulse of predetermined width every time the quiescent circuit is triggered by a pulse of transition event. A trigger event; which is either signal transition or a pulse, can cause the circuit to go temporarily into another quasi-stable state. It returns to its original state after a time period determined by the circuit parameters.

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Discharge Circuitry
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After the last bit of ROM is read, C2 is discharging through a big transistor. this big size MOS will serve as short circuit path to quickly deplete the charge on Cs and hence shut down the transponder operation thoroughly The purpose of C2 is to stabilize logic level from Full Detector, to eliminate unwanted noise from disrupting the discharging phase.

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Rectifying circuit
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Convert the electromagnetic power to DC to supply the chip.

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Implementing Schottky Trade offs, much less Voltage drop but very high leakage current

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Rectifier – Implementation using Schottky Diodes

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U Karthaus, M Fischer; "Fully integrated passive UHF RFID transponder IC with 16.7uW minimum RF input power"; IEEE J. Solid-State Circuits, Vol 38, Issue 10, Oct. 2003; pp: 1602-1608.
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Voltage regulator
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the voltage regulator can tolerate input voltage range from 1.8V to 6V with a deviation of +0.5 . It also works well for load range from 500 Ω to 3000Ω. It’s observed that the sizing of series pass transistor can change the overshot voltage of the regulator. The regulator circuit consumes about 60μA.

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Result table

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This is not the challenge. Challenge is to input mV.
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Simulation result in mV range

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Simulation result in mV range

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Basic VCO
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Benefits:
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Moderate frequency range. Noise rejection and PSRR. Easier to tune frequency.

CK+ CK-

+ - +

+ - +

+ - +

CK+ CK-

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Basic VCO

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Simulation result at 4 GHz

Spectrum result
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Simulation result at 10 GHz

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Replica Maneatis Structure
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Benefits:
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Wider frequency range. Better noise and PSRR. Easier to tune frequency. Linearity

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Differences  A differential amplifier is used to continuously adjust the control voltage and bias at its best level.  Symmetrical load delay cell is used.

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Simulation result

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Slow-fast interpolating VCO

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Benefits:
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Superior frequency range. Better noise and PSRR. Easier to tune frequency

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Slow-fast interpolating VCO

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Simulation result

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comparison
Differential VCO
Noise rejection and PSRR

Maneatis VCO
Better noise rejection and PSRR

Fast-slow interpolating VCO
Best noise rejection and PSRR

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moderate tuning range From 4 Ghz to 600Mhz

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Wide tuning range Linearity From 6.98 GHz to 700MHz

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Superior tuning range From 7.27 GHz to 660MHz

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Comparison Table
[1] [2] [3] [4] [5] [6] [7] [8] [9] This work Supply voltage (V) 0.8 1.5 1.8 1.5 1.8 3 0.8/1.5 1.45 1.2 0.8

frequency
(GHz) Phase noise (dBc/Hz@1M ) Chip area (mm2) Power (mW) type

1.06-1.4

50.8-53

8

5-11.7

1.732.58

54.557.8 N/A

45.9-50.5

74.7-75

58-60.4

>50

-121

-107

N/A

N/A

-112.3

-99

-115

-103

-100

1.65

0.93

N/A

1.95

0.36

0.8

N/A

0.8

0.95

<2

4.92 Frequency synthesizer

87 PLL

55 VCO

86 CDR

90 VCO

650 PLL

57 PLL

88 PLL

80 synthesizer

>80 CDR

Jitter p-p(ps)

4.6

1.4/7

4.7

*References are given at the end of presentation
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ADC structure

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Topology of Flash ADC

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SAW Gas sensor Back ground
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A chemical gas sensor upon exposure to a gaseous chemical compound or mixture of chemical compounds, alters one or more of its physical properties (e.g. mass, electrical conductivity, or capacitance) In a mass-sensitive gas sensor, the sensor’s response is affected by the additional mass of an analyte gas absorbed by the transducer. Hence, the transducer’s signal depends on the concentration of the analyte and its molecular one it. These transducers are normally piezoelectronically excited. And their resonance frequency or wave propagation velocity is a measure of the mass of the transducer, which varies according to the analyte concentration to be determined.

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SAW Gas sensor

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SAW (surface acoustic wave)Gas Sensor structure

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SAW Gas sensor

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FVC(frequency to voltage convertor) schematic

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SAW Gas sensor

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Simulation result

Simulation result of FVC

Simulation result of CLB

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SAW Gas sensor

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Differential Amplifier

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SAW Gas sensor

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Signal Processing Circuitry

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SAW Gas sensor

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Result table

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SAW Gas sensor

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Result table

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SAW Gas sensor

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Sensor before fabrication

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SAW Gas sensor

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Sensor after fabrication

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SAW Gas sensor

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AIC Packaging bonding diagram using TSSOP 8L

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SAW Gas sensor

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AIC Packaging bonding diagram using TSSOP 8L

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SAW Gas sensor

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Conclusion and recommendation
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Implement read/write function for better flexibility: EEPROM (Electrical Erasable Programmable Read Only Memory) Layout can be further optimized to reduce parasitic effect and smaller size. The chip protection circuit such as Electrostatic Discharge Protection can be included to increase the robustness of the transponder.

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References
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[1] Wenting Wang and Howard C. Luong, Senior Member, IEEE [2] Chihun Lee, Lan-Chou Cho, Jia-Hao Wu, and Shen-Iuan Liu [3] Faizal Khalek, Zubaida Yusoff, Mohd-Shahiman Sulaiman, “Low Power Techniques for a Mixed-Signal Circuit”, IEEE International Symposium on Integrated Circuit (ISIC), Sep. 2007, [4] Tun-Shih Chen SoC Technology Center, Industrial Technology Research Institute Bidg. I I, 195 Sec.4, Chung Hsing Rd., Chutung, Hsinchu, Taiwan 31 0, R.O.C. Tel: 886-3-5913276 Fax: 886-3-5820490 email address: tunshihchenggmail.com

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*[6] W.Winkler et al., “A fully integrated BiCMOS PLL for 60 GHz wireless applications,” ISSCC Dig. Tech. Papers, pp. 406–407, Feb. 2005. *[7] C. Cao, Y. Ding, and K. K. O, “A 50-GHz phase-locked loop in 130-nm CMOS,” in Proc. IEEE Custom Integr. Circuits Conf., Sep. 2006, pp.21–24.

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*[8] J. Lee, “A 75-GHz PLL in 90-nm CMOS technology,” ISSCC Dig. Tech. Papers, pp. 432–433, Feb. 2007. *[9] C. Lee and S. I. Liu, “A 58-to-60.4 GHz frequency synthesizer in 90 nm CMOS,” ISSCC Dig. Tech. Papers, pp. 196–197, Feb. 2007. *[10] Faizal Khalek, Zubaida Yusoff, Mohd-Shahiman Sulaiman, “Low Power Techniques for a Mixed-Signal Circuit”, IEEE International Symposium on Integrated Circuit (ISIC), Sep. 2007,

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THE END OF MY PRESENTATION

Thank you very much

Questions and Answers

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Description: sensor based RFID, gas sensor, RFID, VCO, layout