An Adaptive Synchronization Subsystem Based on by ybg79195


									 An Adaptive Synchronization Subsystem Based on TMS320C6000
             DSP for Professional DVB-T Receivers
                             E. Bevilacqua (*), F. Daffara (*), F. Frescura (**)
                   (*) Texas Instruments France - Villeneuve Loubet Cedex - France
      (**) Dipartimento di Ingegneria Elettronica e dell'Informazione - Università di Perugia - Italy


Abstract - In this paper the results of the de-            sis will be focused on the synchronization sub-
sign and the implementation of an adaptive syn-            system. Synchronization in OFDM systems is
chronization     subsystem,     based     on    a          critical to be implemented because of two main
TMS320C6000 DSP, for professional DVB-T                    reasons:
receivers is presented. The proposed implemen-             •= The properties of the OFDM signal adopted
tation is optimized to provide proper operations                in DVB-T standard mask the information
in frequency-selective time variant channels,                   required for the synchronization recovery;
typical of mobile DVB-T applications. The                       hence, they make ineffective the adoption of
adaptive behavior of the synchronizer has been                  standard techniques like the traditional car-
evaluated by means of simulation trials that                    rier recovery loops (PLLs).
demonstrate how the proposed implementation                •= The sensitivity in the OFDM signal with
is robust in any practical mobile condition and it              respect to synchronization errors is particu-
shows a performance slightly worse than the                     larly high. A performance degradation of
ideal case of perfect synchronization.                          several magnitude orders has to be expected
                                                                with respect to a single carrier modulation
1. Introduction
                                                                scheme for the same value of the frequency
Digital Video Broadcasting (DVB) technology is                  offset.
defined by satellite, cable and terrestrial stan-          The following sections are organized as follows:
dards. Besides the digital video transmission,             paragraph 2 presents the global system architec-
audio and other digital data are transmitted in            ture. In paragraph 3 the implemented algorithm
multiplex. The main task for DVB is to transport           will be depicted, focusing on the adaptive tech-
the MPEG-2 [1] audio and video data from the               nique that leads to a quasi-optimum behavior,
service provider to the end user. In terrestrial           also in mobile environment. Paragraph 4 treats
DVB-T the transmission is based on Orthogonal              the implementation aspects, i.e. the techniques
Frequency Division Multiplexing (OFDM) in                  designed to minimize the errors due to the finite
order to equalize distorted multipath signal in            precision of the fixed-point representation and
the frequency domain [2]. While most of chipset            the analysis of the processing complexity. Fi-
solutions for consumer applications are based on           nally, in paragraph 5 will be exposed the nu-
ASIC technology, in this work a software solu-             merical results, achieved by means of simulation
tion based on DSPs will be proposed. This tech-            trials.
nical choice has some significant advantages,
such as performance, flexibility, and feasibility          2. System Architecture
of automatic software upgrades, according to the           The proposed architecture, shown in Fig.1, is
software radio design strategy. When a powerful            mainly DSP based, and uses custom devices
DSP, with a very high processing speed and suf-            (FPGA or ASIC) for standard DVB-T process-
ficient precision, is adopted, these design targets        ing functional blocks. This combination of pro-
are achievable with a software approach. In pre-           grammable processors with custom components
vious papers [3][4], the demodulation and                  is advantageous: the benefits of a software im-
equalization subsystems of the proposed archi-             plementation are maintained, while performance
tecture were described. In this paper the empha-           is not affected.
                                                                                                                  Micro             simulations an ideal behaviour of the frequency-
                                                                                                                                    domain part (after FFT) will be assumed.
    Dual         HPI      INT          HPI      INT           HPI    INT        HPI   INT   HPI      INT
                                                                                                                                    The adopted algorithm is a NDA (Non Data
    A/D      DSP 1
                                   DSP 2
                                                         DSP 3
                                                          GB removal
                                                                           DSP 4
                                                                                            DSP 5
                                                                                            CSI Processing
                                                                                                              FPGA                  Aided) method that exploits correlation proper-
 (12 bit)
  (12 bit)   synchronization
                                                         CPE correction
                                                                                                EMIF                                ties due to intrinsic OFDM redundancy provided
I        Q

                                                                                                                  Serial port INT
                                                                                                                                    by the guard interval. It consists on computing a
 FIFO                                                                                                               ASIC
 (16 bit)
                                                                                                                      Serial port
                                                                                                                                    particular metric function, according to the fol-
  (16 bit)

                 SBS- RAM 1 SBS- RAM 2 SBS- RAM 3
                 SBS- RAM 1 SBS- RAM 2 SBS- RAM 3                                           SBS- RAM 4
                                                                                            SBS- RAM 4              To MPEG2
                                                                                                                                    lowing equation.
                       (32 bit)
                        (32 bit)             (32 bit)
                                              (32 bit)              (32 bit)
                                                                     (32 bit)                     (32 bit)
                                                                                                   (32 bit)
                                                                                                                                                                              ρ m é 2
Fig. 1 - DVB-T synchronization, demodulation, esti-                                                                                 MTOT (m) =                  rk*rk −NU −              ê rk + rk − NU ,
                                                                                                                                                                              2 k =m−L+1 ë
mation and equalization hardware configuration                                                                                                         k =m−L+1
Six main functional blocks, implemented with
DSPs, FPGAs and an ASIC carry out the whole                                                                                         rk is the current sample,
processing. In particular the present design in-                                                                                    rk − N U is the sample at distance NU, NU being the
cludes:                                                                                                                                     useful part of the symbol,
•= Two 12-bit A/D converters for I and Q signal                                                                                          SNR
                                                                                                                                    ρ=          is the correlation coefficient,
   base-band components, with sample rate of                                                                                            SNR + 1
   9.14 Msamples/s.                                                                                                                 L is the variable filter length that will be de-
•= A DSP (herein referred as DSP-1) for OFDM                                                                                           fined later.
   symbol and frequency synchronization.                                                                                            The first term of the function, as it represents the
•= A DSP for OFDM demodulation (DSP-2).                                                                                             correlation between symbol samples, will be
•= A DSP for synchronization (at the receiver                                                                                       referred as correlation metric, whereas the sec-
   startup) and for Common Phase Error correc-                                                                                      ond term, as it represents an energy contribution,
   tion (DSP-3).                                                                                                                    will be referred as energy metric. The sum of
•= A DSP for channel estimation and equaliza-                                                                                       both will be simply named metric function. It's
   tion (DSP-4).                                                                                                                    possible to demonstrate [5] that, in AWGN
•= A DSP for channel state information (CSI)                                                                                        channels, if L is chosen identical to the guard
   processing and QAM demapping (DSP-5).                                                                                            interval length NG, the maximum of the metric
•= FPGAs and an ASIC for bit and symbol dein-                                                                                       function matches the correct timing instant.
   terleavers and channel decoding.                                                                                                 Moreover, at the same time, the amount:
A FIFO RAM is used as interface between the                                                                                                 1       é m *               ù
                                                                                                                                    ε =−
                                                                                                                                    ˆ         phase ê        rk rk − NU
12-bit A/D converters and the synchronization                                                                                              2π       êk =m − L +1
DSP, while four banks of SBSRAM are adopted
                                                                                                                                    gives the correct estimation of the fractional fre-
to provide interface among the other functional
                                                                                                                                    quency offset. This algorithm is optimum, since
blocks. A microcontroller manages the boot
                                                                                                                                    minimizes the error energy.
process and synchronizes, via the interrupt sig-
                                                                                                                                    Fig. 2 explains the main idea of the algorithm.
naling, the DSP operations.
                                                                                                                                    Once detecting the correct amount of fractional
3. The adaptive algorithm                                                                                                           offset ε , orthogonality between carriers can be
The proposed algorithm is implemented in two                                                                                        re-established by multiplying every sample of
steps: first, in order to restore the orthogonality                                                                                 the useful symbol by the following:
between OFDM carriers before FFT, it detects                                                                                                      −j       i
the guard interval amount (symbol timing recov-                                                                                     Γi (ε ) = e
                                                                                                                                        ˆ              NU
                                                                                                                                                               , i = 1K N U .
ery) and, simultaneously, it detects and corrects                                                                                   Despite of the optimum behavior in AWGN
the frequency offset fractional part. Then, in or-                                                                                  channels, this algorithm is not fulfilling in criti-
der to perform the right guard bands removal                                                                                        cal frequency selective multipath channels, be-
and the Common Phase Error correction, it de-                                                                                       cause of the Inter Symbol Interference (ISI) that
tects and corrects the frequency offset integer                                                                                     polarizes the correlation peak. In this case, in
part. In this paper only the time-domain part (be-                                                                                  order to guarantee proper performance also in
fore FFT) will be described and in the following                                                                                    frequency selective, multipath fading channels, a
novel adaptation technique is presented. It is         •= high precision division, required by the fre-
based on a reduction of the length of the metric           quency offset detection module.
filter L of an amount that is derived from the         In order to minimize the computational cost,
value assumed by the metric function at the tim-       Look Up Tables are used to store values of non-
ing instant. In fact, this value is a measure of the   linear functions, while a smart division algo-
ISI introduced by the channel, since the metric        rithm, optimized for the used data format, guar-
function weights the total symbol energy.              antees a high precision with a reduced MIPS
OFDM symbols
                                                                                 rk                 rk −NU

OFDM symbols
shifted by NU
                                                                             Correlation          Energy
                                                                               metric             metric

|Metric function|

Phase of                                                                                                              2
metric                                                            Filter
                                                                   Filter       Max
                                                               length (L)       Max               metric
                                                                length (L)                        metric

 Fig. 2 - Symbol timing            and    fractional
frequency offset recovery                                                               Symbol
                                                                                        Symbol               Fractional
                                                                                         timing                offset

This technique enables to reduce the polarization
caused by the ISI by keeping the correlation                                          Fractional
peak just within the current symbol. In this way                                         offset
is possible to restore the correct symbol timing       Fig. 3 -Algorithm flowchart
by performing a rotation that may be simply ac-
complished by the equalization. In practice, the       In order to find the most efficient implementa-
algorithm estimates the ISI amount by means of         tion of the algorithm, different TMS320C6x
a mobile average of the peak value of the last         DSPs have been considered, depending on the
symbols and increases or decreases the metric          processing and memory requirements. A
filter length of a fixed step, depending on the        TMS320C6201b with external memory or a
previous values. This technique makes possible         more powerful TMS320C6203 may be adopted.
adapting the algorithm for any channel condi-          5. Numerical results
tion, since his convergence speed is at least 10
magnitude orders higher with respect to the            Before simulating the all DVB-T chain to obtain
speed of any variation of the channel.                 BER estimation, the attention has to be focused
                                                       on the behaviour of the symbol timing recovery
4. Implementation aspects                              algorithm, since its performance may represents
As the algorithm has to be implemented on a            a bottleneck for all subsequent modules.
fixed-point platform, an analysis of the solutions
that minimize the errors due to the finite preci-         Ideal
sion has been carried out. Fig. 3 presents the          algorithm

functional flowchart that resumes the main steps
of the algorithm. Critical tasks are represented
by the computation of:
•= Irrational functions, like the square radix,             Sam                                       Sam
                                                               ples                                      ples
    required by the absolute value module of the                                      SNR (dB)
    correlation metric processing,                     Fig. 4 - Symbol timing error distribution. 2k Mode.
•= Trigonometric functions like sine, cosine
    and arctangent, required by the fractional         Fig. 4 shows how the fixed-point algorithm is
    offset detection and correction modules,           able to reach performance similar to the ideal
                                                       case; this makes possible to obtain good per-
formance also in the frequency offset detection,                            optimum value of the length of the metric filter.
strictly related to the correct symbol timing re-
covery. The behavior of the entire time-domain
                                                                            6. Conclusions
synchronizer is demonstrated in the following                               This paper proposes a novel design and de-
figures. Fig. 5 shows the static performance in                             scribes the implementation of an adaptive syn-
terms of BER with respect to the ideal case and                             chronization      subsystem,        based   on
the standard algorithm and demonstrates how                                 TMS320C6000 DSP, for professional DVB-T
the proposed technique allows obtaining an im-                              receivers. The obtained performance confirms
plementation loss almost negligible.                                        how the proposed synchronization scheme is
                                                                            robust in any practical mobile situation
                                             Ideal synchro
                                             standard alg.
                                             Adaptive alg.                  References
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                                                                                744, ETSI Standard V.1.1.2, August 1997.
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                             SNR (dB)                                           S. Cacopardi, “DSP Based OFDM Demodulator
Fig. 5 -BER results for ideal synchronization, standard                         and Equalizer for Professional DVB-T Receiv-
algorithm and adaptive algorithm. Static case. Channel                          ers”, IEEE Transactions on Broadcasting, Sep-
profile Bad Urban Rayleigh. Modulation 16-QAM                                   tember 1999.
The robustness with respect to the channel varia-                           [4] F. Frescura, S. Cacopardi, R. Perfetti, E. Sereni,
                                                                                “DSP-Based OFDM Demodulator and Equalizer
tion is demonstrated by means of simulations
                                                                                for Professional DVB-T Receivers: Design Is-
trials during channel transitions In Fig. 6 an ex-                              sues and Interfaces Optimization”, DSP World –
ample of the results of this analysis is reported.                              ICSPAT, Orlando – USA, November 1999.
The figure shows the BER performance of the                                 [5] J.J. Van de Beek, M. Sandell, M. Isaksson, P.O.
system during a transition between a Typical                                    Borjesson, “Low-Complex Frame synchroniza-
Urban (TU) Rice channel and a Hilly Terrain                                     tion in OFDM Systems”, Procedures of IEEE
(HT) Rayleigh channel [6]. It is evident that the                               ICUPC 1995, pp. 982-986, November 1995.
system follows almost instantaneously the chan-                             [6] COST 207, 1998 "Digital land mobile radio
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tions. This is due to the tracking capability of the                            September 13, 1988)".




                                                                           urban         transition       hilly

                    y                                           e

Fig. 6 - BER analysis with respect to LOS contribution during channel transitions. Channel profile varying between
Typical Urban Rice and Hilly Terrain Rayleigh. SNR = 20 dB. Doppler spread 51.88 Hz. Modulation 16-QAM

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