Docstoc

ELE 704 Analog CMOS Integrated Circuits Laboratory Two - Single

Document Sample
ELE 704 Analog CMOS Integrated Circuits Laboratory Two - Single Powered By Docstoc
					ELE 704 Analog CMOS Integrated Circuits

Laboratory Two - Single-Stage Amplifiers

             Professor Fei Yuan

              September 2009
1     Pre-Laboratory
Single-stage amplifiers, such as common-source (CS), common-gate (CG),
and common-drain (CD) (source follower), are the basic building blocks of
complex analog systems. In this laboratory, you are required to carry out a
detail analysis of characteristics of common-source, common-gate, common-
drain, and cascode common-source amplifiers.

    1. Complete the schematic of common-source, common-gate, and common-
       drain configurations. The load of the amplifier should be a current
       source implemented using a MOSFET transistor biased in the satura-
       tion. The biasing voltage of the load MOSFET transistor is an ideal
       voltage source.

    2. Choose the size of each transistors properly. To obtain appropriate DC
       biasing conditions, the width of PMOS transistors should be made ap-
       proximately twice that of NMOS transistors. Do not use the minimum
       width (default) as they will make the circuits more sensitive to process
       variation (mismatch effects). Use large width, for example, 10-100µm,
       will also give you a larger gm , subsequently a larger voltage gain.

    3. Show the small-signal equivalent circuit of the three single-stage ampli-
       fiers. The finite resistance of the load transistor should be considered.
       Derive the expressions of the voltage gain Av , input impedance Rin and
       output impedance Rout of the three amplifiers at low frequencies.

    4. Find the frequency of the poles of all amplifiers at the input and output
       terminals with Cgs and Cgd considered. All other parasitic capacitances
       are neglected. Using Miller’s theorem to simplify your analysis.

    5. Tabulate your results for all three configurations.




                                       1
2     Laboratory Work
For each common-source, common-gate, common-drain, and cascode common-
source configuration,

    1. Create the corresponding schematic view and symbol view. Choose
       components from cmosp18 | nfet | spectre, the substrate of the
       NMOS transistors should be connected to the ground. If you are using
       PMOS as the active load, the n-well of the PMOS transistors should
       be connected to VDD .

    2. Create a testfixture.(You may use one text fixture cell for all three
       configurations).

    3. Apply appropriate biasing voltages. Perform DC analysis to find out
       DC operating points of each transistor: VGS , VDS and ID . Record
       the DC operation points. Using pinch-off condition to verify that all
       transistors are biased in the saturation. Calculate the value of the AC
       parameters of gm and Av at low frequencies.

    4. Perform DC analysis by sweeping the amplitude of the input DC source
       and record the output. Plot the output voltage as a function of the
       amplitude of the input DC voltage. This plot will show the dynamic
       range of the amplifiers. Record the maximum input voltage at which a
       clear distortion of the output voltage is observed.

    5. Perform an AC analysis and determine Rin . Note that no load should
       be connected to the output of the amplifier in this case. In a similar
       manner, measure Rout . Note that both Rin and Rout are small-signal
       parameters and their values depend upon the dc biasing conditions.

    6. Perform an AC analysis to find the bandwidth. Open the Analog Artist
       Window. Chose Results | Direct Plot | AC dB20. Then click on
       the output, a -3 dB Plot will appear, use the markers to measure the
       -3 dB frequency. Plot the phase response.

                                      2
    7. Perform transient analysis to find out the average slew rate, i.e. the
       rise time of the amplifiers to a step voltage input.


3     Post-Laboratory Report
The followings must be included in your Post-laboratory Report.

    1. The schematic of amplifiers studied in the Laboratory Work with an
       appropriate border. Your name and student ID must be shown in the
       border area. The dimensions of all transistors and the value of other
       circuit components must be clearly shown in the schematics.

    2. The schematic of the test fixture with an appropriate border.

    3. A table documenting the exact dimension of all transistors used in your
       design.

    4. Tabulate the DC biasing conditions of all transistors.

    5. Simulated frequency response, both magnitude and phase, of the out-
       put voltage. Clearly show the bandwidth of the amplifier and the phase
       at the bandwidth frequency.

    6. Tabulate the results of Av , Rin , Rout and f−3dB at low frequencies for
       three configurations.

    7. Using both the Pre-Laboratory Report and the results from the Lab-
       oratory Work to qualitatively and quantitatively compare the three
       basic configurations in terms of their advantages and disadvantages.
       Comments on your findings.




                                       3

				
DOCUMENT INFO