ELE 704 EE8502 Analog CMOS Integrated Circuits Laboratory 3

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ELE 704  EE8502 Analog CMOS Integrated Circuits Laboratory 3 Powered By Docstoc
					            ELE 704 / EE8502
     Analog CMOS Integrated Circuits

Laboratory 3 - Three-Stage Voltage Amplifier

              Professor Fei Yuan

               September 2009
1     Pre-Laboratory
Voltage amplifiers are essential components of electronic systems. They have
found applications in virtually every electronic systems, such as filters, regu-
lators, function generators, instrumentation amplifiers, analog-to-digital data
converters, signal conditioners, to name a few. The basic configuration of
voltage amplifiers consists of three stages, namely, a differential input stage
that has a large differential input impedance and the ability to suppress
common-mode noise including the noise coupled from the power and sub-
strate rails, an amplification stage that provides voltage gain, and an output
stage that provides sufficient driving ability and a low output impedance. In
addition, voltage amplifiers also need a biasing network to provided needed dc
biasing voltages. Moreover, for differentially configured voltage amplifiers, a
common-mode feedback is also required to stabilize the dc operating points of
the amplifiers. To avoid oscillation and improve the phase margin, feedback
is also widely employed. In this laboratory, you are required to prototype,
design, analyze, and simulate a three-stage differential-input single-ended
output voltage amplifier with a dc biasing network and a common-mode
feedback network. There are many designs available, you are free to choose
any of these available designs.

    1. For the differential input stage, derive the expression of the common-
       mode voltage gain Acm and that of the differential-mode voltage gain
       Ad at low frequencies. Derive the expression of the common-mode
       rejection ratio (CMRR) at low frequencies. Determine the range of the
       common-mode input voltage.

    2. Derive the expression of the differential-mode voltage gain Ad (s) of
       the differential input stage at low frequencies and with Cgd and Cgs
       considered.

    3. Derive the expression of the overall voltage transfer function of the
       three-stage voltage amplifier with only Cgd and Cgs considered.

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    4. Determine the output impedance of the amplifier.


2     Laboratory Work
You need to complete the followings:

    1. Create the schematic view and symbol view of the three-stage volt-
       age amplifier with a dc biasing network and a common-mode voltage
       feedback network.

    2. Create a test fixture for testing the amplifier. A capacitive load of 0.1
       pF should be used in testing.

    3. Perform DC sweeping analysis to find out the dynamic range of the
       voltage amplifier. Plot the output voltage versus the input voltage.

    4. Perform DC analysis to find out the DC operating points of all tran-
       sistors and record them.

    5. Perform AC analysis to find out the frequency response, phase response,
       the differential-mode input impedance, and the output impedance of
       the voltage amplifier. Clearly state the bandwidth and the phase mar-
       gin of the amplifier.

    6. Perform transient analysis to find out the average slew rate, i.e. the
       rise time of the voltage amplifier to a step differential voltage input.

    7. For a given differential input voltage, sweep the amplitude of the common-
       mode input voltage using parametric analysis tools of Cadence, record
       the amplitude of the output voltage of the amplitude. This analysis
       will allow you to determine the common-mode input voltage range, a
       critical design parameter of differential amplifiers.




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3     Post-Laboratory Report
The followings must be included in your Post-Lab Report

    1. The schematic of the three-stage amplifier with an appropriate border.
       Your name and student ID must be shown in the border area.

    2. A table documenting the exact dimension of all transistors used in your
       design.

    3. Simulated frequency response, both magnitude and phase, of the out-
       put voltage. Clearly show the bandwidth and phase margin of the
       amplifier.

    4. Tabulate the DC operating points of all transistors.

    5. The plot of DC sweeping analysis. Clearly state the dynamic range of
       the voltage amplifier.

    6. The plot of the transient analysis. Clearly state the average slew rate.

    7. The table that records the amplitude of the output voltage of the am-
       plifier when sweeping the amplitude of the common-mode input voltage
       using parametric analysis tools of Cadence. Determine the maximum
       common-mode input voltage range.




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