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Microwave Transistor Oscillator

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					Microwave Transistor Oscillator

* One - port Negative - Resistance Oscillators




Z in (V , w)  Rin (V , w)  jX in (V , w)

amplitude and frequency - dependent

and Rin (V , w) < 0

Z L ( w)  RL ( w)  jX L ( w) frequency - dependent

The one - port network is stable if

Re [ Z in (V , w) + Z L (w) ] > 0

The oscillation conditions :

Rin (V , w) + RL (w) =0

X in (V , w) + X L (w) =0

At a specific frequency wO if the negative resistance | Rin (V , w) | > RL (w)

and transient excitation => initiate an oscillation , then X L ( wO ) =

- X in (V , wO )
Oscillation continue => the amplitude of the voltage eventually reach a

steady - state Vo at this voltage Vo , the loop resistance is zero

 Rin (Vo, wo )  RL  0

and X in is amplitude dependent ,  X in (V1 , wO )  X in (VO , wO )

=> This oscillation       wO    may not be stable .

=> a stable oscillation condition

K . Kurokawa , “some basic characteristics of broadband negative

resistance oscillator circuits , “ The Bell System Technical Journal , July

1969 .

Summary :

1. The frequency of oscillation determined by

X L ( wO ) = - X in (V , wO )

Rin (Vo, wo )  RL  0

2. Stable condition

RIN (V , w)       dX L ( w)  X (V , w)       dRL ( w)
                              IN                        0
   V        V VO   dw wwO     V      V VO   dw wwO
Example 5.2.1 :

A negative - resistance device can be modeled by the parallel combination

of a capacitor and a negative conductance , as shown in Fig. 5.2.2a . The

amplitude dependence of the negative conductance , shown in Fig. 5.2.2b is

given by

                     V
G (V )  G M (1        )                                   (5.2.6)
                     VM




                                    (a)                                        (b)

Figure 5.2.2 (a) Negative - resistance device ; (b) amplitude variations of

G(V).

Design a load circuit , Z L , to provide oscillation at wO and calculate the

output power .

Solution : The device impedance is

                                                   G (V )           wC
Z in (V , w)  Rin (V , w)  jX in (V , w)                   j 2                   (5.2.7)
                                               G (V )  w C
                                                 2        2 2
                                                                G (V )  w 2 C 2

a stable oscillation at w  wO occurs when

           G (V )
RL                                                                            (5.2.8)
       G (V )  w 2 C 2
         2
                          w  wO ,V VO
             wC
XL                                                                 (5.2.9)
        G (V )  w 2C 2
          2
                          w  wO ,V VO


        RIN (V , w)       dX L ( w)
and                                  0                             (5.2.10)
           V        V VO   dw wwO

where VO is the oscillation voltage level at the frequency of oscillation

wO .

Substituting (5.2.6 ) into (5.2.7 ) gives for R IN ,

            (1 / G M )(1  V / VM )
RIN                                      (5.2.11)
        (1  V / VM ) 2  w 2 C 2 / G M
                                      2




Differentiating (5.2.11 ) with respect to V gives

RIN  1  2(V /VM )  V 2 /VM  w 2C 2 / GM
                              2              2
                                                    (5.2.12)
 V   GM VM [(1  V /VM ) 2  ( w2C 2 / GM )]2
                                         2




and substituting (5.2.12) into (5.2.10) produces the relation

dX L                    V V 2 w 2C 2
               [ 1  2    2  2 ]    0                (5.2.13)
 dw     w  wO          VM VM  GM V V
                                              O



There is no direct way to solve for R L and X L from (5.2.8) , (5.2.9) and

(5.2.13) .

Therefore , another design consideration such as maximizing the power

delivered to R L must be introduced .

The current in the circuit is given by

I  V ( G(V )  jwC)

and the output power is given by
      1 2     1 2
P      I RL  V RL (G 2 (V )  w 2 C 2 )         (5.2.14)
      2       2
Substituting (5.2.6) and (5.2.8) into (5.2.14) gives

   1 2      G (V ) 2
P  VM (1        ) G (V )                    (5.2.15)
   2        GM

The expression (5.2.15) can be maximized for G as follows :

 P    1 2        G(V )   G 2 (V )
       VM [1  4       3 2 ]0                             (5.2.15)
G(V ) 2          GM       GM

      G (V ) 1
or                     (5.2.16)
      GM      3

Substituting (5.2.16 ) into (5.2.6) gives

V   2
                 (5.2.17)
VM 3

which is the output voltage when maximum output power is delivered to

RL

. If (5.2.17) is evaluated at V  VO and substituted back into (5.2.13) , the

following result is obtained :

dX L           2
              wO C 2 1
             ( 2  )0                       (5.2.18)
 dw    w wO   GM    9

The only unknown in (5.2.18) is X L , so the frequency dependence of

X L can easily be determined around wO are

             GM / 3
RL                                           (5.2.19)
       (G M / 3) 2  wO C 2
                      2


                             wO C
and    X L ( wO )                                (5.2.20)
                      (G M / 3) 2  wO C 2
                                     2




At this point , it is necessary to check if R L satisfies the condition (5.2.2)

when the amplitude level is zero (i.e. the starting oscillation condition ) .
Therefore , using (5.2.11) and (5.2.19) , we have that

RIN (V , wO ) V 0  RL

           wO C   1
when            
           GM      3

If we examine the ratio of R L to RIN (0, wO ) , we obtain

    RL          1  ( wO C / GM ) 2
             3                          (5.2.21)
RIN (0, wO )    1  9( wO C / GM ) 2

If wOC / GM is large , (5.2.21 ) can be approximated by

     RL        1
                          (5.2.22)
R IN (0, wO ) 3


The relation (5.2.22) provides a good design guideline for selecting R L .

That is , let

       1
RL      RIN (0, wO )              (5.2.23)
       3

From (5.2.20) , the frequency of oscillation wO is
                 1
X L ( wO )             (5.2.24)
                wO C

and from (5.2.18)

dX L
dw
                >0      (5.2.25)
       w  wO



Obviously , an inductor ( X L  wL ) satisfies (5.2.24) and (5.2.25) , and wO

is given by

          1
wO 
          LC
Two - Port Negative Resistance Oscillators




input port is oscillating when in L  1

        1   1  S 22 T                       S12 S 21T
L                         ( in  S11                  )
       in S11  DT                          1  S 22 T

            1  S11L
or T 
            S 22  DL

                       S S        S  D
but out  S 22  1  S   1  S 
                    12 21 L  22      L

                       11 L      11 L


 out T  1 the terminating port is also oscillating

Design produce for two - port oscillators

1. Use a potentially unstable transistor at the frequency of oscillation   wO .
2. Design the terminating network to make IN  1 . Series or shunt

feedback can be used to increase IN .

3. Design the load network to resonate Z IN . That is , let

X L ( wO )   X IN ( wO )        (5.3.4)

              RIN (0, wO )
and RL                           (5.3.5)
                   3

Example 5.3.1 :
Design an 8-GHz GaAs FET oscillator using the reverse - channel

configuration shown in Fig. 5.5.4 . The S parameters of the transistor , in

the reverse - channel configuration , at 8 GHz are

S11  0.98163 0

S 21  0.675   161 0

S12  0.39   54 0

S 22  0.465 120 0

Ref1, P . C . Wade , “Novel FET Power Oscillators ,” Electronics Letters ,

Sep 1978

Ref2, P . C . Wade , “Say Hello to Power FET Oscillators ,”Microwaves ,

April 1979

Solution : The transistor is potentially unstable at 8GHz (i.e. K=0.529) and

the stability circle at the gate - to - drain port is shown in Fig. In the

notation of Fig. , the gate - to - drain port is the terminating port .
As shown in Fig. , any T in the shaded region produces IN  1 (i.e. , a

negative resistance at the input port). Selecting T at point A in Fig 5.3.2

(i.e. T = 1  163 ) , the associated impedance is Z T =-j7.5  . This
                   0



reactance can be implemented by an open - circuited 50-  line of length

0.226  . With Z T connected , the input reflection coefficient is found to

be IN  12 .8  16 .6 , and the associated impedance is Z IN  58  j 2.6 .
                       0



The load matching network is designed using Z L  19  j 2.6 at

f O =8GHz   .
As reported in Refs. The oscillator was constructed and oscillated readily at

frequencies between 7.5 and 7.8 GHz , with output power between 680 and

940Mw at VDS  9V . Some tuning was necessary to move the oscillation

frequency to 8GHz .

Example 5.3.2 :

Design a 2.75 GHz oscillator using a BJT in a common - base

configuration . The transistor S parameters at 2.75GHz are

S11  0.9150 0

S 21  1.7  80 0

S12  0.07 120 0

S 22  1.08   56 0

(This example is based on a design from COMPACT reference manual .)

Solution :

The transistor is potentially unstable at 2.75GHz (K=-0.64) . The instability

of the transistor can be increased using external feedback . For the common

- base configuration (and also for the common - gate configuration ) a

common lead inductance from base to ground (as shown in Fig. 5.3.3 ) is

commonly used .

                                  Figure 5.3.3 BJT with external

                                  feedback to increase instability .
Varying L from 0.5nH to 15nH , the resulting S parameters for the network

in Fig. 5.3.3 are

S11  1.72 100 0

S 21  2.08   136 0

S12  0.712 94 0

S 22  1.16   102 0

and K=-0.56

The common lead inductance has been used to raise S11 and S 22 to

large values . Since S11 > S 22 , it appears that the emitter - to -ground

port is the best place for the load network (i.e. the tuning network ) . Of

course , these values are obtained with 50-  terminations , and 50- 

terminations are not necessarily used for the matching networks .

The terminating network can be designed to present an impedance to the

collector having a real part smaller than 50  , and to couple the oscillator

to a 50-  termination . A design for the terminating network is illustrated

                  , IN  2.21119 ( Z IN  24  j 24 .2 ) . From (5.3.4) and
                                  0
in Fig. 5.3.4

(5.3.5) the impedance of the load matching network should be

Z L  8  j 24 .2 .


                                        Figure 5.3.4 Terminating

                                        network design .
Oscillator Configurations

RF:




Figure 5.5.1 Three types of common - base transistor configurations : (a)

Clopitts (b) Hartley ; (c) Clapp.

Microwave frequency : (bipolar oscillator)

                                     L is used to increase   IN   and   out


                                     Figure 5.5.2 Common - base

                                     configuration.

Low -Power circuits , easy to tune

CE : also a popular choice for higher power oscillator
Microwave frequency : (GaAs FET oscillator)




Figure 5.5.3 (a) Common - gate configuration ; (b) common - source

configuration .

CG : for low power oscillator

CS : for higher power oscillator


                                       Figure 5.5.4 Reverse -

                                       channel GaAs FET


reverse - channel devices :

a negative voltage applied to the drain terminal

=> the common lead inductance regenerative

=> S12 increases markedly with frequency

and S11 greater than 1 in a large frequency range
Load tuning element

1. LC

2. RLC

3. YIG resonator




Figure 5.5.5 YIG -tuned oscillator .




Figure 5.5.6 Equivalent network of a YIG sphere in a YIG -tuned oscillator.

4. Varactor




Figure 5.5.7 Varactor - tuned oscillator.
                                  CO
varactor diode model   Cv 
                                   V 1
                              (1  ) 2
                                 

           Rr

V
           Cv     Rs

				
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