A Survey of Software Optimization Techniques for Low-Power Consumption by nhu62148

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									 A Survey of Software Optimization Techniques for Low-Power Consumption
                                                 Oscar Acevedo
                                           Advisor: Dr. Manuel Jimenez

                                 Electrical and Computer Engineering Department
                                   University of Puerto Rico, Mayagüez Campus
                                            Mayagüez, Puerto Rico 00680
                                               oscara@ece.uprm.edu

Abstract                                                    software optimizer and section 5 presents the future
                                                            work on the Power PC 603E microprocessor.
Power consumption in embedded applications can be
reduced either by hardware, software or both. Each
instruction of a given program activates specific           2. Instruction Profiling
parts of the microprocessor. Therefore, the election
of the correct instruction can generate a reduction of      Profiling is the first step to obtain a tool that can
the power consumed by the processor.                        measure the power dissipated by a given program.
This paper presents a survey of software power              The generation of the instruction profile requires the
reduction techniques from several authors and the           use of a system that can measure the power
future work that will be realized for the Power PC          consumption of each instruction of the
603E microprocessor.                                        microprocessor, and capable of determining the
                                                            power cost of special cases that can occur in the
                                                            execution of a program.

1. Introduction                                             Two main methods have been reported to achieve
                                                            these objetives. The first method, proposed by Tiwari
Low power is a key feature for portable electronics         et al., measures the current drawn by the processor
systems. In the last years, the research has been           as it repeatedly executes certain instructions
mainly focused on the hardware component. Now,              [Tiwari94]. It is possible to obtain the information
the software component is receiving more attention          needed to evaluate the power cost of a program for
to obtain the lower power system [Tiwari94]                 that processor.
[Mehta96].
                                                            The sum of the power cost of each executed
The generation of a software optimizer requires the         instruction is enhanced by the power cost of
construction of a profile of power consumption of           additional effects and the power cost of the program
each microprocessor instruction and the adequate            can be estimated [Tiwari95][Russel98].
selection of compiling techniques that can reduce the
energy consumed by a program. Because the                   The current drawn by the processor can be measured
architecture of each microprocessor is different, the       using an oscilloscope with a shunt resistor connected
modeling and instruction profiling are an individual        in series with the supply voltage pin of the
processes. Thus, the results from one processor             microprocessor [Russel98].
might not be applicable to any other. This makes the
election of a microprocessor for targeting low power        Other way is a direct measure with an ammeter. It is
software an important step in this work.                    important that the used ammeter can measure high
                                                            frequency signal in order to obtain a stable measure
This paper presents a survey of techniques reported         of the current drawn by the microprocessor
on this subject. Section 2 presents methods used to         [Tiwari95].
determine the power consumption of the
microprocessor instruction set. Section 3 presents          The hypothesis presented by Tiwari et al. is
compiler techniques, which have been fully applied          empirically validated in [Tiwari94] using two
to reduce the power consumption in a program                commercial microprocessors and making a
execution. Section 4 presents the requirement for the       measurement of the current drawn by them. The
average power is then calculated as P ? Vcc ? I ,         program. Knowledge of the architecture is important
                                                          in this step, because not every technique can be used
where Vcc is the supply voltage and I is the current
                                                          in every processor. Moreover, new techniques can be
drawn by the microprocessor.
                                                          derived from those studied and from the special
                                                          features of the microprocessor under test.
The energy also can be calculated as E = P? N? T,
where N is the number of clock cycles taken by the
                                                          The first technique is based on Instruction
program and T is the clock period.
                                                          Reordering         to       Reduce           Switching
                                                          [Pedram01][Tiwari94]. The energy consumed during
This method is applicable to pipelined processors,
                                                          the execution of an instruction will vary depending
but there are effects whose energy contribution are
                                                          on what the previous instruction was. Thus, an
not accounted in the power calculation. As an
                                                          appropriate reordering of instructions in a program
example, the energy cost of an instruction may be
                                                          can result in a lower energy. The application of this
different from the calculated, depending of the last
                                                          technique in the Intel 486 processor reveals that a
state of the microprocessor. The solution to this
                                                          reduction in switching activity can be achieved by
problem can be achieved by calculating the power
                                                          this technique does not translate into very significant
cost of a pair of instructions, which gives a better
                                                          overall energy reduction. The results showed a
estimate of the power cost of a given program
                                                          variation of only 2% in the energy cost.
[Tiwari95].
                                                          Nevertheless, in certain DSP processor, this
                                                          technique can achieve a reduction in the power
Another effect is the cache miss ratio. It requires
                                                          consumption       between       30%        to      65%
additional execution time or extra cycles that lead to
                                                          [Wiratunga00][Sarta99].
an energy penalty [Tiwari95].
                                                          Another technique using Code Generation through
The second method is based on a simulation of the
                                                          Pattern Matching has been proposed by Tiwari et al.
microprocessor and the effect of the instruction set in
                                                          [Tiwari94]. This technique modifies the cost
the              microprocessor                 model
                                                          function in the compiler (normally the number of
[Mehta97][Mehta96][Dalal01]. Mehta et al. suggest
                                                          execution cycles), to obtain a code generator that
that lower level simulation can provide an estimate
                                                          targets energy reduction. The results show that the
of the current drawn to calculate the power
                                                          resulting code was similar to the code generated
consumption of each instruction.
                                                          when targeting cycles. The reason for this is that the
                                                          energy cost of an instruction pattern is obtained as
Chakrabarti et al. built a model of each basic module
                                                          the average power times the number of clock cycles.
of the microcontroller HC11. The model was done
by hardware description languages [Chakrabarti99].
                                                          A loop unrolling technique was successfully applied
Nevertheless, black box models [Dalal01] or other
                                                          to DSP processors by Vishal et al. [Wen-Tsong01].
kind of model where is possible to make a current or
                                                          In this approach the main sources of power
power measurement can be used.
                                                          consumption were the arithmetic/logic circuits and
                                                          the memory circuits [Wen-Tsong01]. The objective
Once the modules activated by each instruction have
                                                          was to reduce the total number of comparisons in a
been determined, the power consumption can be
                                                          given program. The result reported a low use of the
calculated with the sum all the energy of the active
                                                          ALU (20% performance) with the drawback of
modules in a given instruction [Mehta96].
                                                          increasing code size (>10%) [Wen-Tsong01].
A drawback of this method is that detailed
                                                          A Memory Operand Reduction technique was
information of the CPU must be available to do the
                                                          proposed by Tiwari et al. [Tiwari94]. This approach
simulation. The power estimated by this technique is
                                                          was based on the hypothesis that instructions with
within 1% to 10% of the real value [Chakrabarti99].
                                                          memory operands have very high-energy cost
                                                          compared to instructions with register operands.
                                                          Thus, reduction in the number of memory operands
3. Compilation Techniques
                                                          can lead to large energy savings. The best way to
                                                          achieve power reduction is an efficient register
The next step is the application of some sort of
                                                          management. This entails optimal register allocation
technique to achieve the power reduction of the
of temporaries and global register allocation for the      The application of compilation techniques will be the
most frequently used variables.                            next step. Here again, previously reported
                                                           approaches will be considered, but the specific
Some programs have been used to prove these                technique will depend on the study of the processor
techniques [Tiwari94]. Hand tuning of the code for         architecture and the compiler structures it might
shorter running time leads to a 13.5% reduction in         embed. The result of this step is the software
energy. So far only temporary variables have been          optimizer.
allocated to registers and the appropriate memory
operands are replaced by register operands. Even           6. Conclusion
though redundant instructions are not removed, there
is a 5% reduction in current and a 7% reduction in         The reduction in the power consumption is an
running time. Finally, more variables are allocated to     important issue in modern systems; therefore, any
registers and all redundant instructions are removed.      method that provides a way to reduce this
Compared to the original program it had a 40.6%            consumption must be studied, evaluated and applied
lower energy consumption.                                  to the devices in development. The techniques
                                                           presented in this paper promise an interesting way to
                                                           achieve this issue.
4. Software Optimizer

Once realized the previous steps, it is necessary to       References
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