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					PWM Controlled Inverter
  EE 452 Final Design Project Report




                  BY:
            Grayson Dietrich
            Natalie Husmann
                Kam Ma
                          EE 452 Final Design Project Report
                      Grayson Dietrich, Kam Ma, Natalie Husmann


Executive Summary
An inverter is an electronic circuit that takes in a DC power source and produces an AC
power output. One of the basic designs for an inverter is an H-bridge, controlled by four
switches, with alternating on-states, causing the voltage across the connections of two
pairs to produce an alternating current waveform. In our design, these switches will be
four IRF540 power MOSFETs driven by a pair of FAN73832 gate driver chips.

In this Pulse Width Modulation (PWM) controlled inverter design, we use a sine wave
input into an SG3524 pulse width modulator chip to produce a binary signal with varied
pulse widths proportional to the amplitude of the input sine wave. This is the signal that
is fed to the gates the four power MOSFETs in our H-bridge. The output pulses of the H-
bridge inverter have the same pulse widths as the modulated input signal, but with an
amplitude equal to 2VDD, and with a much increased current. This signal is then sent
through a low-pass filter to remove the high frequency content created by the “carrier” of
the PWM signal, and a clean sinusoid emerges.

A main challenge faced with the construction of an power converter is feedback control.
From the simulations, a K-factor controller can be designed by analyzing the circuit’s
frequency response. Because the inverter itself has a transfer function that equals a
constant, only the transfer function of the low-pass filter needs to be taken into account
when designing the control. Once implemented, it provides stability in our output when
changes in the load or input occur.

All these stages have been simulated in PSpice and been implemented to get the
functionality described in our design. The results show the desired output waveform as
well as the stability of our feedback design.




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                                     EE 452 Final Design Project Report
                                 Grayson Dietrich, Kam Ma, Natalie Husmann

Table of Contents
Executive Summary ............................................................................................................ 2
Table of Contents ................................................................................................................ 3
Introduction ......................................................................................................................... 5
Circuit Design ..................................................................................................................... 6
   Basic Design Concept ..................................................................................................... 6
   Summary of Final Product Specifications, Expected Performance ................................ 6
   Circuit Stages .................................................................................................................. 7
     Pulse Width Modulation ............................................................................................. 7
     Gate Driver ................................................................................................................. 7
     H-Bridge Inverter........................................................................................................ 7
     Low-pass Filter ........................................................................................................... 8
   Circuit Challenges ........................................................................................................... 8
     Feedback Control........................................................................................................ 8
     Total Harmonic Distortion ......................................................................................... 9
Simulation Results and Design Calculations .................................................................... 10
   PWM Stage ................................................................................................................... 10
   H-Bridge Stage.............................................................................................................. 12
   Combined Open Loop System Output .......................................................................... 14
   Low-pass Filter Design ................................................................................................. 16
     Passive Low-pass Filter Choice................................................................................ 16
     Circuit Realization .................................................................................................... 16
   K Factor Controller Design ........................................................................................... 18
     Step 1: Choose Desired Crossover Frequency ......................................................... 18
     Step 2: Determine K Factor Controller Type .......................................................... 19
     Step 3: Determine K Factor Controller Parameters ............................................... 19
     Step 4: Controller Realization .................................................................................. 20
Hardware Implementation ................................................................................................ 23
   Component Selection .................................................................................................... 23
     H-bridge MOSFETs .................................................................................................. 23
     H-bridge Freewheeling Diodes................................................................................. 23
     MOSFET Gate Drivers ............................................................................................. 23
     PWM Generator ........................................................................................................ 25
     Sine Wave Generator Chip ....................................................................................... 25
     Low-pass Filter Components .................................................................................... 25
     Transconductance Amplifier ..................................................................................... 26
     Full-Bridge Rectifier and Peak Detector .................................................................. 27
   Complete Circuit Schematic ......................................................................................... 28
   Circuit Performance ...................................................................................................... 29
     Load and Input Voltage Regulation .......................................................................... 29
     Circuit Efficiency ...................................................................................................... 30
     Closed Loop Load and Input Voltage Step Change Regulation ............................... 31
     Closed Loop THD ..................................................................................................... 32
Cost Analysis .................................................................................................................... 34
Conclusion ........................................................................................................................ 35


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                                     EE 452 Final Design Project Report
                                 Grayson Dietrich, Kam Ma, Natalie Husmann
Appendix ........................................................................................................................... 36
  Section I: Basic H-Bridge Inverter ............................................................................... 36
  Section II: Inverter Performance Calculations .............................................................. 37
    Circuit Efficiency ...................................................................................................... 37
    Output Regulation ..................................................................................................... 37
    Output Waveforms .................................................................................................... 38
  Section III: Itemized Circuit Cost ................................................................................. 42
Works Cited ...................................................................................................................... 44




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                          EE 452 Final Design Project Report
                      Grayson Dietrich, Kam Ma, Natalie Husmann

Introduction
One real world problem that faces all electronic users is the need in some circumstances
to power alternating current devices when only direct current power is available. The
class of devices used to accomplish this are called inverters. In the most basic
implementation, inverters take a direct current input and periodically reverse the polarity
of their output connections to produce a zero DC bias (zero centered) square wave
approximation to a sine wave. The designed quality of the sinusoid output of the inverter
depends largely on the requirements of the load being powered and the necessary
efficiency of the overall application.

The main goal of this design project is to produce a single phase 60Hz inverter with an
output voltage that is stable under varying load conditions with minimal harmonic
content. The kinds of loads that would require this include different types of AC motors
where a constant input rms voltage is required but the current draw varies with respect to
the physical load placed on the rotor. Additionally, any general piece of electronics
designed to plug into a standard 120V wall outlet "expects" to see a constant rms voltage
that will remain stable regardless of current draw, within a reasonable range of power
consumption (i.e., without tripping the circuit breaker). The stabilizing of the output
voltage will be accomplished by a feedback loop that takes a fixed proportion of the
output voltage and compares its peak amplitude to the peak amplitude of a voltage-stable
source of a 60Hz control signal. The result of this comparison will be used to adjust the
duty cycle of the power stage in order to alter the output voltage as necessary to maintain
stability.

For this project, this PWM feedback controlled inverter will be discussed, designed,
simulated, and implemented, resulting in stable output and good performance.




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                              EE 452 Final Design Project Report
                          Grayson Dietrich, Kam Ma, Natalie Husmann


Circuit Design

Basic Design Concept
Due to the necessity of a low harmonic content in the output and the desire for high
efficiency, we will use pulse width modulation to control a full H-bridge inverter in this
design. (See the Appendix Section I for more information on H-bridges.)

A pulse width modulated square wave pulse train is a signal where the width of each
square pulse is proportional to the amplitude of some varying control signal. The peak
amplitude of each pulse is constant and can be thought of as a digital signal composed
only of zeros and ones, or highs and lows. This allows the signal to be efficiently
amplified by switching devices which have the lowest loss while either fully off or fully
on. The frequency of repetition of the pulses is chosen to be high enough that it can be
successfully filtered out of the final signal without attenuating the modulating (60Hz)
signal, but low enough that the switches can be operated without significant switching
losses. An additional consideration is the choice of a switching frequency that is above
the hearing range of any nearby animals of consequence.

The stages of this design will be further discussed in the Circuit Stages Section on page 7.


Summary of Final Product Specifications, Expected Performance
The table below lists the desired specifications for the performance of the final circuit.

Table 1: Specifications
Input Voltage                                     18VDC nominal
Output Voltage                                    17VAC peak to peak nominal
Load Range                                        8W to 43W tested
Output Voltage Variation                          Less than 2.5% of RMS nominal output
Total Harmonic Distortion of Output               5% nominal
Audible Noise                                     None
Temperature                                       55 degrees Celsius or less
Switching Frequency                               50 kHz
Efficiency                                        70% to 85%




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                          EE 452 Final Design Project Report
                      Grayson Dietrich, Kam Ma, Natalie Husmann

Circuit Stages
Pulse Width Modulation
There are two inputs to the PWM stage, which will implement a 2 level PWM scheme.
The first of these is a 50 kHz saw tooth internally generated by a PWM chip. The second
is an ultra clean sine wave control signal produced by a function generator. The
minimum and peak values of the control signal must be bounded by the minimum and
peak values of the saw tooth signal. If the control signal exceeds or drops below the value
of the saw tooth signal at any time, the output of the inverter will no longer produce a
clean sinusoid, and may begin feeding DC to the load. The third input is the feedback
control which is in the form of a small gain varying around a value of 1 applied to the
sine wave control signal. The resulting output is a binary signal where the width of the
on periods is directly proportional to the amplitude of the sine wave control signal.

Gate Driver
The MOSFET gate driver stage is made up of two half-bridge gate driver ICs. The input
signal for one IC is the output signal of the PWM stage, and the input for the other is
inverted but otherwise the same signal. There is also an input for a shut down signal, but
this will not be used in our design.

The output from each gate driver consists of two gate drive signals 180 degrees out of
phase with some minimum dead time in between. One of the drive signals is boosted to a
voltage sufficiently high relative to the source pin of each high side switch in order to
avoid the so-called high side switching problem. Each gate driver drives one H-bridge
inverter gate pair.

H-Bridge Inverter
The H-bridge inverter is made up of two pairs (total of four) of Power MOSFETs. Each
pair of MOSFETs receives an input gate signal from the pair of gate drivers. One
MOSFET receives the signal from the high-side driver output and the other will receive
the signal from the low-side driver output causing one to be on and the other to be off
during one half-cycle. They then change states for the other half of the cycle. The other
pair of MOSFETs will be driven by a gate driver with a 60Hz square wave input. One of
the pair of MOSFETs will be driven by an inverted signal so that only one is on at a time.
(See Figure 1(b) for a diagram of this stage.)

The output signal will be a zero centered 2-level PWM alternating current waveform
across the terminals between the pairs of MOSFETs, resulting from the switching paths
through the terminals caused by the MOSFET pairs turning on and off.

See Section I in the Appendix for more information on H-Bridges.




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                                                 EE 452 Final Design Project Report
                                             Grayson Dietrich, Kam Ma, Natalie Husmann

                                                                                                      Non-inverted HS
                                                                                       Amplified HS
                                                                        Non-inverted
                                                                                       Amplified LS
                                                                                                      Non-inverted LS
           1                Sinusoid   PWM                                    Gate Driver # 1
Sinusoid Reference Signal                                                      FAN73832
                                 PWM
                                SG3524                                                                Inverted HS       Amplified PWM   PWM     Sinusoid           1
                                                                                       Amplified HS                                                         AC Voltage Output
                                               PWM                      Inverted
                                                                                                                                        LC Lowpass Filter
                                                         Inverted PWM
                                                                                       Amplified LS
                                                                                                      Inverted LS
                                                     Hex Inverter             Gate Driver # 2
                                                     HD74LS04                  FAN73832

                                                                                                DC    Input Voltage

                                                                                                18V
                                                                                                                 H Bridge
                                                                                                                4 x IRF540
                                                Figure 1(a): PWM Inverter Block Diagram



         Low-pass Filter
         The H-bridge output signal is sent through a low pass filter that will lessen or eliminate
         high frequency noise and harmonic content while leaving the desired 60Hz sinusoidal
         output largely unaffected.


         Circuit Challenges
         Feedback Control
         It is important to consider what effect a changing load will have on the output of the
         inverter circuit. For a fixed output power, the output voltage will drop for heavy loads
         and rise for light loads until clipping occurs. Depending on the application, any given
         load may be more requiring of a stable voltage or a stable current. An active circuit
         control approach can be optimized for one or the other. In the case of this project, the
         output voltage is to be considered more important than the output current, and therefore
         the control approach will attempt to keep the output voltage constant as the load varies.
         Its current draw is within a range that does not become too large as to overload the DC
         supply or destroy circuit components, nor so small that the output voltage waveform
         begins to clip against the DC supply rails.

         The output voltage is proportional to the control signal voltage, which is a pure sine
         wave. In an open-loop implementation, the magnitude of the control signal is constant. In
         order to have some control over the output voltage, a means for rapidly making small
         adjustments to the magnitude of the control signal must be provided. This is
         accomplished by taking the output of an error amplifier that compares fixed proportions
         of the peak amplitudes of the control signal and the inverter output voltage and
         multiplying it with the control signal as seen in Figure 2. The output of the error amplifier
         is normalized so that when no error in the output voltage is present, there is no change to
         the magnitude of the control signal. Any error, positive or negative, will induce a
         corresponding rise or fall in the output of the error amplifier which will be multiplied
         against the control signal, which will in turn then propagate through the inverter circuit
         and correct the final output voltage accordingly.



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                               EE 452 Final Design Project Report
                           Grayson Dietrich, Kam Ma, Natalie Husmann


      DC Input      Sinusoid Ouput           Sinusoid Reference Signal AC Voltage Output            Sinusoid


                Monolithic                                   PWM Inverter                                Load
            Function Generator
                 XR2206

                                                                                Vout
                                                  Voltage
                                                                            DC Vref                 DC
                                                            Feedback System                         Vref
                          Figure 1(b): Controlled PWM Inverter Block Diagram

The exact gain versus frequency characteristics of the error amplifier is controllable by
connecting an impedance network to its output, due to its being of a transconductance
type. A transconductance amplifier provides an output current proportional to the voltage
difference across its input terminals, and so the output voltage is set by the load being
driven. In the case of this design project, the impedance of the load on the error amplifier
is determined via a K-factor control method. In this approach, bode plots are obtained
that characterize the power stage of the inverter circuit, and from it an appropriate gain
and phase compensation is chosen, the details of which are explained in the K Factor
Controller Design Section starting on page 18.


                                       V-               Kfb        Voltage Peak Amplitude     Sinusoid      1
    1             DC Voltage                                                                               Vout
  Voltage                              V+       Feedback Gain
                                                                              Peak Detector
                   External Transconductor
                          CA3080

                                                       2
                                                     DC Vref
                           Figure 2: Voltage Control Feedback Block Diagram



Total Harmonic Distortion
Another important aspect of inverter design to consider is the Total Harmonic Distortion
(THD) of the final output sinusoid. THD is defined as the percentage of the total signal
that is contained in harmonics of the fundamental frequency. In the case of this project, a
goal of a THD of 5% or less on the output voltage has been set. The simplest solution to
this problem is to low-pass filter the output. This will be done with a 2-sided LC resonant
filter. Additionally, a higher than normal switching frequency of 50 kHz has been chosen
to shift the harmonic content even further away from the cut off frequency of the low
pass filter.




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                                    EE 452 Final Design Project Report
                                Grayson Dietrich, Kam Ma, Natalie Husmann

Simulation Results and Design Calculations

PWM Stage
As explained in the circuit design section, the pulse width modulation stage takes a sine
wave input (Vsin) and a saw tooth input. There are a variety of acceptable waveforms
that could be substituted in place of a saw tooth. Note: The frequency of the saw tooth
waveform in this simulation was reduced from nominal 50 kHz to 600 Hz to better see
the effect of pulse width modulation in Figures 4, 5, 7, and 8.




                                        Figure 3: Pulse Width Modulation Circuit

The pulse width modulation stage generated an internal saw tooth reference signal at 600
Hz going from 0.56V to 4.0V. The stage then compared a 60Hz sine wave which was
centered at 2.28V with 1.4V amplitude. It is important that the minimum and maximum
of the sine wave did not exceed the minimum and maximum of the saw tooth. That
means the saw tooth must completely contain the input sine wave.

         4.0V




         3.0V




         2.0V




         1.0V




           0V
                0s                       4ms              8ms              12ms    16ms
                     V(pwm_saw1.V1:+)    V(pwm_saw1:c)
                                                           Time


     Figure 4: Input Sine Wave and the Internal Saw tooth of Pulse Width Modulation Circuit


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                                     EE 452 Final Design Project Report
                                 Grayson Dietrich, Kam Ma, Natalie Husmann


Figure 5 shows the input and output waveforms over one period of 60 Hz sine wave
(about 16.67ms duration). As you can see, when the sine wave reference voltage exceeds
the saw tooth voltage, the stage outputs a value of 1, and when the reference voltage is
below the saw tooth, it outputs a 0. Due to the varying magnitude of the sine wave, the
widths of the pulses vary as well, resulting in pulse widths that are proportional to the
amplitude of the sine wave. The imperfect square wave of the PWM signal shown in
Figure 5 was due to the relatively low switching frequency (600 Hz). When the switch
frequency was increased to our desired switching frequency, the PWM signal appeared to
be a perfect square wave.

  4.0V




  3.0V




  2.0V




  1.0V




    0V
         0s                        4ms                      8ms      12ms            16ms
              V(pwm_saw1.V1:+)     V(pwm_saw1:c)   V(PWM)
                                                             Time


                       Figure 5: Pulse Width Modulation Input and Output Waveforms




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                                EE 452 Final Design Project Report
                            Grayson Dietrich, Kam Ma, Natalie Husmann

H-Bridge Stage
The PWM output is then sent to the H-bridge inverter circuit seen in Figure 6.




                                        Figure 6: H-Bridge Circuit

The PWM signal is fed to MOSFETs M1 and M4, and the inverted PWM signal which
has a 180° phase shift is fed to MOSFETs M2 and M3. Figure 7 shows the non-inverted
and inverted PWM Input of H-Bridge.

  1.0V




  0.5V




  SEL>>
     0V
              V(PWM)
  1.0V




  0.5V




    0V
         0s                2ms              4ms              6ms            8ms     10ms
              V(E2:1)
                                                    Time
                        Figure 7: Non-inverted and Inverted PWM Input of H-Bridge



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                                   EE 452 Final Design Project Report
                               Grayson Dietrich, Kam Ma, Natalie Husmann
The non-inverted and inverted PWM signals (with 1V amplitude) and the output PWM
signal of the H-Bridge is presented in Figure 8. While the input amplitude is 1 or 0, the
H-bridge output matches two times the magnitude of its supply voltage (2VDD), while
having the same pulse widths as the input. The pulses have magnitude from -18 volts to
+18 volts because it is being produced using a two half bridge rectifiers, while only one
half width rectifier would only produce pulses from 0 to +18 volts.
   20V




   10V




    0V




  -10V




  -20V
         0s                    2ms                  4ms               6ms      8ms    10ms
              V(L1a:1,L2a:1)     V(E2:1)   V(PWM)
                                                               Time
                               Figure 8: H-Bridge Input and Output Waveforms




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                                  EE 452 Final Design Project Report
                              Grayson Dietrich, Kam Ma, Natalie Husmann

Combined Open Loop System Output
The final addition to the simulation is the low-pass filter connected in series with the
load. Figure 9 shows the circuit schematic of the low pass filter (designed in the Low-
pass Filter Design section on page 16).




                                    Figure 9: Low Pass Filter Circuit Schematics

Due to the energy loss, the 18V input PWM signal sent to the low pass filter was dropped
to 14 V. The output waveform is compared to the 60 Hz sine wave reference signal in
Figure 10 which is also the output waveform of the open loop PWM inverter. The
complete schematic with all stages is presented in Figure 10.
         20V




         10V




          0V




        -10V




        -20V
               0s                   4ms              8ms           12ms            16ms   20ms
                    V(Vout,Vbase)    V(pwm_saw1:c)
                                                            Time

                                Figure 10: Open Loop Output Voltage Waveform



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                               EE 452 Final Design Project Report
                           Grayson Dietrich, Kam Ma, Natalie Husmann




                          Figure 11: Complete Open Loop Circuit Schematics

 20

                                                                                    18V




 10                                                                                 10V



                                                                                    4A

  0




-10
      0s                   4ms               8ms              12ms           16ms         20ms
           V(V4:+)   RMS(I(V4))   RMS(V(Vout,Vbase))
                                                       Time
      Figure 12: DC Input Voltage, RMS Input Current, and RMS Output Voltage Waveforms




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                               EE 452 Final Design Project Report
                           Grayson Dietrich, Kam Ma, Natalie Husmann


To calculate the efficiency of the open loop circuit design, the RMS value of the input
current and the output voltage were captured in Figure 12. The efficiency is computed as
follows:

                      (VOUT , RMS ) 2
                                                           10 2
Efficiency   
                                        RLOAD
                                                 100%       2.77  100%  36W  100%  50%
                            Vin  I in                     18V  4 A         72W


Low-pass Filter Design
Passive Low-pass Filter Choice
The output signal of the H-bridge contains two dominant frequencies. One is the carrier
frequency at 50 kHz and the other one is the 60 Hz reference signal. Since we wanted to
filter the high frequency components close to the 50 kHz, we set the -3dB corner
frequency (fcutoff) at 5 kHz.

Circuit Realization
Set f cutoff  5kHz
Load: RL  2.77
            1
C1                       8 F
      2 RL 2  f cutoff
                  2 RL
L1  L2                       64 H
            2  2  f cutoff
C2  C3  10%  2  C 1  1.6 F

As can be seen in Figure 13 on the next page, each of the 62μH inductor was modeled in
PSpice as four 16μH inductor with ESR and ESC for each unit.




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                                           EE 452 Final Design Project Report
                                       Grayson Dietrich, Kam Ma, Natalie Husmann




                                             Figure 13: Low-pass Filter Schematic


                                         Open Loop Crossover Frequency
   40




   20




    0
                                                                                                                              0 dB

  -20




SEL>>
  -40
           DB(V(Vout,Vbase))
  -0d




 -40d




 -80d




-120d




-160d
     0Hz              10KHz    20KHz       30KHz    40KHz   50KHz           60KHz   70KHz   80KHz   90KHz   100KHz   110KHz
                                                                                                                              -155.5°
           VP(Vout)
                                                                Frequency


                               22.75 kHz
                                              Figure 14: Low-pass Filter Bode Plot




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                                     EE 452 Final Design Project Report
                                 Grayson Dietrich, Kam Ma, Natalie Husmann
The bode plot of the low-pass filter shown in Figure 14 on the previous page suggests
that the open loop crossover frequency was 22.75 kHz. Due to the fact that the transfer
function of the H-bridge is a constant, the open loop transfer function can be
characterized by the following transfer function of the low pass filter:

                   2
                  LC              3.077  1010
G PS ( s )               2
                  2s   2  s + 2.461 10 5 s + 3.846  10 9
             s2     
                  C LC


K Factor Controller Design
Step 1: Choose Desired Crossover Frequency
The desired crossover frequency should be lower than the open loop crossover frequency
(22.75 kHz). In order to attenuate signals having frequency higher than 6 kHz the desired
crossover frequency (fcr) was set at this value. To show this, the expanded view of the
bode plot of the filter is shown in Figure 15.

                                                               Desired Crossover Frequency
    24




    23




    22
                                                                                                                 21.92 dB

    21




    20
         DB(V(Vout,Vbase))
 -100d




 -105d




                                                                                                                 -108°
 -110d




 SEL>>
 -115d
    5.5KHz          5.6KHz   5.7KHz   5.8KHz   5.9KHz    6.0KHz     6.1KHz   6.2KHz   6.3KHz   6.4KHz   6.5KHz
         VP(Vout)
                                                        Frequency


                                                        6 kHz
                                       Figure 15: Low-pass Filter Bode Plot




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                                 EE 452 Final Design Project Report
                             Grayson Dietrich, Kam Ma, Natalie Husmann
Step 2: Determine K Factor Controller Type
At the desired crossover frequency of 6 kHz, the phase φ = -108° and |G | = 21.92 dB.
                                                                 PS               PS


Phase Margin  PM  180   PS  72

To obtain a PM of 60°, phase boost above -90° (  BOOST, 90 ) is found to be 78° as follows,

 PS   PS   BOOST, 90  90
  '


PM  180   PS  180   PS   BOOST, 90  90
              '


 BOOST, 90  PM  180   PS  90  60  180  (108)  90  78

Since  BOOST, 90 is less than 90°, a type 2 K factor controller is selected.


Step 3: Determine K Factor Controller Parameters
         BOOST, 90      78
K  tan(                    45)  tan(        45)  9.5144
                  2                        2

      f cr   6kHz
fz                  630.6 Hz
      K 9.5144
 z  2f z  2  630.6 Hz  3.96krad / s
f p  K  f cr  9.5144  6000 Hz  57.1kHz
 p  2f p  2  57.1kHz  358.8krad / s
         1
k FB 
         24
                  1
GPWM                   0.29
              4  0.56

The power stage gain is 21.92 dB, which is
         db       21.92
G  10 20  10     20
                           12.47

                        1                        1
GPS ( s ) fcr                                             6.62
               k FB GPWM Gps ( s ) fcr   1
                                             0.29  21.92
                                         24
                             3.96 103
kc  GPS ( s ) fcr z  6.62               2756.4
                   K           9.5144




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                          EE 452 Final Design Project Report
                      Grayson Dietrich, Kam Ma, Natalie Husmann
Step 4: Controller Realization
     g       0.002  3.96  10 3
C1  m z                           8nF
      k c p 2756.4  358.8  10 3

       gm        0.002
C2        C1          8.01nF  720nF
       kc        2756.4

The measured C2 was 742.8nF

       1                1
R                               339.77
      z C 2 3.96  10  742.8nF
                      3




The transfer function of the Type II K-factor controller can be expressed as,
                 s                    s
             1               1
          kc     z 2756.4       3.96 10 3  249.5 10 s + 988.52 10
                                                          3              6
Gc ( s)            
           s     s       s            s             s 2 + 358.68 10 3 s
             1               1
                p               358.8 10 3

The bode plot of the listed transfer function is shown in Figure 16 on the next page. It
shows the controller has a very high gain at low frequency which would benefit the
steady state regulation of the closed loop system.




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                             EE 452 Final Design Project Report
                         Grayson Dietrich, Kam Ma, Natalie Husmann
                                                 Bode Diagram
                 40

                 30

                 20
Magnitude (dB)




                 10

                  0

                 -10

                 -20

                 -30
                   0




                 -30
Phase (deg)




                 -60




                 -90
                     1    2                  3                     4          5    6
                   10    10                10                     10         10   10
                                                 Frequency (Hz)
                                                            6 kHz

                          Figure 16: Type II K-factor Controller Bode Plot




                                                 21
                              EE 452 Final Design Project Report
                          Grayson Dietrich, Kam Ma, Natalie Husmann
In order to have a stable system, the magnitude of the open loop gain of the closed loop
system must be less than 0 decibels when the phase shift reaches or exceeds 180 º.

                                                          2.14  1010 s + 8.48  1013
Open loop gain  GC ( s)  GPS ( s) 
                                        2.788  10 -6 s 4 + 1.686s 3  2.568  10 5 s 2  3.846  10 9 s

Figure 17 shows the stability of the system.

Phase Margin  PM  180    180  118  62
Gain Margin  GM  16.5dB

                                                    Bode Diagram
                  60

                  40

                  20
Magnitude (dB)




                   0                                                                                             0 dB
                  -20                                                                                           -16.5 dB
                  -40

                  -60

                  -80

                 -100
                  -45


                  -90

                                                                                                                -118°
Phase (deg)




                 -135


                 -180                                                                                           -180°

                 -225


                 -270
                      1     2                  3                     4                   5                  6
                    10    10                 10                     10                 10                  10
                                                   Frequency (Hz)
                                                                    14.5 kHz 46.8 kHz
                                Figure 17: Open Loop Gain Bode Plot




                                                   22
                          EE 452 Final Design Project Report
                      Grayson Dietrich, Kam Ma, Natalie Husmann


Hardware Implementation
Component Selection
H-bridge MOSFETs
The chosen MOSFETs must meet or exceed several critical values. Above all else, they
must be able to handle the desired current and voltage output of the H-bridge inverter. It
is a good idea to choose MOSFETs with values in excess of the expected values to
account for any non-ideal circuit behavior. Each MOSFET must be able to dissipate the
power lost during switching and conduction, and as such must be fitted with a suitably
large heat sink. In order to minimize losses, in general, they must have a low on state
drain to source resistance, a short turn-on time, a gate capacitance low enough that the
chosen driver method can fully charge and discharge it in a tiny fraction of the switching
cycle, and a short turn off time. The IRF540 was chosen due to its rating of 100V drain to
source, 22 amps drain to source, maximum on-state resistance of 0.077 ohms, and a gate
capacitance of 1500pF.

H-bridge Freewheeling Diodes
While the current flowing through an N-type MOSFET is defined as traveling into the
drain and out of the source, it is possible for the MOSFET to conduct in the opposite
direction. This is not desirable, as the voltage drop can be significant and lead to heating
of the device. To counteract this, most power MOSFET packages contain an internal
diode whose anode is connected to the source and whose cathode is connected to the
drain. In the event of a reverse current, this diode turns on and provides a low-loss path
for the current, avoiding dissipating power in the MOSFET’s structure. It is advisable in
high power applications such as H-bridge inverters to include a secondary external diode
in parallel with the one already inside the MOSFET’s case. These diodes are referred to
as being “freewheeling” and a power rectifier with a fast recovery time should be chosen.
When the inverter is used to power reactive loads the necessity of these diodes increases.
MUR420 diodes were chosen for this application as they can withstand 150 amp peak
currents, have a 200V reverse voltage rating, a low 0.71V forward voltage drop, and have
very fast turn on and turn off times (25ns typical for both).

MOSFET Gate Drivers
The H-bridge design in this uses all N-type MOSFETs due to their inherently higher
efficiency when compared to P-type MOSFETs. This introduces a challenge to the gate
driver circuitry generally referred to as the “High side switching problem.” This refers to
the fact that in order to turn the MOSFETs at the top of the H-bridge fully on, the gate
voltage must eventually exceed the drain voltage by a margin of several volts
(VGS(Iout)). While this is less of a problem for inverters running from low voltages, it is
not uncommon for inverters to be switching several hundred volts DC. There are many
approaches to solving this problem, but as there are readily available integrated circuits
that perform the task, they should be used in place of other methods if feasible.
Additionally, it must be assured that a high side MOSFET and the low side MOSFET



                                            23
                                 EE 452 Final Design Project Report
                             Grayson Dietrich, Kam Ma, Natalie Husmann
directly beneath it are never on at the same time. If this condition occurs, Vd will be
shorted to ground through the two devices, causing a massive current spike to be drawn
from the voltage source, increasing the loss in the MOSFETs and possibly damaging
them in the process by exceeding their current ratings. Gate driver circuits can
incorporate “dead time” at the start of every switching cycle where both devices are held
in an off state for some minimal time to guard against shoot through. The chosen gate
driver IC for this project is the FAN73832, which provides both high and low side
switching signals to drive a half H-bridge made of two N-type MOSFETs, and has a
minimum dead time of 400ns. Two such driver ICs are used in conjunction to drive each
half the full H-bridge.

                                            15VDC
                                                                                            Vin




                                                              1 a1                14
                                                                            b1
                                                              2                   13
                                                                a2 HD74LS04 b2
                                                              3      Hex          12
                                                                a3 Inverter b3
                                                              4                   11
                                                                a4          b4
                                                              5                   10
                     30kΩ                                       a1          b1
                                                              6                   9               30kΩ
                                                                a2          b2
                                                              7                   8
                      10µF                                      a3          b3
                                                              0                   0               10µF
                                                                a4          b4




                                                                                                         4
                                                                                                              3
                                                                                                                   2
                                                                                                                         1
                             4
                                  3
                                       2
                                            1




                                                                                                     a4
                                                                                                             a3
                                                                                                                  a2
                                                                                                                        a1
                            a4
                                 a3
                                      a2
                                           a1




                                                                                                         Half-Bridge
                                                                                                         Gate-Drive
                             Half-Bridge




                                                                                                         FAN73832
                             Gate-Drive

                             FAN73832




                                                                                                              IC
                                  IC




                                                   UF4007
                                                                                                                                UF4007
                                                                                                     b4
                                                                                                             b3
                                                                                                                  b2
                                                                                                                        b1
                            b4
                                 b3
                                      b2
                                           b1




                                                                                                         5
                                                                                                              6
                                                                                                                   7
                                                                                                                         8
                             5
                                  6
                                       7
                                            8




                                                                                 17-19VDC
                                                                                                                                  0.1µF
                                            10µF                                                                         10µF
                                                      0.1µF


            UF4007     10Ω                                                                        10Ω
                                       10Ω                                             UF4007
                                                 UF4007                                                                10Ω      UF4007
                                                                MUR420
                                                                                        IRF540
                                                                      MUR420             Power
                                                 IRF540
                                                  Power                                MOSFET
                                                MOSFET


                                                                MUR420

                                                                      MUR420
                                                 IRF540                                 IRF540
                                                  Power                                  Power
                                                MOSFET                                 MOSFET



                                                                     Vout




                                  Figure 18: Gate Driver and H-Bridge Schematic




                                                                      24
                                       EE 452 Final Design Project Report
                                   Grayson Dietrich, Kam Ma, Natalie Husmann
PWM Generator
There are many available choices for the method used to generate the pulse width
modulation signal. For simplicity in this project the SG3524 IC was chosen due to its
good track record as a reliable component, internal saw-tooth waveform generator,
internal high speed comparator, and output signal amplifier that can be used in a
common-collector or common-emitter configuration.

Sine Wave Generator Chip
The production of a 60Hz output waveform with an inverter circuit requires a source of a
60Hz control signal. Also, the feedback loop requires a means of varying the output
voltage with respect to the error between it and the desired output voltage. One means of
doing this is to change the amplitude of the 60Hz control signal, as there is a largely
linear relationship between the two. The XR2206 has an internal sine wave output
oscillator (frequency set with an external capacitor and resistor) whose gain is
controllable via an external voltage. Thus is provides both the initial 60Hz control signal
and allows for output voltage control via the voltage output from the error amplifier.
Additionally, the XR2206 can provide a signal source with extremely low THD,
supposedly as low as 0.5% according to its data sheet.
                    LM317
               Voltage Regulator
               1                   3               15VDC
                   a1 GND b1
                           2                                                                                                           20kΩ
  17-19VDC                              240Ω                                                     5.1kΩ              10µF               POT
                     5kΩ                 1µF
                     POT                                                                                                                            1kΩ
                                                                                                                                           1kΩ

                                                                                                100kΩ     10kΩ      1kΩ                             1kΩ
                                                                                                 POT      POT                              1kΩ

                                                                                                   1 a1                   16     1kΩ                1kΩ
                                                                                                                       b1
                                                                                                   2         XR2206       15
                      1 a1                    16                                                         a2 Monolithic b2
                                      b1
                      2     SG3524            15                                                   3                      14
                        a2 Regulating b2                                                                 a3 Function b3
                      3                       14                                                   4        Generator     13
                        a3Pulse Widthb3                                                                  a4            b4
    10µF                                                                100kΩ            10µF      5                      12            10Ω      10kΩ
                      4    Modulator          13           2kΩ
                        a4            b4                                 POT                             a1            b1                        POT
                      5                       12                                                   6                      11
                        a1            b1                                                                 a2            b2
                      6                       11           2kΩ                                     7                      10                            10kΩ
                                                                        10kΩ                             a3            b3
                        a2            b2
                      7                       10                                                   8                       9       10µF
                        a3            b3                                                                 a4            b4
                                                                            1.5µF
5.91kΩ       0.0022µF 8                       9                                        100kΩ
                        a4            b4                                                                     10µF
                                                                        2.2kΩ          100kΩ
 10kΩ                                                                                   POT
 POT




                                   1                       3
                                         a1   GND b1
                                        LM7805 2
                                                                                                                           Verror
                                                                        5VDC                                              (from inverter
                                        Voltage                  10µF                                                         output)
                                       Regulator



                                                                                Vout

                    Figure 19: Function Generator and Pulse Width Modulator Schematic

Low-pass Filter Components
The output of the H-bridge is full of high frequency components that must be filtered out
before usable 60Hz AC power can be derived. The best way to accomplish this is with
one or more stages of LC low-pass filtering as seen in Figure 20, as this is more efficient
than an RC or RL filter. As the output of the bridge is zero-centered, the filter must be


                                                                           25
                             EE 452 Final Design Project Report
                         Grayson Dietrich, Kam Ma, Natalie Husmann
built in two halves, each filtering out high frequencies and either shunting them to ground
or reflecting them back into the DC supply, whose own filtering methods will hopefully
then shunt the remaining high frequency components to ground or otherwise dissipate
them. The inductors used the in the filter should have high permeability cores to
maximize their value while minimizing the number of turns necessary, thus minimizing
their DC resistance and low-frequency voltage drop. The capacitors used must be able to
withstand voltages greater than the highest expected peak to peak output voltage, must
be non polarized, and should have a low RF dissipation factor dielectric if the power
present in the PWM “carrier” signal is large. Otherwise the RF portion of the signal will
be dissipated as heat in the capacitors, rather than be shunted to ground. 100V polyester
capacitors were chosen for the filter as they generally meet the desired specifications, and
although their RF dissipation factor is higher than would be optimal, equivalent
capacitors of a more suitable dielectric are considerable more expensive.

                                                         15VDC                                   Verror


                                                                                       1                          8
                                                                                            a1              b1
                                                                                       2         CA3080           7        142kΩ
                                           100kΩ                100kΩ                       a2              b2
                                                                                       3     Transconductance     6
                                                                                            a3   Amplifier  b3
                                                                                       4                          5
                                                                                            a4              b4
                                                                                                                                   720nF
                                           1kΩ                  1kΩ                10µF                                  8nF
                                                                                                                 10µF
                                                                                                                                   340Ω

                                                                                                                         1kΩ


                                                                                                                      0.5MΩ
        62.35µH                                                                                                        POT

                                                                                                         1N4148         1N4148
                                                                                                             1µF
                   1µF   0.47µF 0.15µF
 Vin                                   1µF         1µF         4.7µF
                                                                                                1:2
                                                                        LOAD                 Isolated    1N4148       1N4148
                                                                         2.7Ω
                                                                                Vout       Transformer
                                             1µF         1µF
                                                                         50W

                   1µF            0.15µF
        62.35µH          0.47µF



                  Figure 20: Low-pass Filter, Rectifier, and Peak Detector Schematic

Transconductance Amplifier
 The voltage controlling feedback loop requires a means of amplifying the error between
the desired output voltage and the actual output voltage. There are many ways of
accomplishing this, the most common being some form of differential amplifier. In this
design a transconductance type error amplifier was chosen due to its output being defined
as a current, which allows the design to directly control the output voltage amplitude with
an external RC low-pass filter impedance network. In this way the feedback loop can be
stabilized via ignoring the frequency section of the feedback signal that represent portions
of the output signal which, if not attenuated, would result in a positive feedback loop, and
hence instability. In other words, higher frequency components of the output signal
would (if passed through the feedback loop) cause self-oscillation of the circuit and the
operation would become unpredictable. A CA3080 transconductance type operational


                                                                 26
                          EE 452 Final Design Project Report
                      Grayson Dietrich, Kam Ma, Natalie Husmann
amplifier was chosen due to its programmable transconductance value, and long positive
industry track record.

Full-Bridge Rectifier and Peak Detector
The isolation transformer, shown connected across the load in Figure 20, allows the
output signal, which is ideally centered at zero, to be transformed into a floating signal
which can then be referenced to any voltage level desired. The feedback scheme requires
a DC voltage signal that is proportional to the output signal amplitude. This is provided
via a small full-bridge rectifier composed of four signal diodes and a 1µF filter capacitor.
Without the capacitor, the ripple in the DC signal is equal to the peak value of the AC
output signal, and since this DC voltage controls the gain applied to the 60Hz control
signal, any variation causes a very large change in the output voltage. The ripple coming
from the 60Hz must be filtered out. However, too large of a filter capacitor will not allow
the voltage coming from the bridge rectifier to fall or rise fast enough for the feedback
signal to regulate the output voltage effectively. This would be especially true for short
duration changes in the load. A good trade-off point is a capacitor that is just barely large
enough to remove almost all of the ripple from the 60Hz signal. A 1µF capacitor does
just this, and together with the resistance of the voltage divider feeding the feedback
signal to the error amplifier, has an RC time constant of about 1 second. This is a
reasonable settling time for the regulation.




                                             27
                                                        EE 452 Final Design Project Report
                                                    Grayson Dietrich, Kam Ma, Natalie Husmann


Complete Circuit Schematic
                                 LM317
                            Voltage Regulator
     17-19VDC              1                             3                   15VDC
                              a1 GND b1
                                             2                   240Ω                                                                   5.1kΩ                                  20kΩ
                                                                                                                                                            10µF               POT
   12000µF
                                 5kΩ                             1µF
                                 POT                                                                                                                                                               1kΩ
                                                                                                                                                                                       1kΩ

                                                                                                                                       100kΩ         10kΩ 1kΩ                                      1kΩ
                                                                                                                                        POT          POT                               1kΩ

                                                                                                                                            1                        16    1kΩ                     1kΩ
                                                                                                                                                a1            b1
                                                                                                                                            2       XR2206       15
                                  1                                   16                                                                        a2 Monolithic b2
                                        a1            b1
                                  2         SG3524       15                                                                                 3                    14
                                        a2 Regulating b2                                                                                        a3 Function b3
                                  3                      14                                                                                 4      Generator     13
                                        a3Pulse Widthb3                                                                                         a4            b4
     10µF                         4        Modulator     13                 2kΩ                                                 10µF        5                    12              10Ω        10kΩ
                                        a4            b4                                           100kΩ                                        a1            b1                            POT
                                  5                      12                                         POT                                     6                    11
                                        a1            b1                                                                                        a2            b2
                                  6                      11                 2kΩ                                                             7                    10                                10kΩ
                                        a2            b2                                           10kΩ                                         a3            b3
                                  7                      10                                                                                 8                     9               10µF
                                        a3            b3                                                                                        a4            b4
 5.91kΩ                                                                                                  1.5µF            100kΩ
                     0.0022µF 8                           9
                                        a4            b4                                           2.2kΩ                                             10µF
                                                                                                                          100kΩ
  10kΩ                                                                                                                     POT
  POT
                                        1                               3
                                             a1     GND          b1
                                                                                            5VDC
                                         LM7805          2
                                         Voltage                   10µF
                                        Regulator




   30kΩ

                                                             1                   14
                                                                  a1          b1
    10µF                                                     2                   13
                                                                  a2 HD74LS04 b2
            4
                 3
                       2
                              1




                                                                                                         30kΩ
                                                             3         Hex       12
           a4
                a3
                      a2
                            a1




                                                                  a3 Inverter b3                                                                                                             15VDC
                                                             4                   11
                                                                  a4          b4
            Half-Bridge




                                                                                                         10µF
            Gate-Drive

            FAN73832




                                                             5                   10
                                                                                                                 4
                                                                                                                      3
                                                                                                                            2
                                                                                                                                  1




                                                                  a1          b1                                                                        100kΩ                 100kΩ
                 IC




                                                             6                    9
                                                                                                                a4
                                                                                                                     a3
                                                                                                                           a2
                                                                                                                                a1




                                                                  a2          b2
                                                             7                    8
                                      UF4007                      a3          b3
                                                                                                                 Half-Bridge
                                                                                                                 Gate-Drive

                                                                                                                 FAN73832




                                                             0                    0                                                                                  1kΩ                    1kΩ
           b4
                b3
                      b2
                            b1




                                                                  a4          b4
                                                                                                                      IC
            5
                 6
                       7
                              8




                                                                                                                                            UF4007
                                                 0.1µF
                                                                                                                b4
                                                                                                                     b3
                                                                                                                           b2
                                                                                                                                b1




                                 10µF                                                                                                                                                                    142kΩ
                                                                                                                 5
                                                                                                                      6
                                                                                                                            7
                                                                                                                                  8




                                                                                        17-19VDC
  UF4007               56Ω         UF4007                                                                                                    0.1µF
                                                                                                                                     10µF                   1                                8
     56Ω                                                                           IRF540                                                                       a1                     b1
                                                                                    Power                                                                   2         CA3080                 7
                                                                                                                                                                a2              b2
                                                                                  MOSFET                                                                    3    Transconductance            6
                                                   MUR420                                                                                                       a3              b3
                                                                                                                                                                     Amplifier
                                                                                                   56Ω                                                      4                                5
                            IRF540                           MUR420                                                                                             a4              b4                                720nF
                             Power
                                                                                               UF4007                                                 10µF
                           MOSFET                                                                                                                                                                  10µF     8nF
                                                                                                                                                                                                                  340Ω
                                                                                                    56Ω
                                                  MUR420
                                                             MUR420                                UF4007
                                                                                                                                                                                                          1kΩ
                        IRF540                                                     IRF540
                         Power                                                      Power
                       MOSFET                                                     MOSFET                                                                                                             0.5MΩ
                                                                                                                                                                                                      POT


                                                                                                                                                                                        1N4148           1N4148
                                                                  62.35µH
                                                                                                                                                                                                     1µF

                                                                                  1µF     0.47µF   0.15µF                                                                                1N4148      1N4148
                                                                                                             1µF            1µF             4.7µF
                                                                                                                                                       LOAD
                                                                                                                                                        2.7Ω
                                                                                                                     1µF             1µF
                                                                                                                                                        50W
                                                                                  1µF     0.47µF   0.15µF
                                                                                                                                                                     1:2
                                                                                                                                                                  Isolated
                                                                 62.35µH                                                                                        Transformer

                                            Figure 21: Complete Closed Loop PWM Inverter Schematic




                                                                                                           28
                                                 EE 452 Final Design Project Report
                                             Grayson Dietrich, Kam Ma, Natalie Husmann


Circuit Performance
Note: Complete voltage, efficiency, and THD calculations and waveforms can be found
in Section II of the Appendix.

Load and Input Voltage Regulation
The purpose of a feedback system is to keep the output voltage and power constant with
changes to the load or input voltage. As seen in Figure 22, with different loads the closed
loop output remains consistently around 6Vrms, while the open loop output drops from
8.5 to about 6.5Vrms as the load is increased.


                                                            Open Loop    Closed Loop

                                         9
                RMS Output Voltage (V)




                                         8



                                         7



                                         6



                                         5
                                          0.00      2.00        4.00      6.00         8.00

                                                           Load Current (A)
                                          Figure 22: Open and Closed Loop Load Regulation Plot

The same regulation is shown in Figure 23 on the next page, when changes to the input
voltage are made.




                                                                    29
                                                         EE 452 Final Design Project Report
                                                     Grayson Dietrich, Kam Ma, Natalie Husmann

                                                                        Open Loop    Closed Loop

                                                9




                       RMS Output Voltage (V)
                                                8


                                                7


                                                6


                                                5


                                                4
                                                 16.5                  17.5           18.5               19.5

                                                                       Input Voltage (V)
                                  Figure 23: Open and Closed Loop Input Voltage Regulation Plot


Circuit Efficiency
A second reason for feedback control it to make sure output efficiency does not fluctuate.
In Figure 24, the output efficiency stays within the range of 70% to 85%, and seems to
begin to increase and the load is steadily increased. When comparing this performance to
the open loop efficiency, we can see that the control does keep the output efficiency at a
more constant value then it would be for an open loop circuit.


                                                                         Open Loop    Closed Loop

                                          100


                                                90
             Efficiency (%)




                                                80


                                                70


                                                60


                                                50
                                                     0             2           4           6         8

                                                                        Load Current (A)
                                                         Figure 24: Open and Closed Loop Efficiency Plot


                                                                                30
                          EE 452 Final Design Project Report
                      Grayson Dietrich, Kam Ma, Natalie Husmann
Closed Loop Load and Input Voltage Step Change Regulation
When testing the performance of the circuit, load and input step changes to the inverter
must also be considered. While a circuit with no control would step up or down with a
change in the load, Figure 25 shows this feedback circuit compensates. The oscillation
indicates the feedback working and correcting for the disturbance, and the waveform
quickly returns to its original peak-to-peak value after this step change occurs.




        Figure 25: Load Step Change (Maximum to Medium) Output Waveform Transient

While the switching transient is not a prominent in Figure 26 when an input voltage step
change is made, the oscillations are still present, and again the output voltage waveform
returns to its previous state after only a moment of oscillation.




          Figure 26: Input Voltage Step Change (17.5-19V) Output Waveform Transient




                                             31
                         EE 452 Final Design Project Report
                     Grayson Dietrich, Kam Ma, Natalie Husmann
Closed Loop THD
Note: Complete THD and harmonic data is in Section II of the Appendix.
Note: Under normal operating conditions, the output waveform is ideally centered at zero,
therefore the math function is used to measure the output amplitude as the difference
between each of the output terminals. The math function is also used to take the FFT of
any waveforms, and so cannot simultaneously be used to both measure the output and
take its FFT. As a solution the output was sent through a 3:1 ratio high quality audio
transformer to both preserve its distortions and be capable of being measured with a
single oscilloscope channel.




                                  Figure 27: Output FFT

To calculate the THD, the gains of the harmonics of our output are measured. This is
done using Figure 27, and the values taken are listed in Table 2 on the next page.




                      Figure 28: Waveform for Calculating Output THD

To calculate the Voltage of each harmonic, the output rms voltage is needed and this is
found from Figure 28.


                                           32
                             EE 452 Final Design Project Report
                         Grayson Dietrich, Kam Ma, Natalie Husmann

Table 2: Output Harmonic Gain Values
Harmonic        Frequency (Hz) dB Value                        Gain        Voltage (Vo,rms)
1               60              5.4103                         1.864297    0.991647
2               120             -24.5897                       0.058954    0.031359
3               180             -28.5897                       0.037198    0.019786
4               240             -28.5897                       0.037198    0.019786
5               300             -36.1897                       0.015507    0.008248
6               360             -40.5897                       0.009344    0.00497

Using the equation:
         Vo,rm s, 2  Vo,rm s,3  Vo,rm s, 4  Vo,rm s,5  Vo,rm s,6
                 2            2           2            2               2

THD                                                 100%
                          Vo,rm s,1
The output THD was found to be 4.38%, barely below our desired THD specification.




                                                     33
                           EE 452 Final Design Project Report
                       Grayson Dietrich, Kam Ma, Natalie Husmann


Cost Analysis
When considering cost, not only does the monetary value matter but we must also
consider circuit size and its capability of being integrated into other systems. Both will
be discussed in this section.

The monetary cost of our circuit (excluding shipping, and backup component costs) add
up to just over $130 (See Table 5 in Section III of the Appendix for an itemized cost
table). The cost of our circuit is 2 to 4 times greater than that of the average car inverter,
which can be purchased for $30 to $60. This would be an unacceptable cost if we were
to manufacture these inverters for sale. A better comparison would be with an induction
heater inverter, because this is what our inverter would more likely be used for due to its
high power. These can be found for around $200, putting our circuit a more acceptable
cost range.

The trade off we have made to build a cheaper circuit is that we are using older and
bigger parts to construct the inverter. While professional circuits would use the latest,
smallest, and most efficient surface mount components, which would increase efficiency
and reduce circuit size, we have to make do with what is available to us. This includes
bulky components like breadboards and our high current inductors which increase the
size of our circuit, and obsolete components like our power MOSFETs which are over ten
years old.




                                              34
                          EE 452 Final Design Project Report
                      Grayson Dietrich, Kam Ma, Natalie Husmann


Conclusion
In this report, a PWM feedback controlled circuit was designed and built with the goal of
meeting the specifications in Table 1, maintaining minimal expenses, and successfully
controlling the output with feedback of some kind. When this circuit’s performance was
measured, the circuit was found to meet all specifications.

Our PWM feedback controlled inverter provided a sinusoidal output waveform with a
peak-to-peak voltage of about 17.5V for varying loads (only slightly less than our target
value) with an input of 18VDC nominal, and an average efficiency of about 80%. When
the feedback control was implemented, regulation of the output waveform and efficiency
was clearly seen, through use of varying loads and input voltages. The quality of this
output could be quantitatively analyzed by calculation the THD, which was found to be
below the specified value.

Our circuit met standard inverter costs, though old, obsolete, and oversized components
were used and could be replace with more efficient and less bulky components to make a
(physically) better inverter.

As a whole, this inverter the design specifications.




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                           EE 452 Final Design Project Report
                       Grayson Dietrich, Kam Ma, Natalie Husmann

Appendix

Section I: Basic H-Bridge Inverter
An inverter is an electrical device that takes a DC voltage input and converts it into an
AC output. One of the basic designs for an inverter is an H-bridge as seen in Figure 29.




                     Figure 29: H-Bridge or 4 Quadrant Converter Circuit

When Q1 and Q4 are closed and Q2 and Q3 are open (Figure 30(a)), Vin supplies
positive potential across Vo, and when Q2 and Q3 are closed and Q1 and Q4 are open
(Figure 30(b)), Vin supplies negative potential across Vo.




         Figure 30(a): Positive Vo                          Figure 30(b): Negative Vo

The switching of Q1, Q2, Q3, and Q4 can be implemented using different electrical
components such as BJTs, IGBTs, thyristors, and MOSFETs.




Figure 31(a): H-Bride Inverter Circuit with        Figure 31(b): H-Bridge Inverter with Power
Transistor Switches and Antiparallel Diodes                        MOSFETs

We will be using an H-Bridge implemented with four IRF540 power MOSFETs as seen
in Figure 31(b). While the H-bridge in our circuit will only be powered by 12VDC, these




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                              EE 452 Final Design Project Report
                          Grayson Dietrich, Kam Ma, Natalie Husmann
  MOSFETs were chosen in order to decrease the likelihood of failure due to over current
  or over voltage conditions.


  Section II: Inverter Performance Calculations

  Circuit Efficiency

  Table 3: Circuit Efficiency Values
Circuit    Vin Iin           Vout,pp Vout,rms Iout,rms Pin   Pout   Efficiency
Loop       (V) (A)    Rload (V)      (V)      (A)      (W)   (W)    (%)
Open        18 0.86      5.1    23.6     8.34     1.64 15.48  13.65      88.18
Open        18    1.4   2.67      22     7.78     2.91 25.2   22.66      89.92
Open        18    2.5   1.53    20.4     7.21     4.71    45  34.00      75.56
Open        18    3.5   0.81    18.4     6.51     8.03    63  52.25      82.93
Closed      18 0.56      5.1    17.2     6.08     1.19 10.08   7.25      71.93
Closed      18    0.9   2.67    17.2     6.08     2.28 16.2   13.85      85.49
Closed      18 1.65     1.53    17.2     6.08     3.97 29.7   24.17      81.38
Closed      18    2.9   0.81    16.8     5.94     7.33 52.2   43.56      83.44


  Output Regulation

  Table 4: Circuit Regulation Values
Circuit    Vin Iin           Vout,pp Vout,rms Iout,rms Pin     Pout   Efficiency
Loop       (V) (A)    Rload (V)       (V)      (A)      (W)    (W)    (%)
Open        17    1.6   2.67    17.6      6.22     2.33   27.2  14.50      53.32
Open        18    1.7   2.67    23.4      8.27     3.10   30.6  25.63      83.77
Open        19 1.75     2.67       22     7.78     2.91  33.25  22.66      68.15
Closed      17    1.1   2.67    17.6      6.22     2.33   18.7  14.50      77.55
Closed      18    1.2   2.67    17.6      6.22     2.33   21.6  14.50      67.14
Closed      19    1.2   2.67    18.4      6.51     2.44   22.8  15.85      69.52




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                         EE 452 Final Design Project Report
                     Grayson Dietrich, Kam Ma, Natalie Husmann
Output Waveforms
Note: Figures 32 through 37 are old waveforms of an inverter with a lower efficiency.




                  Figure 32: Open Loop, Minimum Load Output Waveform




                   Figure 33: Open Load, Medium Load Output Waveform




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       EE 452 Final Design Project Report
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Figure 34: Open Loop, Maximum Load Output Waveform




Figure 35: Closed Loop, Minimum Load Output Waveform




 Figure 36: Closed Loop, Medium load Output Waveform



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            EE 452 Final Design Project Report
        Grayson Dietrich, Kam Ma, Natalie Husmann




    Figure 37: Closed Loop, Maximum Load Output Waveform




Figure 38: Open Loop, Medium Load Output Waveform with Vin=17V




Figure 39: Open Loop, Medium Load Output Waveform with Vin=19V



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             EE 452 Final Design Project Report
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Figure 40: Closed Loop, Medium Load Output Waveform with Vin=17V




Figure 41: Closed Loop, Medium Load Output Waveform with Vin=19V




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                            EE 452 Final Design Project Report
                        Grayson Dietrich, Kam Ma, Natalie Husmann

Section III: Itemized Circuit Cost
Table 5: Circuit Itemized Cost
 Item                                        Per Unit Cost   Quantity       Cost
 Breadboard                                    $    6.00        3       $    18.00
 Wire Kit                                      $    5.00        1       $     5.00
 SG3524 Pulse Width Modulator                  $    1.60        1       $     1.60
 LM7805 Voltage Regulator                      $    0.45        1       $     0.45
 LM317 Voltage Regulator                       $    0.70        1       $     0.70
 FAN73832 H-Bridge Gate-Driver                 $    0.55        2       $     1.10
 HD74LS04 Hex Inverter                         $    0.50        1       $     0.50
 IRF540 Power MOSFET                           $    0.50        4       $     2.00
 XR2206 Function Generator                     $    0.20        2       $     0.40
 MUR420 Diode                                  $    0.80        4       $     3.20
 UF4007 Diode                                  $    0.50        6       $     3.00
 1N4148 Diode                                  $    0.20        4       $     0.80
 12000µF Capacitor                             $    5.00        1       $     5.00
 10µF Capacitor                                $    0.30       12       $     3.60
 4.7µF Capacitor                               $    2.50        1       $     2.50
 1.5µF Capacitor                               $    0.30        1       $     0.30
 1µF Capacitor                                 $    0.70        8       $     5.60
 0.47µF Capacitor                              $    0.60        2       $     1.20
 0.15µF Capacitor                              $    0.50        2       $     1.00
 0.1µF Capacitor                               $    0.20        2       $     0.40
 0.0022µF Capacitor                            $    0.20        1       $     0.20
 720nF Capacitor                               $    0.20        1       $     0.20
 8nF Capacitor                                 $    0.20        1       $     0.20
 142kΩ Resistor                                $    0.10        1       $     0.10
 100kΩ Resistor                                $    0.10        3       $     0.30
 30kΩ Resistor                                 $    0.10        2       $     0.20
 10kΩ Resistor                                 $    0.10        2       $     0.20
 5.91kΩ Resistor                               $    0.10        1       $     0.10
 5.1kΩ Resistor                                $    0.10        1       $     0.10
 2.2kΩ Resistor                                $    0.10        1       $     0.10
 2kΩ Resistor                                  $    0.10        2       $     0.20
 1kΩ Resistor                                  $    0.10       10       $     1.00
 340Ω Resistor                                 $    0.10        1       $     0.10
 24Ω Resistor                                  $    0.10        1       $     0.10
 56Ω Resistor                                  $    0.10        4       $     0.40
 10Ω Resistor                                  $    0.10        1       $     0.10
 0.5MΩ Potentiometer                           $    1.00        1       $     1.00
 100kΩ Potentiometer                           $    1.00        3       $     3.00
 20kΩ Potentiometer                            $    1.00        1       $     1.00
 10kΩ Potentiometer                            $    1.00        3       $     3.00
 5kΩ Potentiometer                             $    1.00        1       $     1.00


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                           EE 452 Final Design Project Report
                       Grayson Dietrich, Kam Ma, Natalie Husmann
 Fan                                               $     1.00   1   $   1.00
 Heatsink                                          $     5.00   1   $   5.00
 Mica Insulation Pads                              $     0.25   4   $   1.00
 Inductor                                          $   12.45    4   $ 49.80
 Isolated Transformer                              $     1.50   1   $   1.50
 Miscellaneous Hardware                                -        -   $   5.00
 TOTAL                                                 -        -   $ 132.25

Table 6: Concentrated Cost Table
 Item                                  Cost
 diodes/ICs                        $ 13.75
 capacitors                        $ 20.20
 resistors/potentiometers          $ 12.00
 inductor/transformers             $ 51.30
 other                             $ 35.00
 TOTAL                             $ 132.25




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                         EE 452 Final Design Project Report
                     Grayson Dietrich, Kam Ma, Natalie Husmann


Works Cited
Christie, Rich. “15-Inverters”. 452 Lesson Plan. 26 Sept. 2008. 10 Nov. 2008
        <https://www.ee.washington.edu/class/452/2008aut/protected/15%20-
        %20Inverters.pdf>.

“FAN73832 Half-Bridge Gate-Drive IC Datasheet”. Fairchild Semiconductor. Feb. 2007.

“LM2524D/LM3524D Regulating Pulse Width Modulator Datasheet”. National
     Conductor. 2 May 2008.

“SG3524 Regulating Pulse Width Modulator Datasheet”. Texas Instruments. Feb 2003.

“XR-2206 Monolithic Function Generator Datasheet”. Exar Corporation. Jun 1997.




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