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CS 310 University of Texas CS 310 University of Texas
Introduction to Addressing Modes Example Addressing Modes for accessing Data
•Addressing Mode (definition): ADDRESSING
MODE
EFFECTIVE ADDRESS FORMULA Mem
Access
LC-3
?
RISC ISAs
?
• The strategy to identify WHERE the operand is located. (Direct) Register Operand is in Register
?
NO YES ALL
• Note1: each addressing mode has a unique formula to locate the Immediate
Register Indirect
Operand is in Instruction
E.A. = Contents(Register)
NO
YES
YES
YES
ALL
ALL, via Base and
operand. Offset = 0
Base + Offset E.A. = Contents(“Base” Register) + YES YES ALL
• Note2: The operand is in memory in all (but 2) addressing modes {aka Register sign ext (offset)
Indirect with
•Effective Address (definition): offset/displacement}
Direct Memory E.A. = <address in instruction> YES NO ALL, via Base = 0 and
(aka Absolute) Offset = small addr
• Actual location of operand to be used by the instruction: PC-Relative E.A. = Contents(PC) + sign ext (offset) YES YES YES
Memory Indirect E.A. = Contents(MEMORY[X]), YES YES NO,
•How does each type of instruction use effective addr? where in LC-3, X is calculated as: too complex
Contents(PC) + sign ext (offset)
• “load type” instr: Rdest ! Mem[eff.addr] “Indexed” E.A. = Contents(Base Register) + YES NO SOME
Contents(Index Register)
• “store type” instr: Mem[eff.addr] ! Rsrc Register Indirect E.A. = Contents(“Base” Register), AND YES NO SOME
with auto increment increments the contents of the Base
• “jump type” instr: PC ! “effective address” Register by SIZE of the operand
Others …..
• “copy eff. addr type” instr: Rdest ! “effective address”
• “ALU type” instr (Intel ISA) Rdest ! Rsrc + Mem[eff.addr]
AddrModes-1 AddrModes-2
CS 310 University of Texas CS 310 University of Texas
“(Direct) Register” Addressing Mode Immediate Addressing Mode
•Memory Addressing Mode? No •Memory Addressing Mode? No
• “Effective Address”: operand is located in specified reg # • “Effective Address”: operand located in the INSTRUCTION
• LC-3 syntax: Rn, where 0 ! n ! 7 • LC-3 syntax: #<decimal digits>, x<hex digits>, b<bits>
• Generic RISC syntax: Rn, where 0 ! n ! 31 • Generic syntax: #<digits> (or symbolic name of a constant)
• Intel syntax: EAX, EBX, …. • Intel syntax: <decimal digits> for 8/16/32bit constants
•Usage: •Usage:
• For permanent location of scalar variables • For any compile-time or assembly-time constants
• For temporary calculations of any data or addresses • Modern ISAs have a limited # of bits for the operand, e.g. 10-16
•Popularity: In ISAs that are not a RISC “Load/Store” ISA, this •Popularity: (3rd) In ISAs that are not a RISC “Load/Store”
addressing mode is used for 50% of operand references ISA, this addressing mode is used for (9-20%) of operand
references.
AddrModes-3 AddrModes-4
CS 310 University of Texas CS 310 University of Texas
Register Indirect Addressing Mode Base + Offset Addressing Mode
•Memory Addressing Mode? Yes •Memory Addressing Mode? Yes
• Effective Address: contents(Register <n>) • Effective Address: contents(Register <n>) +
• LC-3 syntax: can be modelled with Base + “offset of zero” sign ext(offset, that is known at compile/assembly time)
plus: JMP R7, JSRR R3 • LC-3 syntax: R<n>, <numeric offset>
• Generic syntax: (R<n>) • Generic syntax: <numeric displacement>(R<n>)
•Usage: accessing “a pointer” or a computed address •Usage: very versatile
• Most basic memory addressing mode to access any type of data • Models the “register indirect” addressing mode with an offset of 0
• Particularly important for locations that must be calculated at run-time • Allows non-zero offsets, useful in “structures”, class “data members”,
•Popularity: (4th) In ISAs that are not a RISC “Load/Store” and the run-time stack (used for function calls & static local variables)
ISA, this addressing mode is used for (2-12%) of operand •Popularity: (2nd) In ISAs that are not a RISC “Load/Store”
references. ISA, this addressing mode is used for (16-27%) of operand
references.
AddrModes-5 AddrModes-6
CS 310 University of Texas CS 310 University of Texas
Statistics on “Base + Offset” Mode Absolute Addressing Mode
Size of offset (aka displacement) is an issue •Memory Addressing Mode? Yes
• Large size requires more bits in instruction • Effective Address: address stored in instruction, must be
Statistics for known at compile time)
Alpha • LC-3 syntax: not used
architecture • Generic syntax: LOAD Rdst, <symbolic name or value>
with full • Typical Usage: Global variables, OS programming
optimization
for SPEC
CPU2000
Log2(displacement) AddrModes-7 AddrModes-8
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PC Relative Addressing Mode PC-relative Addressing Mode Example
• Memory Addressing Mode? Yes •Example
• Effective Address: contents(PC) +
sign ext(offset, that is known at compile/assembly time)
• LC-3 syntax: “label” used with LD, ST, LEA, BR, JSR
(example: JSR LShift) •Assembly Time:
• Generic usage: typical usage for branching to a label ( i.e.
commonly used to reference instructions NOT data!!!)
Why do compilers not use PC-relative for “data”???
•Run-Time (fetch phase)
•Run-Time (fetch operands phase)
AddrModes-9 AddrModes-10
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LD (PC-Relative) LEA (Immediate) NO, it’s PC-Relative!!!
AddrModes-11 AddrModes-12
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PC-Relative Limitations Example Memory Indirect Addressing Mode
• Memory Addressing Mode? Yes
1) PROBLEM:
ST R3, ABC ;IF the ST instruction is TOO FAR from ABC, • Effective Address: contents( Mem[ PC + sign ext(offset)] )
….. far ;(assume ABC is a scalar value) • LC-3 syntax: indicated by LDI & STI mnemonics & label
ABC .BLKW 1 ;an assembly time error would occur (in pass2)
• Other ISAs defines it as: contents (Mem[ Regs[Rsrc]])
2) SOLUTION: Create a memory pointer that is NEAR to the instruction; • Usage:
This memory pointer contains the address of ABC. • Goal: access a single-valued (scalar) variable that is too “far” from the
LD R0, ABC_PTR ;R0 contains the address of ABC instruction
STR R3, R0, 0 ;R3 is stored into ABC • Technique: Create a memory pointer that is “near” the instruction,
… near using the “allocate/initialize” assembler directive (e.g. LC-3’s .FILL)
ABC_PTR .FILL ABC ; note, that there is no constraint of the • Popularity: (6th out of 6) In ISAs that are not a RISC
; distance between the ABC_PTR & ABC, “Load/Store” ISA, this addressing mode is used for (0.5-3%) of
... far ; they just have to be in same source file
operand references.
ABC .BLKW 1 ; a scalar variable
...
AddrModes-13 AddrModes-14
CS 310 University of Texas CS 310 University of Texas
Memory Pointer Example (using memory indirect) Additional Example (for arrays/structures)
Given the problem that ABC and the STI instruction are too far apart, we 1) Assume HEAP and the LD instruction are too far apart, thus an
have already seen a solution that requires 2 instructions. We can avoid assembly time error would occur (since the PC offset to HEAP exceeds the
one of the 2 instructions by using the Memory Indirect addressing mode # of bits in the instruction for the offset).
STI R3, ABC_PTR ; The value of R3 is now stored into ABC 2) Solution: Create a memory pointer pointing to HEAP (an array)… but we
... ;assuming the distance from the STI instr won’t be able to use Memory Indirect
... ; to ABC_PTR fits in the 9bit offset field. LD R1, HEAP_PTR ; R1 now contains the address of HEAP
ABC_PTR .FILL ABC ; note, that there is no constraint of the ; assuming that the distance between
; distance between the ABC_PTR & ABC, ;HEAP_PTR and the LD instruction fits
... ; they just have to be in same source file ...
ABC .BLKW 1 ; a scalar variable LDR R2, R1, #1 ; R2 contains the value of the 2nd word
... ... ; of the HEAP data structure
•NOTE: the memory indirect mode is not a solution for typical HEAP_PTR .FILL HEAP ; note, that there is no constraint of the
accesses to arrays or structures, so we must use the original ... ; distance between HEAP_PTR & HEAP
solution. HEAP .BLKW x1000 ; declaration of an array or structure
...
AddrModes-15 AddrModes-16
CS 310 University of Texas CS 310 University of Texas
LDI (Memory Indirect) STI (Memory Indirect)
AddrModes-17 AddrModes-18
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