Encoding of Machine Instructions

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					Encoding of Machine
 Encoding of Machine Instructions
• To be executed in a processor, an instruction
  must be encoded in a compact binary pattern.
  Such encoded instructions are properly referred
  to as machine instructions.
• The initial instructions that use symbolic names
  and acronyms are called assembly language
  instructions, which are converted into the
  machine instructions using the Assembler
 Encoding of Machine Instructions
• The type of operation that is to be
  performed and the type of operands used
  may be specified using an encoded binary
  pattern referred to as the OP code for the
  given instruction.
• Usually the OP code occupies 8 bits.
  Encoding of Machine Instructions
• Usually an instruction may occupy either one word (32
  bits) or two words (64 bits).
• For those instructions that occupy only one word all the
  operands must be stored or specified only in the
  processor registers.
• For those instructions that occupy two words, one of the
  operands can be stored in memory or can be a full 32-bit
  immediate operand.
• Some modern processors allow variable-length
  instructions including ones that occupy more than two
  words. The latter instructions can operate with the two
  operands stored in memory.
• Start DEBUG
• Type -E CS:100 B8 23 01
• Type –U 100,106
 Encoding of Machine Instructions
• The restriction that an instruction must
  occupy only one word has led to a style of
  computers that have become known as
  Reduced Instruction Set Computers
• The instruction sets that allow two-word
  and multiple-word (variable-length)
  instructions lead to the Complex
  Instruction Set Computers (CISC).
  Encoding of Machine Instructions
• The OP code usually occupies 8 bits.
• To specify the processor register, 4 bits are required for
  up to 16 registers and 5 bits are required for up to 32
• 3 extra bits are used to specify the addressing mode that
  is used for the corresponding operand either stored in a
  register or addressed indirectly through the register.
• Thus, totally 7 or 8 bits (for 16 and 32 registers,
  respectively) are used to specify an operand through the
• The rest of 10 or 8 bits of a single-word instruction can
  be used either to give the index and base value for the
  Index and Base with Index addressing mode
Encoding of Machine Instructions
        8                 7-8           7-8                 10-8

    OP code          Source            Dest           Other info

                     (a) One-word instruction

       8                  32            7-8                 17-16

    OP code           Source           Dest           Other info

              Memory address/Immediate operand

                      (b) Two-word instruction

       8              7-8        7-8       7-8              4-32

    OP code          Ri         Rj        Rk          Other info

                   (c) Three-operand instruction

    Figure 2.39. Encoding instructions into 32-bit words.
•The NOP instruction translates to 0x90

•The HLT instruction translates to 0xF4

• Some opcodes have no mnemonics named after them
  and are undocumented.

•Different processors in the x86-family may interpret
 undocumented opcodes differently, making a program
 using them behave differently on different processors.

• Some undocumented opcodes may generate processor
  exceptions on some processors.
 Converting Assembly Language Instructions to
 Machine Code

• An instruction can be coded with 1 to 6 bytes
• Byte 1 contains three kinds of information
  – Opcode field (6 bits) specifies the operation (add, subtract, move)
  – Register Direction Bit (D bit) Tells the register operand in REG field in byte 2
     is source or destination operand
     1: destination                 0: source
  -Data Size Bit (W bit) Specifies whether the operation will be performed on 8-bit
     or 16-bit data
      0: 8 bits                     1: 16 bits
• Byte 2 has three fields
– Mode field (MOD)
– Register field (REG) used to identify the register for the first operand
– Register/memory field (R/M field)
 2-bit MOD field and 3-bit R/M field together specify
 the second operand             Mode Field encoding

Register/memory (R/M) Field Encoding
  •   Opcode for MOV = 100010
  •   D = 0 (AL source operand)
  •   W bit = 0 (8-bits)
  •   Therefore byte 1 is 100010002=8816

  • MOD = 11 (register mode)
  • REG = 000 (code for AL)
  • R/M = 011 (destination is BL)
  Therefore Byte 2 is 110000112=C316

The code for this operation is = (88C316)
               Final Exam
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•Last homework is important…

•Exam topics
   Basic Input / Output
   Stack
  Encoding of Machine Instructions
   Advance Screen Processing (Theory only)