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The-A1676W-CAEN-Wiener-Interface

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The-A1676W-CAEN-Wiener-Interface

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									                     The A1676W CAEN-Wiener Interface R. 3.00

                                                                                    A.Tauro


CERN, 01-12-2003,

        This report is the summary of the talk held at the 28/11/2003 Hmpid Meeting, and
of the most relevant activity at CERN at that moment.

       Essentially the 1) Low cost and the 2) Good Stability of the output voltages, has
made the Wiener Power Supply PL500 F8 a good item for many LV solutions at CERN.

The main limitations of such a PS are:
      1) It is not possible to power ON/OFF each channel individually. The power of
           the 8 channels of one crate is the same and corresponds to the crate power.
      2) The TripOff feature is executed at the level of crate: an Error (Ovc, Unc, Ovv,
           Unv, Ovp) on a single channel leads to the whole crate switch OFF.
      3) The grouping of the channels is not possible.

These features are of primary importance for a good DCS. In fact, a single error event
would create a huge loss of data taking if the whole crate is powered OFF. Additionally,
the bipolar grouping of channels inside the modules has to be implemented also at the
level of the PS.
To develop a complete DCS, the actual implementation of the LV Control System allows
to add these features, via the PVSS Software. In other words, the additional features are
just emulated trough PVSS.
The need to have a Fast and Reliable DCS, has pushed to another implementation of the
Wiener features. The easiest solution should be to modify the Wiener PL500 F8 control
Firmware, but the Wiener seems actually not really interested to this task.
The implemented solution is represented by the Firmware upgrade of the A1676W Caen
board. In fact, this item is the closest to the Wiener crates, and is the best candidate for
the allocation of an extra-intelligence to the Wiener PS. In this approach the emulation
still exist, but is created at a very low level, the Firmware and no longer the Software.
This solution realises a faster control respect to an OPC Server implementation, and is
more reliable, thanks to the dedicated CAN Bus connecting the Board to the Wiener PS.

It follows a short description of the additional features realized by the new A1676W
Firmware (R. 3.00), together with some preliminary results.

   1) Single Channel ON/OFF (CH PW)

The Wiener PL500 doesn’t accept any CH PW ON/OFF operation over a single channel.
The CH PW OFF operation is performed by a VSET operation of a null value. The
original value of VSET is saved in the Board Register and is restored in a CH PW ON
phase.



                                             1
Saving the VSET values in the EEPROM of the Board as soon as they are received from
the System allows to restore the original configuration in case of board power cut.
If the System should loose the ethernet connection with the OPC Server, the Board will
not fail in controlling the Wiener. In particular the possible Error conditions will be
adequately tripped off (channel tripoff).
A Kill signal to the Wiener in case of power cut of the System is underway.
In case of broken connection with the Wiener PS, overcurrent is prevented by having
applied a Current Limit in correspondence of the OVC setting.
When working in grouping mode (see after), the delta t of the ON/OFF operation has
been estimated and is less than 70 ms.
Figure 1 shows the measure of the delta t in the switching ON phase of Channels #1 and
#2. The value of delta t is 60 ms.
Figure 2 shows the measure of the delta t in the switching OFF phase of Channels #1 and
#2. The value of delta t is 100 ms.




    Fig.1 - Measure of the delta t in the switching ON phase of Channels #1 and #2.




                                           2
    Fig.2 - Measure of the delta t in the switching OFF phase of Channels #1 and #2.

In order to keep into account the delay introduced by the Wiener during the switch off of
a single channel, a series of measures has been done.
From the telnet window the channel was shuttled off. By acquiring also the Can-Bus
signals, it was possible to measure the time from the arrive of the VSET burst at the Can-
Bus to the fall of the channel voltage. The frequency distribution of this times is plotted
in Fig,3. The mean value and the std deviation of the distribution are respectively 3.35 ms
and 1.27 ms. This result is encouraging from the point of view of a fast control system.

                                            Wiener VSET delay


                           6

                           5

                           4
               Frequency




                           3

                           2

                           1

                           0
                               0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5
                                                   time [ms]


    Fig.3 - Frequency distribution of the delay time of the Wiener PS during a VSET
                                        operation.


                                                   3
   2) Single Channel TripOff (CH TRIPOFF)

An error condition is represented by:

• OVV (channel in OVERVOLTAGE condition, VMON > OVVSET)
• UNV (channel in UNDERVOLTAGE condition, VMON < UNVSET)
• OVC (channel in OVERCURRENT condition, IMON > OVCSET)
• UNC (channel in UNDERCURRENT condition, IMON < UNCSET)
• OVP (channel in OVERVOLTAGE protection, VMON > OVPSET)

The A1676W Board returns the error code to the SY 1527 in the STATUS bytes. When
in error, the board performs a CH PW OFF operation. The error code flag (OVV, UNV,
…) remains active until the error condition has been removed and the channel has been
switched ON.

   3) Enable/disable the Bipolar Grouping Mode (CR GRP)

Each Wiener PS can work in two modes:

• CR GRP OFF: the 8 channels can be individually switched ON/OFF.

• CR GRP ON: the 8 channels are grouped in bipolar mode (Ch.#1 - Ch.#2; Ch.#3 -
Ch.#4; Ch.#5 – Ch.#6; Ch.#7 - Ch.#8). Only even channels have the CH PW command,
which affects both the channels in the group.
Note 1: When in CR GRP, an error condition causes a CH PW OFF operation over the
grouped channels.

Note 2: Modifying the CR GRP mode is only possible in Transparent Mode. The board
checks if all channels are OFF before enabling a CR GRP ON operation.


Measure of the Channel TripOff Delay.

A Channel TripOff has been produced, we measured the switch OFF time of the single
channel (reaction time).
The injected error is the OVC obtained by shortcutting the load resistance on Channel 1.
Fig. 4 shows a single measure results. The reaction time corresponds to the time from the
shortcut to the channel switch off, when a little step appears in the voltage. At the
moment of the measure, the CR Grouping Mode was enabled, and the Channel 2 switch
off is also plotted.
This measure was repeated many times, since we expected it to be affected by a great
spreading. The spreading was predicted after the careful analysis of the A1676W FW
(Timer2 routine, which gests the requests and the transmissions via the Can-Bus), which
is not optimized in terms of time. This is because the board was originally not intended to
achieve a fast operation, but only to transfer data.



                                             4
The frequency distribution plot of the response time is reported in Fig. 5. The mean value
and the std. deviation of the distribution are respectively 507 ms and 286 ms. The
measure has been done with a 250Kbps Can-Bus connection (120 m of cable).




                                Fig. 4 - Reaction time to a single channel TripOff
                                         (CR Grouping Mode is enabled).

From the analysis of Fig.5 it descends that the distribution is out of specification, because
the time required to the system to the channel switch off is comparable with the response
time obtained when using the OPC server.

                                     Single Channel Tripoff Time, Can-Bus @ 250 Kbps


                           10
                            9
                            8
                            7
               Frequency




                            6
                            5
                            4
                            3
                            2
                            1
                            0
                                     100
                                           200
                                                 300
                                                       400
                                                             500
                                                                   600
                                                                         700
                                                                               800
                                                                                     900
                                                                                           1000
                                                                                                  1100
                                                                                                         1200
                                                                                                                1300
                                                                                                                       1400
                                                                                                                              1500
                                 0




                                                                     time [ms]

               Fig. 5 – Channel TripOff, Can-Bus connection @ 250Kbps .


                                                                     5
In order to test if a speedup of the Can-Bus connection could reduce the A1676W
response, another has been conducted: the Can-Bus connection has been set up to 1Mbps,
thanks to the use of a short cable (1,2 m). The times acquired by the same test than before
didn’t show any differences. Probability plot is reported in Fig. 6. The mean value and
the std. deviation of the distribution are respectively 471 ms and 192 ms. These values
have been calculated by cutting data exceeding 700 ms, which is the refresh time when
only one crate is present (=25*3*7+25*7).
This result means that the connection is fast, and that the board FW represents the
bottleneck of the system. To improve the system, the analysis of the Timer2 routine will
be reported.
Further improvements in the direction of the reduction of the delay of the A1676W board
will be analyzed in the next R. 3.01.

                               Single Channel Tripoff Time, Can-Bus @ 1000 Kbps


                           6
                           5
               Frequency




                           4
                           3
                           2
                           1
                           0
                              0
                              0
                              0
                              0
                              0
                              0
                              0
                              0
                              0
                              0
                             00
                             00
                             00
                             00
                             00
                             00
                            10
                            20
                            30
                            40
                            50
                            60
                            70
                            80
                            90
                           10
                           11
                           12
                           13
                           14
                           15

                                                     time [ms]

              Fig. 6 – Channel TripOff, Can-Bus connection @ 1000Kbps.


Measure of the Crate TripOff Delay.

As in the Fig. 7, a Crate with the TripOff enabled requires slightly more than 5 ms to be
switched OFF. The 8 channels are simultaneously switched OFF.




                                                      6
Fig. 7 – Measure of the delay of the Crate TripOff phase. The right plot is in expanded
                                         scale.




                                          7
                                  Channel Operation Block Diagram (Even Channels)

               The next figure represent the operating block diagram of the even channels in the v3.0
               Firmware implementation.

                                                                                                                  Transparent Mode
                                                   CH PW     OFF                                          ALL         NO
                                                                           CR GRP
                                                   CR PW     ON                                           CH
                                                                                                          OFF

                                                             CH PW
                                                                                                                YES


                                                EN         CR        DIS
    Stand by                                               GRP                                   CR GRP   TOGGLE                   Return


     Ready           CH+1 PW ON


     Config.

                                                                     CH PW     ON
      Trip                                                           CR PW     ON



                                                                                     ERROR !!!
                                         CH PW


                                CH PW     OFF
                                CH STATUS ERR

                                                                              CR          EN        CR PW     OFF
                                                                             TRIPO                  CH STATUS ERR
                                                                               FF                                          CR PW


                                             DIS                                 DIS


                           EN          CR
CH+1 PW OFF                            GRP




                                                                       8

								
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