ITEC 1000 Introduction to Information Technologies - Download as DOC by moti

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									     ITEC 1000 Introduction to Information Technologies

                                 Assignment #3
                                Professor Jimmy Huang


Due: August 2nd, 2006 at 12:00pm.
The total number of points for this assignment is 100. This Assignment is worth five
percent (5%) of the total final grade. Each question has a number. Between right brackets
is specified the number of points assigned to that question.
Student last name
Student first name
Student number


1) [10] Suppose that the following instructions are found at the given locations in memory:
         17 LDA 90
         18 ADD 91
         90 1000
         91 3020
   a. Show the contents of the IR, the PC, the MAR, the MDR, and A at the conclusion
      of instruction at address 18.

       PC  MAR
       MDR  IR                 final value for IR = 191
       IR[address]  MAR        final value of MAR = 91
       A + MDR  A              final value of MDR = 3020 and A = 4020
       PC + 1  PC              final value of PC = 19


   b. Show the contents of each register as each step of the fetch-execute cycle performed
      for instruction at address 17.

                         PC         MAR        MDR       IR       A
       PC  MAR          17          17        000       000      0000
       MDR  IR          17          17        590       590      0000
       IR[address]  MAR 17          90        590       590      0000
       MDR  A           17          90        1000      590      1000
       PC + 1  PC       18          90        1000      590      1000
2) [7] One large modern computer has a 64-bit memory address register. How much memory
   can this computer address in MB and GB respectively?
   A 64-bit MAR can support 2 64 = 2 44 x 2 20 = 2 44 MB of addressable memory.
   A 64-bit MAR can support 2 64 = 2 34 x 2 30 = 2 34 gigabytes of addressable memory.


3) [7] From what you have learned about computers, state and explain the advantages that you
   would expect a 32-bit PC architecture to have over a 16-bit architecture.

   A 32-bit architecture has an internal 32-bit data path and a 32-bit memory access path. These
   features allow the 32-bit architecture to fetch instructions more rapidly, and to process larger
   quantities of data in single operations. (Whereas a 16-bit architecture might require a number
   of instructions to process a 32-bit integer addition through 16-bit registers, for example, the
   addition can be done in a single step with a 32-bit register.) The 32-bit architecture also
   provides more flexibility in addressing large amounts of memory, and more flexibility in the
   design of an instruction set.


4) [9] Suppose that the instruction format for a modified LMC requires two consecutive
   locations for each instruction. The high-order digits of the instruction are located in the first
   mail slot, followed by the lower-order digits. The IR is large enough to hold the entire
   instruction and can be addressed as IR[high] and IR[low] to load it. You may assume that the
   op code part of the instruction uses IR[high] and that the address is found in IR[low]. Write
   the fetch-execute cycle for an LOAD instruction on the machine.
   PC  MAR
   MDR  IR [high]
   PC + 1  PC
   PC  MAR
   MDR  IR [low]
   IR [low]  MAR
   MDR  A
   PC + 1  PC

5) [9] Consider the interrupt that occurs at the completion of a disk transfer.
   a “Who” is interrupting “whom”?
   b Why is the interrupt used in this case? What would be necessary if there were no interrupt
       capability on this computer?
   a & b:
   The disk controller interrupts the CPU to notify it that the transfer is complete and the data
   ready for use. If there were no interrupt capability, the program that is using the data would
   have to wait long enough to assure that the data transfer is complete, in order to prevent data
   corruption.

   c Describe the steps that take place after the interrupt occurs.
   When the interrupt occurs, it causes the CPU to suspend execution of the program being
   executed, then it saved the crucial parameters for later return to that program, and jumps to
   an interrupt handler program. The interrupt handler notifies the program that the data is
   available for use. Control is then returned to the program.

6) [8] Describe a circumstance where an interrupt occurs at the beginning of an event?
   Describe a circumstance where an interrupt occurs at the completion of an event? What is the
   difference between the types of events?
   An interrupt occurs at the onset of an event when a device requires attention or
   action, for example a key is struck on a keyboard, a sensor detects a power failure, or
   an attempt is made to execute an illegal instruction. These events are unexpected.
   Completion interrupts indicate that a request made by a program has been completed.
   These interrupts are expected— indeed, awaited— since they often mean that program
   processing may resume. The completion of a disk block read is an example of a
   completion interrupt.

7) [7] The signals in computer buses are usually divided into three categories. State the three
   categories and explain the purpose of each. Into which category does an interrupt line fit?
   Bus signals consist of data, addresses, and control information. An interrupt line is an
   example of a control line.
   Give more details for every type, see the book.

8) [7] Describe the steps that occur when a system receives multiple interrupts?
   When multiple interrupts occur, the first interrupt causes a suspension of the program
   executing at the time, storage of that program’s critical parameters, and transfer of control to
   the program that handles the particular interrupt. When a second interrupt occurs, its priority
   is compared to that of the original interrupt. If its priority is higher, it takes precedence, and
   the original interrupt program is itself suspended. Otherwise, processing of the original
   interrupt continues, and the new interrupt is held until the original interrupt program is
   complete. When the higher priority interrupt process is completed, the lower interrupt is
   processed. If no further interrupts occur and if no interrupt results in suspension of all CPU
   processing, control eventually returns to the original program, which then resumes
   processing.

   In general, multiple interrupts result in a queue of interrupt handler programs which will be
   executed in the order of the priorities associated with each interrupt. The top priority
   program in the queue executes unless it is replaced by an interrupt of even higher priority.


9) [8] The average latency on a disk with eleven sectors is found experimentally to be 55msec.
   a What is the rotating speed of the disk?
   It takes 55 msec. for the disk to make ½ revolution, or 110 msec. for a full revolution. Thus,
   the disk rotates at 1/0.110 revolutions/second or approximately 545 rpm.
   b What is the transfer time for one sector if there are 11 sectors on a disk?
   If it takes 110 msec for a full revolution, and there are 11 sectors on a disk, the time to
   traverse one sector is 110/11=10 msec.
10) [7] Why is the average seek time for a hard disk much shorter than for a CD-ROM?

   The average seek time for a hard disk is the time required to locate a particular track on the
   disk. The exact location of the track is known, and the head will be moved directly to that
   position. The CD-ROM uses a spiral track, so the exact position of the track for a particular
   angle of rotation is not known. Furthermore, the number of blocks on a track varies from
   track to track because the CD-ROM is CLV, so the radial location of the desired block is
   known only approximately. To find the desired track, the head must find a track and block in
   the approximate region of the desired block, read the block number, then use that value to
   move closer to the desired location. Thus, the seek is a searching operation, which takes time.




11) [7] Explain the difference between a client-server network and a peer-to-peer network.
    A client-server network is one in which network access is controlled by one or more server
    computers. Client computers may only access the network to retrieve services that are
    provided by the server computers. Server software can communicate with every computer on
    the network, but client software can only communicate with the server. In a peer-to-peer
    network, the network software on any computer can communicate with the network software
    on any other computer on the network. A peer-to-peer network can be used as a client-server
    system, but the reverse is not true.


12) [7] Explain process and thread. Please give an example for thread.

   A process is defined to include a program, together with all the resources that are associated
   with that program as it is executed. A thread is a mini-process. It represents a piece of a
   process that can be executed independently of other parts of the process.
   For example, suppose a web page has an embedded flash movie and the background music.
   We want a responsive browser user interface while the flash movie and the background
   music are playing. We need three threads within the browser process. One thread is for the
   movie; the second is for the background music; and the third one is for the browser user
   interface. They will work independently.


13) [7] Explain deadlocking. Why doesn’t deadlocking occur in MS-DOS?
    Deadlocking occurs when a process cannot continue execution because it requires a resource
    that is held by another process. The other process, in turn, is also blocked, because it requires
    a resource held by the first process. The deadlock can extend to multiple processes, blocked
    in a circular fashion. Deadlock cannot occur in MS-DOS because there is only one process
    operating at a time, so there is no resource sharing.

								
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