A Tight Bound on Remote Referenc

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					           A Tight Bound on Remote Reference Time
             Complexity of Mutual Exclusion in the
                  Read-Modify-Write Model
           Student: Sheng-Hsiung Chen                              Advisor: Ting-Lu Huang
           學生:陳勝雄                                                  指導教授:黃廷祿

Motivations
• The Mutual Exclusion Problem                                     Processor    Processor                Processor       Processor

   • Manage accesses to a single
                                               Memory         Memory         Memory       Memory
   indivisible resource
• Remote Memory Reference (RMR)
                                                                     Interconnect Network


   • Generate interconnect traffic, which       Remote Memory
                                                  Reference

   may result in a bottleneck
• What is the tight bound on the number of RMRs?
   • Focus of mutual exclusion for the last 15 years: minimizing the number

System Model
• Distributed Shared-memory Model
    • Each process has a segment of shared memory that is local to it.
• A General Read-Modify-Write Primitive
    • It accesses at most one shared variable in one instruction.
    • It is a generalization of a variety of atomic primitives that have been implemented.

Results
                                                                          nil                               nil


                                                                     3                               3


                                                                     1           (3, 4)              1               (3, 4)

• An Upper Bound                                          list 1     5                      list 1   5

    • A list-based mutual exclusion                                  4                               4               (4, 4)


    • Atomic instructions: read, write,                                  (a)
                                                                          nil
                                                                                                     6


    fetch&store, compare&swap                                        3
                                                                                            list 2
                                                                                                     3


    • RMR Time Complexity: 3                                         1           (3, 4)
                                                                                                     7               (4, 1)


• A Lower Bound                                           list 1     5
                                                                                                     4



    • 3 is a lower bound for any mutual                              4           (4, 4)
                                                                                                     7


                                                                                                     4
    exclusion with at least four                                     6
                                                                                            list 3
                                                                                                     3
    processes.                                            list 2
                                                                     3

                                                                                                     1
• We establish a tight bound of three                                7


                                                                     4
on RMR time complexity.                                                   (b)                               (c)


                                                                     An execution of the algorithm

                                                                                Distributed Computing Lab

				
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