VIEWS: 151 PAGES: 15 POSTED ON: 2/11/2010 Public Domain
Linear Circuit Models for Bipolar Junction Transistors Introduction Bipolar Junction Transistors (BJTs), Field Effect Transistors (FETs) and vacuum tubes all have similar circuit models. The heart of each model is a dependent source. In fact, the importance of these electronic devices, at least from a circuit theoretic point of view, is that they are practical dependent sources that mimic the behavior (more-or-less) of ideal dependent sources in much the same way that practical resistors, capacitors and inductors mimic the behavior of their ideal counterparts. The dependent-source-like behavior permits small input signals to these devices to control much larger signals and thereby accomplish two key processes of electronics: amplification and switching. The Linear Circuit Model We concentrate on modeling BJTs because they are slightly more difficult to model than FETs or vacuum tubes. Consider the (nonlinear) i-v characteristics of the collector-emitter port of a BJT that resides in an otherwise linear circuit (whose i-v characteristic is represented by the linear load line in the following figure): 2 For amplification applications, we wish to operate the transistor somewhere in the region where the curves are more-or-less equally spaced and parallel, the so- called active region. The active region stretches between the saturation region near the vertical axis where the curves bend and coalesce and the cut-off region near the horizontal axis where the base current is zero and the collector current is small. The load line, which is the i-v characteristic of the linear circuit that the transistor sees at its collector-emitter port, normally lies mostly in the active region. Because we assume all of the circuit except for the transistor is linear, the load line is a straight line. (In fact, the slope of the load line is just 1 Rth , where Rth is the Thevenin resistance of the linear circuit seen by the collector-emitter port. The Thevenin voltage of this circuit is the intersection of the load line with the Vce axis.) With no signal applied, Vce (the collector-to-emitter voltage) and I c (the collector current) take on constant values Vceq and I cq , respectively. The point Vceq , I cq is called the quiescent point (because of the absence of the signal) or simply the operating point. The intersection of the load line with the collector-emitter i-v characteristic for a given base current, I b , determines the operating point, the unique point that lies on the i-v characteristics of both the transistor and the rest 3 of the circuit. Often, but not always, we will choose the operating point to lie near the center of the active region. (In the figure above, we have shown a possible operating point Vceq , I cq 6V ,0.6 mA that requires a base current I b 20 A .) In setting the operating point, we must be careful that the power dissipated by the transistor at the operating point, Vceq I cq , does not exceed the power dissipation rating specified by the manufacturer on the data sheet. We model the i v characteristics in the region around the operating point with a set of equally spaced parallel lines that approximates the actual i-v characteristics in the active region: This model is clearly horrible in some regions (in the saturation region, especially), but is not too bad in the active region. The major merit of this obviously oversimplified model, as we will see later, is that it allows us to construct a circuit model of the transistor by using only linear circuit elements (as opposed to nonlinear circuit elements) and allows us to apply the powerful and relatively simple methods of linear network analysis to circuits that contain transistors. The model turns out to be more useful than we might reasonably expect because we so frequently try to design analog electronic circuits to behave in a linear fashion. The linear circuit model therefore lets us carry out an approximate design and then calculate the ideal behavior of such circuits. We 4 use special designer tricks (such as negative feedback) to minimize the effects of the nonlinearities in actual transistor i-v characteristics on the performance of the circuit. For convenience, we can term the above model our geometrical model since it approximates the transistor i-v characteristics by equally spaced parallel lines. In this model, the quantity I c is the increase in collector current, I c , for an increase, I b , in the base current, I b . This geometrical model of the transistor can be transformed into an algebraic model by writing the equations corresponding to the straight lines. To begin, let's start with the line corresponding to I b 0 . Recall the slope- intercept form of straight lines: Ic slopeVce intercept The slope clearly has dimensions of Siemens, and hence is a conductance. We call it G . The intercept, for I b 0 , is I c* . The algebraic form of the straight line that corresponds to I b 0 , therefore, is: I c GVce I c* In the straight lines for which I b 0 , only the intercept changes – the slope is unchanged. More specifically, as I b increases by I b , we must add I c to the intercept. The number of I c 's that we must add is I b / I b . Thus, the appropriate intercept for a line corresponding to a given I b is Ib I c I c* I b so that we can write I c I c G Vce Ib I c * I b 5 or Ic = G Vce + I b + I c * where I c I b is the customary (or h fe ) of the BJT. We term this equation for the collector current an algebraic model of the transistor (in the active region) in that it gives I c as a linear function of I b and Vce in terms of transistor parameters G , and I c* . Since G is small (the lines are nearly horizontal and hence have nearly zero slope), I c is a relatively weak function of Vce and varies mainly with I b . We now seek an equivalent circuit that exhibits the same i-v characteristics at the collector-emitter terminals as the algebraic equation. The GVce term just corresponds to a conductance, G : We can include the I b term as a dependent current source: The I c* term can be included as an independent current source: 6 For simplicity in notation, we can include the I c* source in the dependent source: This circuit model exhibits approximately the same i-v characteristics at the collector-emitter port as does the original transistor if its operation is limited to the active region of its i-v characteristics. What about the base-emitter port? The characteristic curve looks like this: 7 (This i-v characteristic is typical of solid state PN junctions, exactly what appears across the emitter-base terminals of the BJT.) The geometrical model for this i-v characteristic in the active region is a straight line: We again use the slope intercept formula but, following tradition, we write Vbe as a function of I b instead of vice versa: Vbe slope Ib intercept The slope clearly has the dimensions of Ohms and hence is a resistance, r . (In the above graph, the slope of the line is 1 r since it shows I b vs Vbe instead of vice versa.) The intercept is Vbe . Thus, we have * Vbe r I b Vbe * This equation is our algebraic model of the i-v characteristics of the BJT at the base-emitter port. The circuit that has this i-v characteristic is: 8 For transistors made of silicon, typically Vbe 0.7 V . * The overall linear equivalent circuit for the BJT is: This linear circuit is equivalent to the original BJT in the sense that if it is substituted for the BJT, the currents and voltages in the rest of the circuit in which the transistor resides are unchanged by the substitution to the extent that the nonlinearities in the transistor can be neglected. (We'll see later that negative feedback can reduce the effects of the nonlinearities.) Application of the Linear Equivalent Circuit to the Analysis of a BJT Common Emitter Amplifier For specificity, consider an NPN BJT common emitter amplifier: 9 In this circuit, vth t and Rth might represent the Thevenin equivalent circuit of a preceding amplifier stage, a signal generator or a sensor of some sort. We replace the transistor by its linear equivalent circuit: At this point, we might ask why not just use this equivalent circuit for the transistor and forget the transistor, especially since the equivalent circuit is linear (a highly desirable feature in most amplifiers) and the transistor is not. The answer is that we cannot buy the dependent source at Radio Shack. In fact, when we buy a transistor, all we really want is the dependent source, but TI or Motorola or whoever insists on giving us r , Vbe , I c* and G , which we really do * not want, but have to take anyway. Nevertheless, the linear equivalent circuit is 10 extremely convenient for approximate analysis of the circuit, as we are about to see. To facilitate the analysis of the circuit, we divide the independent sources into two groups, signal and bias, and apply the superposition theorem to permit calculation of their effects separately. The signal sources are all independent sources that generate what we consider to be signals. In our case, vth t is the only signal source. The bias sources are all other independent sources. In our case, the bias sources are Vbe , I c* and Vcc . In applying the superposition theorem, * all dependent sources must, of course, be left on all the time. The superposition theorem tells us that a part of each voltage or current results from the signal sources and another part from the bias sources. We reflect this fact by changing notation to represent the signal part of a voltage or current by lower case letters and the bias part by upper case letters: I i t I V v t V To apply superposition, we first set the bias sources to zero to obtain the signal equivalent circuit (sometimes called the a-c equivalent circuit). Note that, for example, setting Vcc 0 connects Rb1 and Rb 2 in parallel and connects Rc to ground: 11 where Rb Rb1 || Rb 2 . From this circuit, we note that the signal equivalent circuit of the transistor is: This is the only part of the linear equivalent circuit for the transistor that comes into play when all the bias independent sources are turned off. We can now look at how this model relates to two common signal models for BJTs: Note that 12 r hie rbb ' rb ' e G hoe g ce ib g m vb ' e vb ' e rb ' e ib Because ib g m vb ' e and vb ' e rb ' e ib , then ib g m rb ' e ib so that g m rb ' e It may seem silly to split hie into two pieces rbb ' rb 'e , but when considering the high frequency performance of BJTs, we'll see that there are physically meaningful capacitors (shown in dotted lines in the figure) connected between b' (not b) and c and between b' and e. Thus, the hybrid equivalent circuit is convenient because it is more easily extended to the high frequency case. At low frequencies, our model, the h parameter model and the hybrid model are essentially equivalent. We usually use the hybrid form of the signal equivalent circuit because it can be used at both high and low frequencies. We will return to the signal equivalent circuit later. Right now, however, we set the signal source(s) to zero to find the bias equivalent circuit: 13 From this circuit, we note that the bias equivalent circuit of the transistor is: This is the only part of the linear equivalent circuit for the transistor that comes into play when all the signal independent sources are turned off. This bias equivalent circuit (sometimes called the d-c equivalent circuit) will allow us to analyze how stable this circuit is from the bias point of view. That is, we can analyze how much the operating point changes as the transistor parameters vary because of temperature or of differences in parameter values among transistors of the same type. A Rough Estimate of the Parameter r = hie = rbb' + rb'e Notice that the parameter r hie rbb ' rb ' e appears in both the bias and signal equivalent circuits. We can get a rough estimate of its value by recognizing that the base-emitter terminals of the BJT connect across a solid state PN junction 14 and by using the i-v characteristic of an ideal solid state PN junction to approximate the base-emitter characteristic of the actual transistor: eV Ib I o exp be - 1 kT where I o is a small constant (with units of current) that varies from device to device e 1.6 10-19 C is the charge on an electron k 1.38 10-23 J / K is Boltzmann's constant and T is the temperature of the device in K kT The quantity has the units of voltage and at T 300 K (roughly room e temperature), kT 0.026 V e If we take the slope of the line in the linear model, 1 r , to be the tangent to the I b vs Vbe curve, then we have: 1 Ib e eV Io exp be r Vbe kT kT From the ideal PN junction i-v characteristic we find: eV I o exp be Io Ib kT Thus, 15 1 e Io Ib r kT But at typical operating points, Vbe k T e so that I b I o . Thus, 1 e Ib r kT Now GVce I cq and I c I cq so that from our earlier result * I c G Vce I b I c * evaluated at a typical operating point we see that I cq I bq or 1 I bq I cq That is, the GVce term and the I c* term are usually dominated by I b , the dependent source term. In that case, we find: kT r e I cq At T 300 K (about room temperature), we find: r 0.026 I cq This result, though approximate, gives at least a rough idea of the value for r hie rbb ' rb ' e when no more accurate value is available. The result does accurately reflect the facts that r decreases with high quiescent currents and increases with high values of (when little base current is drawn for a given value of the collector current).