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EE 201 ELECTRIC CIRCUITS_1_ Powered By Docstoc
					                               King Fahd University of Petroleum and Minerals
                                    Department of Electrical Engineering
                                     EE 200 Digital Logic Circuit Design
                                               Semester 061
                                             Sections 05 and 06

Instructor:     Dr. Wajih A. Abu-Al-Saud
Office:         Building 14, Room 225–1
Phone:          860–1824
Office Hours:   S.M.. @ 10:00pm – 10:50 pm
                S.M.W @ 12:15pm – 1:00 pm
                    and by appointment.
Textbook: Digital Design (3 Edition), by M. M. Mano.

                                    Grade Distribution:         Points
                                      Major Exam I               15 %
                                      Major Exam II              15 %
                                        5 Quizzes                10 %
                                       Homework                   5%
                                      Design Project              5%
                                       Laboratory                20 %
                                       Final Exam                30 %
                                          Total                 100 %


   1. The course will be fully coordinated (Major exams, final exam, and final grades). Since
      all sections will get the same exams, the time of major exams cannot be changed. In case
      of conflict with exams of other courses, you have to change the exam of the other course.
   2. University regulations regarding attendance will be enforced. Only official excuses will
      be accepted
   3. Homework problems will be handed by the instructor at least a week before their due
      date. Following the submission of the homework assignment, the solution will be posted
      on WebCT. Also, another list of homework problems is given at the end for more
      practice. The solution of these problems will not be collected but you are highly
      encouraged to solve these problems too. You will get a quiz on the same material of the
      homework assignment in the lecture following the assignment due date.
   4. Final exam will be comprehensive and common for all lecture sections.
   5. On-line lectures will be available under WebCT which is maintained by the course
      coordinator (Dr. Wajih Abu–Al–Saud). All students will have access to these lectures. All
      students are encouraged to access these lectures before attending the regular classes. A
      feed-back will be obtained from the students through questionnaires.
   6. Selected weeks will be conducted fully on-line. You will study the material on-line. You
      will communicate with your instructor via WebCT communication tools. You will attend
      Wednesday classes of these weeks. In Wednesday class, you will have the chance to
      discuss the material and take a special quiz.

EE200, Semester 061                                                                 3 Sep 2006
                                                                                             Quiz &
Wk   Day     Date     Topics                                                          Text              Laboratory/Tutorial
                                                                                             HW due
     S       9 Sep.
                      Binary Numbers, Number Base Conversions, Octal &
     M      11 Sep.                                                                                     No Lab
1                     Hexadecimal Numbers, Complements                          1.1–1.5
     W      13 Sep.
     Th     14 Sep.   Normal Saturday Classes
     S      16 Sep.                                                             1.6-1.7,
                      Signed Binary Numbers, Binary Codes, Binary Logic,                                Intro. to Lab Equip. Exp#1:
2    M      18 Sep.                                                             1.9, 2.1–
                      Boolean Algebra: Axioms, theorems & Properties.                                   Binary & Decimal Numbers
     W      20 Sep.                                                             2.4
                                                       National Holiday, 23 September
     M      25 Sep.                                                                          HW 1 Due   No Lab.
3                     Boolean functions, Digital Logic Gates                    2.7-2.8
     W      27 Sep.                                                                           Quiz 1
     S      30 Sep.
                      Canon. & Stand. Forms, More Logical Ops., Simp. of        2.5-2.6                 Exp#2: Digital Logic Gates
4    M       2 Oct.
                      Bool. functions Using K-Maps, Prod. of Sums Simp.         3.1-3.4
     W       4 Oct.
     S       7 Oct.
                      Don’t-care Cond., NAND, NOR, and other 2-Level                         HW 2 Due   Exp#3: Introduction to
5    M       9 Oct.                                                             3.5-3.8
                      Imp., X-OR Function, Introduction to HDL.                               Quiz 2    LogicWorks
     W      11 Oct.
                                                     Id Al-Fitr Vacation, 12 – 27 October
     S      28 Oct.   Subtractors, Decimal Adder, binary multiplier,            3.9, 4.1-
     M      30 Oct.   Magnitude Comparator, Decoders.                           4.2
6    T      31 Oct.   Major Exam I, 7:00 pm – 9:00 pm (Sections 1.1–3.8)                                Exp#4: Boolean Algebra

     W       1 Nov.   Magnitude Comparator, Decoders.                           4.3-4.4
     S       4 Nov.
                      Subtractors, Decimal Adder, binary multiplier,            4.5-4.8                 Exp#5: Simplification
7    M       6 Nov.
                      Magnitude Comparator, Decoders.
     W       8 Nov.
     S      11 Nov.
                      Encoders and Multiplexers, Random Access                  4.9-4.10,    HW 3 Due
8    M      13 Nov.                                                                                     Exp#6: Code Conversion
                      Memory.                                                   7.2, 7.3      Quiz 3
     W      15 Nov.
     S      18 Nov.
                      Programmable Logic, PLD’S, ROM, Programmable              7.5-7.7                 Exp#7: Adders/Subtractors
9    M      20 Nov.
                      Logic Array, Programmable Array Logic.
     W      22 Nov.
     S      25 Nov.
                      Sequential Circuits, Latches, Flip-flops,                 5.1-5.3      HW 4 Due   Exp#8: Multiplexers
10   M      27 Nov.
                      Characteristic Tables                                                   Quiz 4
     W      29 Nov.
     S       2 Dec.
                      Analysis of Clocked Sequential Circuits, State            5.4, 5.6                Exp#9: Design with ROM's
11   M       4 Dec.
                      Reduction and Assignment.
     W       6 Dec.
     S       9 Dec.   Flip-flop Excitation Tables,                              5.7

12   S      9 Dec.    Major Exam II, 7:00 pm – 9:00 pm (Sections 3.9–5.4 & 7.2–7.7)                     Exp#10: Flip-flops
     M      11 Dec.
                      Design Procedure, Synthesis using different flip flops.   5.7
     W      13 Dec.
     S      16 Dec.
                                                                                             HW 5 Due   Exp#11: Counters & Sequential
13   M      18 Dec.   Registers and Shift Registers                             6.1, 6.2
                                                                                              Quiz 5    Logic
     W      20 Dec.
                                             Id Al-Adha Vacation, 21 December – 5 January
     S       6 Jan.
                      Ripple Counters, Synchronous Counters and other           6.3-6.5                 Lab Final
14   M       8 Jan.
                      counters.                                                              HW 6 Due
     W      10 Jan.
     S      13 Jan.
15   M      15 Jan.   Review                                                                  Quiz 6
     W      17 Jan.
                                      Final Exam, To be scheduled by Registrar (Sections 1.1–7.7)

         EE200, Semester 061                                                                                        3 Sep 2006