ESD-protected RF filter with on-chip passive and active elements by vwp15099

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									     Passive Components

     ESD-protected RF filter with on-chip passive
     and active elements
     A monolithic integrated multiband PCN/PCS RF-bandpass filter manufactured
     on highly resistive silicon substrate with mode conversion and ESD protection is
     described. In order to analyze the ESD behavior of the filter, an ESD simulation
     model is presented and compared with measurement results.
     By H. Böhm, H. Kebinger, R. Losehand, and H. Heiss


     I ntegrated passive devices such as resistors, capacitors, coils
       and transformers have been introduced by several companies[1].
     Extended failure analysis revealed that electrostatic discharge
                                                                                   sections, an RF filter with excellent ESD protection and filter
                                                                                   performance will be discussed, and an analytical HBM simulation
                                                                                   setup for these filters will be introduced.
     (ESD) and electrical overstress (EOS) are the reason for approxi-
     mately half of all circuit failures for integrated devices. Thus,             Si-Cu technology
     excellent ESD protection is becoming more important. High ESD                    An existing silicon-copper technology for passive integration was
     robustness of the circuits guarantees high yield in production, and           extended in order to integrate passive and active elements on a high-
     additionally reduces the field failure rate of applications[3]. The most       resistive Si substrate. Figure 1 shows the cross-section of the layer
     popular ESD models are the human body model (HBM), the machine                sequence for a typical RF filter with monolithic integrated planar
     model (MM), and the charged device model (CDM). The last one is               inductors, metal-insulator-metal (MIM) capacitors, and ESD diodes.
     of growing interest because it is a special kind of electronic discharge,        Coils and transformers are implemented in three-layer copper
     showing good agreement with present ESD failure mechanisms in                 metallization. Metal-1 has a thickness of 600 nm and is mainly
     chip manufacturing. Each model describes a special kind of ESD
     discharge and is further classified into different ESD classes.
        In order to protect integrated filter circuits from ESD, ESD devices                                 ���������               ������
                                                                                         ���
     are either placed as discrete circuits around the critical input/output
     pins or integrated with the filter onto the chip. The last concept leads
     to a cheaper and smaller PCB outline[4].                                                                                                          ���
        For the development of RF filters, a compromise between RF
     performance and ESD protection must be found. The non-linearities                   ���
     of active ESD devices, for example, can cause intermodulation and
     degrade the RF performance.                                                                                        ���������
        The new RF bandpass filter with integrated impedance match-
     ing, mode conversion and ESD protection is manufactured with
     an extended silicon-copper technology that allows integration of
     active and passive components on a single die. In the following                                               ���

                                                                                   Figure 2. Bandpass filter with mode conversion for PCN applications
                                                                                   consisting of passive elements (coils, transformers and MIM capacitors),
                                ����          ����                                 as well as active elements (ESD diodes).
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     Figure 1. Cross-section of the chip with a three-layer copper metallization   Figure 3. Comparison of simulation and measurement results for the
     embedded in SiO2.                                                             differential mode of the bandpass filter.



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RF Design   www.rfdesign.com   23
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 Figure 4. Comparison of simulation and measurement results for the                                 Figure 6. Simulated voltage at the capacitor CD (1 pF) for an LC sub-circuit.
 common-mode suppression of the bandpass filter.                                                     HBM model (U0 = 1 kV).



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     Figure 5. Investigated circuit concerning electrostatic discharges with ESD                                                        ���������
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     model measurement board and device (DUT).
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     applied to lead through the metallization from the inside to the
     outside of the coils. Metal-2 and metal-3 have thicknesses of 2500 nm                                    ���
     and are used for adjusting the coils to the required inductance. Due                                        ���          �                                               ���
     to the performance limitation of the skin effect, these stacked coils                                                                    ���������
     can be used for RF applications above 1 GHz. For lower-frequency
     applications, an increase of the copper layer thickness would be                              Figure 7. Measured and simulated results of the current discharge for a
     necessary to improve the quality factor (Q) of the inductors substant-                        shorted device (RD = 0 ).
     ially. The inductances of typical integrated coils are in the range of
     0.5 nH to 35 nH, with corresponding Q factors between 10 GHz                                  conversion is carried out with an integrated autotransformer with
     and 16 at 1 GHz. Maximum Q values of about 40 were measured at                                a coupling factor of 0.83.
     3 GHz for a corresponding L value of 0.5 nH.                                                     We focused on a high common-mode suppression at the second
        The Al2O3 MIM capacitors, which are necessary for the implementa-                          harmonic, leading to a symmetrical filter design. This design reduces
     tion of on-chip resonators, are placed between metal-1 and metal-2.                           the influence of the grounding to the common-mode signal, which
     With the new dielectric material, high specific capacitance values                             results in an excellent common-mode suppression of about -40 dB
     of from 1.4 fF/µm2 to 1.8 fF/µm2 can be achieved leading to small                             at the second harmonic. In addition, the symmetrical design al-
     capacitor dimensions and small outlines of the chip design. The                               lows implementation of a dc biasing network in the mirror plane of
     values for the MIM capacitors are in the range of between 0.1 pF                              the filter, acting as a dc current supply typically used to drive the
     and 30 pF, with corresponding Q factors of 100 at 1 GHz.                                      modulators of a transceiver. The bandpass filter itself is housed in
                                                                                                   a thin, small, and leadless package with dimensions of only 2.0 x
     Bandpass filter with mode conversion                                                           1.3 x 0.4 mm[3].
        With the extended S technology, filters with low insertion loss                                Coils and autotransformers were considered in the simulation tool
     and high harmonic suppression can be designed. An integration of                              by de-embedded S-parameter measurements and a Spice netlist
     filter elements and balun on-chip replaces a high number of exter-                             generated by a simulation tool, respectively. The parameters of the
     nal SMD components, leading to reduced board space and lower                                  autotransformer model are extracted from its geometrical structure
     assembly costs. Further advantages compared to discrete solutions                             by applying a numerical solver for the electric and magnetic fields.
     are smaller component tolerances of these integrated devices and                                 Figures 3 and 4 show the insertion loss versus frequency and
     a reduced assembly error rate.                                                                the common-mode suppression of a harmonic PCN/PCS filter,
        The schematic of the implemented PCN/PCS bandpass filter                                    respectively. The insertion loss within the passband (1710 MHz
     (1710 MHz to 1910 MHz) with mode conversion from differential to                              and 1910 MHz) is about –2.5 dB, with a corresponding ripple of
     single ended is shown in Figure 2. The filter consists of a symmetrical                        only 0.2 dB.
     filter design based on several optimized LC resonators. The mode                                  The suppression of the third harmonic is below –40 dB and in


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              ��

                                                                               which is only valid        the filter sub-circuits (LD || CD), a simple ESD
              ��                                                               up to half of the self-    model was developed. First of all, parasitic
                                                                               resonance of the auto-     board elements are neglected so that only
                                                                               transformer itself.        the parameter for HBM and the filter sub-
                                                                                                          circuit are considered. For this case, a linear
                                                                               ESD model                  differential equation of third order with
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                                                                                   EOS and ESD dam-       the general solution is obtained.
                                                                               age affects device                                                      (1)
                                                                               functionality and RF
        ���                                                                    performance. There-
                                   �������������                               fore, it is important to      x(t) = (UCM, UCD, ILD)T is the state vector
                                   ����������                                  make thorough inves-       corresponding to the state variables of the
        ���                                                                    tigations concerning       electrical network, where A represents the
             ��           ���          ����       ����          ���
                                                                               ESD protection, es-        system matrix.
                                                                               pecially for the MIM                                                  (2)
                                     ���������                                 capacitors, in order to
                                                                               guarantee the required
  Figure 8. ESD simulation for the bandpass filter with U0 = 3 kV and
  different values for the capacitors (HBM).
                                                                               ESD robustness.
                                                                                   Figure 5 shows a
 good agreement with the simulation results.          complete ESD simulation setup consisting
     Using an autotransformer instead of a of the implemented ESD model (HBM, MM
 simple LC balun leads to an improved com- or CDM), the parasitics of the measurement
 mon-mode suppression of -30 dB in the setup, and the device under test (DUT).
 frequency range between 3 GHz and 6 GHz. The investigations are focused on HBM, with
 However, the simulation and measurement corresponding values for RM = 1500 , CM =                          With the initial conditions for current
 results differ at higher frequencies because 100 pF, and LM = 0 nH 5.                                    and voltages, the vector x 0 is given by
 of the implemented autotransformer model,               In order to investigate the ESD protection of    (U0 , 0 , 0)T.
                                                                                                             Figure 6 shows the simulation results
                                                                                                          of equation 1 for the voltage drop at the
                                                                                                          capacitor CD (1 pF) for different L values
                                                                                                          ranging from 1 nH to 30 nH. Improved ESD
                                                                                                          protection for the capacitor CD can be achieved
                                                                                                          with smaller values of the inductance LD.
                                                                                                          Additionally, the inductor LD of the LC resona-
                                                                                                          tor determines the pole of the transfer function
                                                                                                          and is, therefore, important for the overall
                                                                                                          filter performance.
                                                                                                             To investigate the complete ESD setup,
                                                                                                          the board parasitics must be determined
                                                                                                          and included in the circuit simulator. The
                                                                                                          parameter extraction for the board parasitics
                                                                                                          is carried out in the following manner: First,
                                                                                                          the measurement equipment is characterized
                                                                                                          by current discharge for different terminations
                                                                                                          (0  and 500 ) for the DUT, with which
                                                                                                          the board elements can be determined.
                                                                                                          Figure 7 shows simulated and measured results
                                                                                                          for a shorted device under test.
                                                                                                             Transient simulations for the PCN/PCS
                                                                                                          bandpass filter with internal active and pas-
                                                                                                          sive elements were carried out with the circuit
                                                                                                          simulator (ADS) from Agilent. Figure 8 shows
                                                                                                          the simulation results of the voltage drop
                                                                                                          for several MIM capacitors and reveals the
                                                                                                          endangered element for ESD damage.

                                                                                                          Conclusion
                                                                                                             The performance of a monolithic inte-
                                                                                                          grated PCN/PCS RF bandpass filter with mode
                                                                                                          conversion, integrated dc power supply and
                                                                                                          ESD protection was discussed. Good RF
                                                                                                          filter performance in combination with ESD
                                                                                                          protection was achieved. The figure of merits


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RF Design   www.rfdesign.com   27
     of the RF filter are the insertion loss within       4. B. Eisener, K. Büyüktas, A. Rügemer,     9-11 April 2003.
     the passband of –2.5 dB, the third harmonic     H. Kebinger, and C. Hertzum, “Mono-                5. S. Hyvonen, S. Joshi, and E. Rosen-
     suppression of –45 dB, the common mode          lithic, Integrated High-Q Inductors for RF      baum, “Cancellation Technique to Provide
     suppression of –40 dB, and the ESD robust-      Applications,” 2003 Topical Meeting on          ESD Protection for Multi-GHz RF Inputs,”
     ness of more than 3 kV. RFD                     Silicon Monolithic Integrated Circuits in RF    Electronic Letters, vol. 39, No. 3, pp. 284-285,
                                                     Systems, Grainau, Germany, pp. 107-110,         February 2003.
     Acknowledgment
        The authors thank W. Zimmermann for
     his helpful discussions.

     References                                                                     ABOUT THE AUTHORS
        1. N.J. Pulsford, J.T.M. van Beek,                 Harald Böhm is a staff engineer at Infineon Technologies AG in Munich, Germany.
     M.H.W.M. van Delden, and A. Boogaard,               He holds a Dr.-Ing. degree from Technical University of Munich.
     “Passive Integration On Si for RF Circuits            Herbert Kebinger is an RF design engineer at Infineon Technologies AG in Munich,
     In Wireless Applications,” Philips Research,        Germany, where he has been involved in application and design engineering in the
     IEEE-MTT-S, pp. 1897-1990, 1999.                    areas of RF power modules and semiconductors. He is a graduate of the FH München
        2. Dong-Wook Kim, In-Ho Jeong,                   Electrical Engineering.
     Ho-Sung Sung, Tong-Ook Kong, Jong-Soo                 Reinhard Losehand is an innovation manager in the High-Performance Active and
     Lee, Choong-Mo Nam, and Young-Se Kwon,              Passive Integration group at Infineon Technologies AG in Munich, Germany. He
     “High-performance RF Passive Integration            holds a Dipl. Phys. from Technische Hochschule Munich.
     On Si Smart Substrate,” Telephus Inc., IEEE-          Heinrich Heiss is responsible for technical marketing of silicon discrete components
     MTT-S, pp. 1561-1564, 2002.                         at Infineon Technologies AG in Munich, Germany. He holds Master and Ph.D. degrees
        3. R. G. Wagner, J. M. Soden, and C. F.          from Technical University of Munich.
     Hawkins, ”Extent and Cost of EOS/ESD
     Damage In an IC Manufacturing Process,”
     EOS/ESD Symposium, Lake Buena Vista,
     USA, pp. 49-55, 1993.




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