Cadence and Hspice Tutorial Jeff Marks email@example.com Introduction This tutorial was written to bring students of ECE733 up to speed with the tools that will be used for class projects and homework. Proficient use of Cadence and Hspice will allow you to complete the projects and homework quickly, and will make the class more fun. Practice is really the only way to achieve such proficiency. There are probably an infinite number of tricks and short-cuts to make the design process easier, or at least enough to fill a small book. No tricks or short-cuts are covered in this tutorial and it will be up to you learn more about the tool and how you can use it better for your needs. I encourage you to share your findings with the class discussion group. There are two conventions that I use throughout this tutorial. To specify a menu option that you would choose with at GUI interface I use the following: (Window name) Menu submenu Also, each action that you should perform whether it is an execution in the xterm window or the selection of a menu option is highlighted in the color blue. Setting up your account By the end of the semester you will have many files related to your 733 projects and homework, it would be a good idea to start off by organizing everything into one directory. Create the directory from the “xterm” window on any of the Sun machines in one of the computer labs. eos% mkdir ECE733 eos% cd ECE733 Now set up cadence in this directory eos% add cadence This should cause some text to be output in your xterm. This text describes some of the various software packages within cadence. From any one package you should be able to load another, so it really doesn’t matter which one you choose. I like to load everything at once, so I choose “msfb” eos% msfb & Depending on what kind of machine you are on, and how many people are using cadence at that time you have to wait a few seconds before the program appears on your screen… when it does you should see The CDS.log window. You should also at this point see the library manager window on you screen. If you don’t see the library manager window, you can start it from your CDS.log window. (CDS.log) Tools Library Manager The Library manager should look like this: Now your account is set up and you are ready to create your design. Creating a design in Cadence The first step in creating a design is to specify the library you want to use. The library corresponds to what process will be used if it were to be fabricated. For the purpose of this class we will use the ‘tsmc’ process that uses 4 layers of metal and 2 poly. In order to create a library, do the following from the library manager: (Library Manager) File New Library This should cause the “Create Library” window to appear. 1. Choose a name for your library. I chose “733_tutorial”. 2. Leave the path blank. 3. Choose “attach existing tech library” and select “TSMC .40u CMOS (4M, 2P, HV FET)” The Create Library window should look like this when you are done. click on the “Ok” button and the window should close. Now, if you look back at your Library Manager window you should see that a new library called “733_tutorial” has been created. Click on the name of your library, it should become highlighted. Once the name of you library is high- lighted, you will create a schematic view for your design. (Library Manager) File New Cell View The Create New File window should pop up. Choose a name for the cell. Since we are going to build an inverter, name it “inv”. The window should look like this when you are done. Click the “Ok” button. This should cause the “Schematic Editor” window to open, and your “Library Manager” should now look like this: Now it’s time to start designing the inverter circuit. At first it may be easier to use the menus and icons that appear within the “Schematic Editor” window, but you will be much better off and have more fun the faster that you learn the “hot keys”. Pressing a “hot key” will have the same effect as choosing a menu option or icon, but it will save you the trouble of moving the mouse around. You can see the hot keys every time you select a menu option, the hot key will be listed next to your selection. Let’s start by placing a PMOS transistor. In the “Schematic Editor” window: (Schematic Editor) add instance This should cause the “Component Browser” window to appear In the “Component Browser” window, (Component Browser) Library Analog Parts Now scroll down to until you see the P_Transistor selection (Component Browser) P_Transistors pmos When you move your mouse back to the “Schematic Editor” window the picture of a PMOS transistor should appear. You can place this transistor by clicking the left mouse button. Place 1 instance of a PMOS transistor. You will notice that even after you place the transistor, there will still be a picture of a PMOS transistor attached to the mouse pointer.. This is usefull when you want to place multiple devices. To get rid of that floating PMOS transistor attached to the mouse pointer simply press the “Esc” key on the keyboard. Your schematic should look like this: Now lets take a minute to practice manipulating objects that have been placed. Place the mouse pointer over the PMOS transistor and click the left mouse button once. You should notice that the PMOS transistor is highlighted by a white box, and the mouse pointer now looks like an arrow. If you hold the left mouse button down while the mouse pointer is in this white box you will be able to move the PMOS transistor around the screen. Also, while an element is highlighted by the white box, you are able to edit the properties of that element. Since the mobility of the electron is greater than the mobility of the hole, lets make the PMOS transistor twice the size of the NMOS. Let’s change the width of the PMOS to be 1.2u which is 2X the defult value of 600n. (Schematic Editor) Edit Properties Objects This will cause the “Edit Object Properties” window to open Change the value in the “Width” text field to be 1.2u Click on the “Ok” button in the “Edit Object Properties” window. Now lets place the rest of the elements in the circuit Add 1 NMOS transistor: (Component Browser) N_Transistors nmos Add two global VDD! nodes (Component Browser) Supply_Nets vdd Add three global GND! Nodes (Component Browser) Supply_Nets gnd Add a DC power source between VDD! And GND! (Component Browser) Voltage_Sources vdc Use the prcess we used on the PMOS to change the DC voltage of the is source to 3.3 Volts Add a input to the circuit.. since this is an inverter lets make the input a square wave. (Component Broswer) Voltage_Sources vpulse Specify the following parameters of this source: Voltage 1 = 0V Volgate 2 = 3.3V Delay time = 20n S Rise time = 100p S Fall time = 100p S Pulse width = 20n S Period = 40n S Connect all the components together using wires. Use the picture below as a guide You can either use the “narrow wire” icon on the left side of the “Schematic Editor” window or you can use: (Schematic Editor) Add Wire (narrow) Now use the “Wire Name” icon in the lower left hand corner of the composer window to name the your wires. Name one wire “input” the other “output” Your final circuit should look like this. Now you should “Check and Save” your design. (Schematic Editor) Design Check and Save Look at your “CDS.log” window. You should see a message that says: “Schematic check completed with no errors” “733_tutorial inv schematic” saved If you do have some errors or warnings the CDS.log window will give a short explanation of what those errors are. Errors will also be marked on the schematic with a yellow or white box. Errors are bad, and must be fixed otherwise your circuit will not simulate. When you find a warning it is up to you to decide if you should fix it or not. Most of the time I get warnings when I leave a node floating or have wires crossing that are not connected. Just make sure that you know what effect each of these warning will have on your circuit when you simulate. Now that your circuit has been designed, it is time to simulate your design. Design Simulation A couple of words about simulations here. This tutorial covers the use of Cadence as a graphical tool for circuit design and the use of Analog artist to create an Hspice netlist of your design. All simulations will be done using Hspice. There is a way, although not covered by this tutorial, to perform all your circuit simulations within the Analog Artist tool. This is done using the “SpectreS” Simulator. SpectreS is a very powerful tool, and mastery of the SpectreS environment makes the design process much easier and faster than using Hspice. SpectreS however is much more difficult to learn, the documentation is bad and in many cases things are non-intuitive. SpectreS is my preferred method of simulation, and I encourage anyone interested to give it a try. So.. to continue where we left off.. you should now have a schematic of your inverter and a 3.3V dc power supply. Now we should invoke the “Analog Environment” tool to begin the simulation process. (Schematic Editor) Tools Analog Environment This should cause the “Analog Environment” window to open. In the upper right hand corner of the “Analog Environment” window you should see the words: “Simulator: hspiceS” If you see anything else, then you need to change your simulator to be hspiceS (Analog Environment) Setup Simulator/Directory/Host.. This will cause a “Choosing Setup” window to open. In this window choose (Choosing Setup) Simulator hspiceS Click on the “Ok” button in the “Choosing Setup” window. Your Analog Environment window should now look like this: Now it’s time to generate an Hspice netlist of your circuit design. This can be done from the “Analog Environment” window. (Analog Environment) Simulation Netlist Create Final This should cause a window to open that displays the text of your netlist. Since you can’t edit the information in this window, you must save it to a text file. Go to the window with your netlist: (Netlist Window) File Save As Now choose a file location for the file. You must specify the whole path to the directory you want to put it in and the name of the file. Let’s call it “inv.sp”. So in the “File Name” blank, for example, I would type in: /afs/eos.ncsu.edu/users/j/jemarks/CLASS/ece733/hspice/inv.sp With the text editor of your choice, open the file “inv.sp” for editing. I use “Nedit”. It should look something like this: * # FILE NAME: /AFS/EOS.NCSU.EDU/USERS/J/JEMARKS/CADENCE/SIMULATION/INV/ * hspiceS/schematic/netlist/inv.c.raw * Netlist output for hspiceS. * Generated on Jan 15 23:09:50 2001 * global net definitions .GLOBAL VDD! * File name: 733_tutorial_inv_schematic.s. * Subcircuit for cell: inv. * Generated for: hspiceS. * Generated on Jan 15 23:09:50 2001. V0 VDD! 0 3.3 M1 OUTPUT INPUT 0 0 TSMC35N L=400E-9 W=600E-9 AD=600E-15 AS=600E-15 +PD=3.2E-6 PS=3.2E-6 M=1 V1 INPUT 0 PULSE 0.0 3.3 20E-9 100E-12 100E-12 20E-9 40E-9 M0 OUTPUT INPUT VDD! VDD! TSMC35P L=400E-9 W=1.2E-6 AD=1.2E-12 AS=1.2E-12 +PD=4.4E-6 PS=4.4E-6 M=1 .lib "/ncsu/cadence/local/models/hspice/tsmc35/lmm0355v.l" TT .lib "/ncsu/cadence/local/models/hspice/tsmc35/lmm0355v.l" NMOS .lib "/ncsu/cadence/local/models/hspice/tsmc35/lmm0355v.l" TT .lib "/ncsu/cadence/local/models/hspice/tsmc35/lmm0355v.l" PMOS * Include files * End of Netlist .TEMP 25.0000 .OP .save .OPTION INGOLD=2 ARTIST=2 PSF=2 + PROBE=0 .END This file looks a lot more complicated than it should be. The act of using the “Analog Environment” to create the netlist placed many comments in the file that make it look more cluttered. Two important things I would like to point about this netlist. Hspice code will always interpret the first line of the file as a comment. Make sure that the first line of your code IS a comment, because if the first line is part of the code for your circuit, it will not be read correctly. The second thing I would like to point out is the “.END” statement at the end of the file. Your file will not finish execution if you do not have this “.END” statement at the end of the code. We now have to edit this Hspice code to perform the correct analysis of the circuit. We will have to make two changes. 1) Change the “.OPTION” statement so that it reads: .OPTION INGOLD=2 ARTIST=2 PSF=2 DCCAP POST + PROBE=0 2) Add a transient analysis statement before the “.END” The last part of your file should now look this: .OPTION INGOLD=2 ARTIST=2 PSF=2 DCCAP POST + PROBE=0 .tran 0.1n 200n .END Running an Hspice simulation In the same directory as your “inv.sp” file you must add Hspice to your environment, then run the simulation. eos% add hspice eos% hspice inv.sp This will cause a some output text to be sent back to your screen. In the event that you have an error with your simulation you will need to read through that output to find out what the error is. It will be faster to run your simulations and debug errors in the future if you redirect this output to a file by using the command: eos% hspice inv.sp >! Outputfile If your simulation ran without errors then your output should say: lic: Release hspice token(s) >info: ***** hspice job concluded real 10.5 user 3.9 sys 1.0 HSPICE job inv.sp completed. Tue Jan 16 15:35:40 EST 2001 If your simulation had errors it will look like this: lic: Release hspice token(s) >error ***** hspice job aborted real 2.3 user 0.1 sys 0.1 HSPICE job inv.sp completed. Tue Jan 16 15:37:07 EST 2001 Viewing your waveform Once your simulation runs without errors, we can view the waveform that was generated. Hspice doesn’t have any built-in waveform viewer, so we will have to use the “Awaves” software package for that. In the same directory as your “inv.sp” file, start the “Awaves” program. eos% awaves & Within awaves you must now open the “inv.sp” design. (Awaves) Design Open This should cause the “Open Design” window to appear. You should see a list of all the Hspice files in your directory listed in that window. Double click on the “inv.sp” name. This should cause the results browser window to open. The results browser window will list the results of each of the simulations that you ran on a given Hspice file. For example if you did a frequency sweep analysis as well, it would be listed in this window. Click on the “Transient: *file name: /afs/…… “ That should display the names of each of the nodes of you circuit in the “curves” section of the “Results Browser” window. Your “Results Browser” window should look similar to this: Double clicking on any of the nodes listed in the “curves” section of the window will cause the waveform in the time domain to be displayed in the main Awaves window. Double click on input and output Now go back to the Awaves window. You should see both waveforms overlaid. You will be better able to observe the behavior of this circuit by changing the viewing mode to “stacked” instead. (Awaves) Window Stack/overlay mode Your main awaves window should now look like this You should be able to see how the output of the circuit is the opposite of the input. This concludes the tutorial.
Pages to are hidden for
"Cadence and Hspice Tutorial"Please download to view full document