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Xilinx Platform Studio tutorial
Per.Anderson@cs.lth.se
March 17, 2006
This tutorial intend to show you how to create an initial system configuration.
From Xilinx Platform Studio(XPS) version 6.1 this has been significantly sim-
plified due to the system creation wizard (the current version is 8.1).
note To save disk space you can remove temporary files from the project by
Project→Clean All Generated Files .
1 Creating a system architecture from scratch
This tutorial will guide you through the creation of a new design using Xilinxs
Platform Studio(XPS). XPS is a GUI that helps you to specify your system, i.e.
• which processors, memory blocks and other FPGA IPs(peripherals) to use
• how the different IPs are connected
• the memory map, i.e. for addresses for memory mapped IO/peripherals
XPS also interface the tools used throughout the whole design flow. In this
tutorial you will create a system consisting of three components, a MicroBlaze
processor, a uart(serial port), and a memory block. The system functionality is
just to write a message to the uart.
1.1 Start Xilinx Platform Studio(XPS)
You can find the program in Windows start menu. start→programs→
Xilinx Platform Studio 8.1i→Xilinx Platform Studio
1.2 Create a new design
When you start XPS there will be a dialog from which you can start the base
system builder wizard. It can also be launched from Files→New Project. . .
In the first dialog, specify the project location and name(the path cannot contain
spaces). XPS will create a lot of files in the project directory, so create a new
empty directory. Click OK, select “I would like to create a new design”, Click
Next. Set the target board as follows:
Board Vendor Memec Design
Board Name Virtex-II V2MB1000 Development board
Board Revision 3
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Click Next. MicroBlaze is the only processor option, so click Next. Keep the
100MHz clock, but you can remove the debug interface. During the labs it is
recommended to increase the size of the local memory to 16 kB. To continue
click Next.
At this step you choose which board components (leds, buttons et.c.) you
want to create interfaces for. Keep the leds and buttons, but skip the DDR SDRAM
on the second page, next. You do not need extra peripherals for now, next. Keep
the RS232 as STDIN and STDOUT. This is where the C/C++ IO functions,
i.e. printf() and scanf(), read/write its data. Now you are done, click next
in the remaining dialogs, Generate and Finish. After this you want to “Start
using Platform Studio”.
You have created your initial system. All you need to do now is compile
and run logic synthesis, as will be explained later. Now is a good time to ex-
plore XPS a bit. Lets start by looking into the hardware architecture generated
for you. It can be visualised by selecting Project→Generate and View
Block Diagram . A block diagram will appear in the frame to the right.
Do not worry if you do not get all abbreviations. Here is a short list of some:
LMB Local Memory Bus CPU ↔ memory bus (point to point bus)
OPB Open Peripheral Bus CPU ↔ peripheral bus (shared bus)
GPIO General Purpose IO glue logic to read/control the buttons/leds on the board
RS232 serial port used for text input/output of your application
An extended view which also contains more information about the components
is created by selecting Project→Generate and View Design Report .
There are three main frames in the XPS window. Lets start with the left
frame. It contains three tabs Project, Applications, and IP Catalog. In the
Project tab you find general system files as well as log files, in the Application
tab you find the software parts of your system, and finally in the IP Catalog
you find a tree containing all IP components you can use to build your system.
Select the Application tab. There are two projects, one for memory test and
one for peripheral test. The projects which are not active (downloaded) have
a red cross in their icon. Right click on a project and select Mark to Initialize
BRAMs to activate it. By right clicking you can also compile (build) individual
software projects. There can only be one main function for every processor so
do not activate several projects that contain a main function.
The frame to the right in the XPS window are used for viewing and editing
documents. This is where you opened the block diagram earlier. Select the
System Assembly tab (the tabs are in the bottom of the frame). This view
contains a list/tree of your system components and their connections. There
are three busses. The two blue are LMBs connecting the processor and the
memory controller, one is used for instruction fetch (ilmb) and the other is
used for data read/write (dlmb). The red lines are not a bus, but illustrate
the connection between the memory controller and the memory block. Finally
the green line is an OPB connecting the processor and the peripherals. All
peripherals are memory mapped. To connect/disconnect a component to/from
a bus click on the circles. Double click on a component to get a dialog in which
you can change its parameters.
2
2 Building your system
XPS keeps track of all dependencies in your system and will automatically
rebuild the parts which is affected if you change a parameter, or edit a file.
You can select Device Configuration → Download Bitstream and the
tool will build the whole system and download it to the FPGA. This is done in
several step which will be explained here.
First lets look at the software part. In a system there are two types of
software, libraries and user programs. XPS automatically configures and gen-
erates the library code. To do this select ( Software→Generate Libraries
and BSPs ). This step also generates header files containing symbolic names
for memory mapped peripherals. Run this step and look at your software
projects (the Applications tab in the left frame). Click on the + left of pro-
cessor:microblaze 0 in your active project. There you will find a include file
(xparameters.h) with symbolic names of all memory mapped peripherals. Use
the symbolic names in your C code, so you can change the memory layout later
without changing the C code. Header files are also generated under Headers
(the same level in the tree as processor:microblaze 0 ). Here you find functions
specific for your peripherals, for example functions to read/write from/to GPIO.
Note, the standard C function printf generates huge libraries, which will not
fit in the memory. Instead use print, or xil printf function to print text.
xil printf is similar to printf, but much smaller and lacks some functions,
i.e. floating point support.Compile the user programs by selecting Software
→ Build All User Applications .
Lets move on to the hardware. Hardware synthesis is done in several steps
(create the logic circuit (netlist), create the FPGA configuration (bitmap)), but
you do not need to worry about this. Simply select Hardware→Generate
Bitstream and everything will be generated automatically for you. This will
take long time, up to 30 minutes or even more. Fortunately the hardware is
independent of the software, so when you change your C files this step do not
need to be rerun. During the hardware synthesis the tools use a User Constraint
File (UCF), which can be found in the left frame in the Project tab. This file
binds external ports in the design to physical pins on the FPGA. It is important
that the names in the design are the same as in this file, so do not rename the
external ports. Also if you add or remove external pins this file must be edited,
i.e. removing a GPIO peripheral.
The last step before dowloading to the FPGA is to merge software binaries
and the bit stream from the hardware synthesis, run Device Configuration→
Update Bitstream . This places the executables in the block ram.
2.1 Run the final implementation on the FPGA
When you run your system it is nice to see the output, i.e. the result of print().
The text is forwarded to the serial port and to monitor this we use the windows
hyperterminal start→programs→
accessories→communications→hyperterminal . Give it a name and chose
com1 in the Connect using frame. Use port settings according to the uart
parameters:
3
Bits per second 9600
Data bits 8
Parity None
Stop bits 1
Flow control None
This is the same as the configuration of the RS232 peripheral, feel free to change
the speed. Be aware, if you change the peripheral parameters you must run
hardware synthesis again.
Now you are about to run the system and you need a FPGA board, connect it
and turn it on. Download the bitstream, Device Configuration→Download
Bitstream . Now the system starts to run. It blinks some leds and prints some
test messages in the hyperterminal (this assumes you are running the peripheral
test application). Press the button labelled RESET on the FPGA board to
restart the program (will give a new printout).
XPS keeps track of most dependencies among the source files, so if you
change anything downloading to the FPGA will rebuild all parts that are af-
fected. You can force XPS to rerun a step by choosing Software→Clean
Software and Hardware → Clean Hardware . This removes all generated
files, so it also saves disk space.
3 That was simple, what is next
Now you have created and run your first system. Use the time on the first
lab to explore the XPS program. The following labs will contain much more
work and you will not be able to finish unless you have prepared before, i.e.
created the system. In the next lab you will need a system consisting of a
MicroBlaze, a RS232 (uartlite) and a timer (opb timer). If you have time you
can start to create this system. Read the documentation of the timer. To find
the documentation, right click on it in the IP Catalog tab in the left XPS frame.
4 Dual processor and FSL communication
Lets continue by creating a dual processor system, this will be needed in lab 3.
Start by creating a system containing only one MicroBlaze and a RS232(uartlite)
using the basic system build wizard (or continue working with the system you
created above). To add a second processor you need to manually duplicate all
components and parameters in the processor/memory subsystem. Look at the
block diagram to see how the memory and CPU are connected (CPU ↔ LMB ↔
LMB controller ↔ memory block) The memory block are dual ported, so you can
connect both the instruction and data bus to the same memory block. To add IP
components to your design select the IP Catalog tab in the left XPS frame. Se-
lect the System Assembly tab in the right XPS frame. To add an IP block, right
click on it in the IP Catalog tab and select Add IP. I then appears in the System
Assembly tab. There you can rename the instance name. You need to add the
following: 1 Processor→microblaze, 1 Memory Block→bram block, 2 Memory
Controller→lmb bram if ctrl, 2 Bus→lmb v10, and 2 Bus→fsl v20).
Connect the components you just added. The processor should also be
connected to the OPB bus. This is done in the System Assembly tab. At the
4
top of the window there is a frame named Filters. Make sure the Bus Interface
is selected. All busses are shown to the left (vertical lines). Simply click on
a circle/box to connect a component instance to a bus. You can only connect
ports on an instance, so click on the + to see the components ports first.
Fast Serial Link (FSL) is a point to point bus which will be used to com-
municate between the processors. To use them you must add FSL ports to the
processors. To do this, double click on the processor, select the Bus Interface
tab and change Number of FSL Links to one. Connect the processors to the
FSL busses. A FSL is directed, so one processor should write (master) and the
other should read (slave) on the same FSL. To have communication in both
directions you need two FSLs. A processor should be master on one, and slave
on the other.
You also need to connect the clk and reset signals. Change the filter from
Bus Interface to Ports. Connect all four busses you added to the nets sys clk s
and sys rst s (click on No Connection and select the appropriate signal).
There is one more parameter you need to change for all busses. Double click
on them and set External Reset Active High to 0. Do this for all four busses
you added.
Lets move on to the memory layout of the newly added processor. Change
the filter from Ports to Addresses. The two new LMBs have unknown address
space, set Base Address to 0x00000000 and High Address to 0x00007fff. This
gives a memory size of 32K.
Now the hardware is set up correctly. lets continue with the software. You
must direct STDIN or STDOUT of the new processor to the serial port. Select
SoftwaretoSoftware Platform Settings . Select the new processor, under
OS and Libraries assign STDIN and STDOUT to RS232.
Finally you also need a program to run on the second processor. In the left
frame, select the Applications tab. You should have two projects. Lets run one
on each processor. To select the target processor for a project open its tree
structure (click on the + to the left). right click on Processor:. . . and select
the target processor. Make sure both projects Mark to Initialize BRAMs (if not
right click on Project:. . . .
Thats all you need to do. Run hardware synthesis, software compilation,
and download to the FPGA.
4.1 FSL communication
When both CPUs are running it is time to do some useful things. Lets make
them talk to each other. There are macros for reading and writing from/to the
FSL. To use them include the mb interface.h. The commonly used macros are
microblaze bwrite datafsl(data, port) and microblaze bread datafsl(data,
port). Both are blocking, data is the data to read/write. For the read opera-
tion it must be a variable, which then will be updated to contain the value read,
port is the FSL port number, starting from 0. Example program (assuming
there is a FSL in both directions):
5
MicroBlaze 0:
#include <mb_interface.h>
#include <xutil.h>
int main(void){
int i = 0;
while(i<10){
microblaze_bwrite_datafsl(i, 0);
microblaze_bread_datafsl(i, 0);
xil_printf("pong %d\n\r", i);
}
}
MicroBlaze 1:
#include <mb_interface.h>
#include <xutil.h>
int main(void){
int i;
while(1){
microblaze_bread_datafsl(i, 0);
i++;
xil_printf("ping %d\n\r", i);
microblaze_bwrite_datafsl(i, 0);
}
}
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