High Power, Broadband, Linear, Solid State Amplifier 15th Quarterly Report under MURI Contract No. N00014-96-1-1223 for the period March 1, 1999 — May 31, 2000 Sponsored by: Office of Naval Research John Zolper, Monitor Submitted by: Lester F. Eastman, P.I. Cornell University School of Electrical and Computer Engineering 425 Phillips Hall Ithaca, New York 14853-5401 Tel:: (607)255-4369 Fax: (607)255-4742 e-mail: email@example.com June 2000 Table of Contents I. II. DEVICES * OVERVIEW — Lester F. Eastman * A. Summary — Lester F. Eastman * * * * B. Device Processing - Roman Dimitrov and Vinayak Tilak C. Circuits and Device Modeling - Bruce Green and Hyungtak Kim D. Broadband GaN Amplifier Design — Kevin Webb - Purdue University III. THEORETICAL AND NOISE STUDIES A. Summary — Lester F. Eastman B. Noise Studies - Michael Shur, RPI IV. MATERIALS * A. Summary — Lester F. Eastman * * * * B. Epitaxial Growth of AlGaN/GaN HEMT Structures by OMVPE - J.A. Smart, T.R. Prunty, and J.R. Shealy * C. MBE growth of AlGaN/GaN HFETs - William J. Schaff * 1. OVERVIEW — Lester F. Eastman Although some current slump remains for undoped HEMT’s on sapphire, and excess gate and drain leakage remains in these devices on SiC substrates, progress has been made in devices, circuits, noise, and materials growth. Passivation optimization, using Si3N4 deposition on exposed surfaces, is underway to minimize the current slump. Cascode power amplifiers are being studied experimentally, including push-pull type using hybrid balun circuits. To investigate power limits, both pulsed performance and dynamic load line measurements have been studied. 6 W/mm pulsed on sapphire have been gotten, along with 5 W/mm C.W. on SiC. 1/ƒ noise dependence on gate current and drain voltage have been studied, and the use of an insulator under the gate has been made to substantially lower the gate leakage current. The OMVPE growth of AlGaN/GaN structures on thin (150 µm) sapphire has been initiated, in order to double the normalized heat dissipation limit, to reach 5 W/mm. The pretreatment of SiC substrates, using bakes in H2 at 1500°C, has been done in preparation for improved HEMT wafer growth by MBE. II. DEVICES 1. Summary — Lester F. Eastman Earlier efforts showed the depletion effects of thin Al.3Ga.7N barrier with 1.6 V surface potential, along with the reduction of this depletion by passivation with Si3N4 on the surface. These passivated undoped HEMT devices have a significant reduction in current slump, along with related improvements in power density, reaching ~ 5 W/mm CW on SiC substrates. Pulsed devices on sapphire have now reached ~ 6 W/mm, and dynamic load lines have been measured at microwave frequency. A study has been made to improve the ohmic contact morphology, as well as the transfer resistance. The composition of the layered metal, and the anneal cycle have been optimized. Cascode power amplifier circuits have been modeled, fabricated and initially tested, including a novel push-pull hybrid circuit that has baluns for improved performance. B. Device Processing - Roman Dimitrov and Vinayak Tilak This last quarter a systematic study of ohmic contacts were done and the results are as follows. An important factor in the performance of these HFETs is the quality of the ohmic contacts. It is desirable to have ohmic contacts with contact resistances < 1 -mm, as this reduces the knee voltage and thereby improving the efficiency. As these HFETs are high current structures which are used in high power applications, it is good to minimize the contact resistance to decrease heating of the device. Another factor in the quality of the ohmic contact is its morphology and edge acuity. Because of the high temperatures needed to make ohmic contacts in this system, the morphology and edge acuity of the contact is poor. Good edge acuity is critical for reducing the source gate spacing while keeping the source drain spacing constant in HFETs. This improves the breakdown voltage of the device, which is useful for high power applications. We have shown that ohmic contacts have good morphology and contact resistance (Fig (1) and Fig (2)) when Ti/Al ratio is around 0.6 and when the contact has a layer of gold on it. We need lower temperatures and fewer anneal cycles to get good ohmic contacts if the first layer of Ti is thin (Fig 3). This points to the reaction of Al with the surface as an important step for getting better ohmic contacts. Also, we have shown that gold, although not essential in getting an ohmic contact, reduces the contact resistance significantly. The morphology of the ohmic contact is adversely affected only if Ti/Al ratio < 0.3 or if Ti/Al/Au is allowed to alloy at 8000C.So, although Ti (200Å)/Al (1000Å)/Ti (400Å)/Au (500Å) has the best contact electrically (Rc of 0.45 mm), the better trade off is to have Ti (600Å)/Al (1000Å)/Au (500Å) which gives Rc of 0.75 mm but also has excellent morphology and edge acuity. Figure 1 Minimum contact resistances measured vs Ti/Al ratio showing a minima of contact resistance around 0.6 -mm, however the least measured resistance is for a Ti/Al/Ti/Au structure with Ti/Al ratio of 0.6 Figure 2 RMS roughness is negligible for Ti/Al ratios > 0.3, but is high for Ti/Al/Ti/Au structure even though the Ti/Al ratio is > 0.3 Figure 3 Time taken for minimum ohmic contact values to be achieved as function of the Ti/Al ratios. Note that the temperature of annealing is 800C for the first 90s and 900C for the next 60s References Electric and Morphology Studies of Ohmic Contacts on AlGaN/GaN, V.Tilak, R.Dimitrov, M.Murphy, J.Smart, W.J.Schaff, J.R.Shealy, and L.F.Eastman, Proc. Of MRS Spring 2000 (to be published). C. Circuits and Device Modeling - Bruce Green and Hyungtak Kim Amplifier Fabrication Circuit results for this quarter include design, layout, and fabrication of a 2mm cascode power amplifier shown in Figures 4 and 5. The amplifier produced > 10 dB of small signal gain up to 6.5 GHz with good gain flatness. The main limitation in the small signal response arises from a DC short in the common gate biasing due to gate alignment and a small layout error that was discovered in one of the MIM capacitors. These problems have been overcome and subsequent run has been processed up to the 1st metalization level with excelent device yield. Experimental results on the second run are expected July 1. In the next quarter, pulsed RF testing of these and subsequent circuit runs will be addressed. Figure 4: Layout and schematic for 2 mm wideband cascode power amplifier MMIC. Figure 4: SEM photo of completed 2 mm cascode amplifier of Figure 1 (die size 3.2 X 1.6 mm). (a) (b) Figure 5: Measured (a) and predicted(b) S-paramters for 2 mm wideband cascode power amplifier MMIC. Measurement of RF Dynamic Loadlines Device modeling/characterization results include measurements and prediction of timedomain dynamic loadlines for passivated sapphire-based devices under pulsed RF conditions as shown in Figure 6. This figure shows the 8 GHz dynamic loadline for an MBE-grown device at a bias voltage of 25 V. The dynamic loadlines are determined using the microwave waveforms measured with a microwave transition analyzer (MTA) used in the place of an RF power meter on a newly established 4-26.5 GHZ loadpull system. The RF waveforms at the device plane are ascertained from the MTA using a digital filter representation of the S-parameters of the probes, tuner, and attenuator that separate the MTA from the device plane. Through these measurements, it has been observed that the RF knee voltage on some of the devices measured rises with applied drain bias. Work is in progress using this data in conjunction with pulsed IV data to obtain a physical model explaining this phenomena so that it can be eliminated through further optimization of the processing and/ or materials growth. Figure 6: Measured pulsed 8 GHz time domain RF waveform for a 0.3 X 200 µm device grown by MBE at a bias point of 25 V. D. Broadband GaN Amplifier Design — Kevin Webb - Purdue University This quarter’s effort has focused on the design and fabrication of a GaN dual-gate high electron mobility transistor (HEMT) nonuniform distributed amplifier (NDA) and a push- pull balun for Class B operation. The simulated performance of the amplifier designed (which has 3 dual-gate gain cells) shows a total output power of approximately 3 W from DC to 8 GHz in Class A operation. The amplifier layout and fabrication are being carried out in collaboration with Cornell. The first fabrication process, which began in March, failed due to lithography problems (sources were not connected to the ground plane). This problem has been corrected, and second fabrication run is now in progress. We plan on testing two adjacent dual-gate amplifiers, designed for Class A operation, in push-pull Class B mode. While our simulations indicate that better results can be achieved with an amplifier designed specifically for Class B operation, this push-pull experiment using NDAs designed for Class A represents an important step, in that our balun concept can be tested with an available amplifier. To this end, we have designed a balun specifically for this purpose. The balun mask has been made and the processing is underway. The input and output baluns were designed on the same high thermal conductivity AlN substrate. The mask layout is shown in Figure 7 and the amplifier interfaced with the external input and output balun is shown in Figure 8. The AlN wafers have 2.5 m of Au on a 7000Å TiW adhesion layer. We have designed a variety of baluns, including asymmetric two-line and symmetric three-line structures, each having advantages and disadvantages. The two-line balun requires small interline distance (5-10 m), placing demands on etching. Wet chemical etching at elevated temperature with a KI+I2 +H2O etchant is being used for the Au, and the TiW was subsequently etched using HNO3+HF while protecting the wafer backside metal with photoresist. Two Class A amplifiers in a die will be attached to the AlN substrate using silver epoxy, as the masks in Figure 8 illustrate. The external baluns will be wire bonded to the adjacent dual-gate amplifiers and the resulting amplifier operated in push-pull mode. The simulated performance for this amplifier was reported in the first quarter, 2000 report. Figure 7 Entire balum mask layout testing Figure 8 Masks for Class B push-pull amplifier interfaced with extermal input and output baluns III. THEORETICAL AND NOISE STUDIES A. Summary — Lester F. Eastman Fundamental theoretical effort by Prof. B.K. Ridley previously showed that the electron mobility in AlGaN/GN HEMT 2DEG would be ~ 2,030 cm2/V-s for 2 x 1012/cm2 electrons, and 1,440 cm2/V-s for 1.2 x 1013/cm2 electrons. He assumed that the electron effective mass was .23 mo. It has now been determineda to be .19 mo, raising the theoretical mobility by 21%. Our best OMVPE material has 1,700 cm2/V-s for 1.2 x 1013/cm2 electrons, close to the 1,740 cm2/V-s new theoretical result for the .19 mo mass for this 2DEG density. Experimental results for MBE materialb at 6.1 x 1012/cm2 electrons have been measured to be 2,100 cm2/V-s, also very close to the theoretical value for that 2DEG density. The dependence of 1/ƒ noise on gate leakage current has been investigated, showing that for good, low Hooge parameter, the fractional effect is strongest. In the range of drain voltage yielding drain current saturation, the 1/ƒ noise is constant. The use of an insulating layer under the gate has lowered the gate leakage current and its contribution to 1/ƒ noise. References a Wang, T., Bai, J., Sakai, S., Ohno, Y., and Ohno, H. Appl. Phys. Lett, 76(19), 8 May 2000 b Jurkovic, M.J., Li, L.K., Turk, B., Wang, W.I., Syed, S., Sinsarian, D., and Stormer H., Mat. Res. Soc. Symp., 575, P.W 8.1.1, Fall 1999 B. Noise Studies - Michael Shur, RPI During the last quarter, our work has concentrated on studies of the effect of the gate leakage current fluctuations on 1/ƒ noise properties of AlGaN/GaN Heterostructure Field Effect Transistors (HFETs, for both conventional HFETs structures and for novel AlGaN/GaN Metal-Oxide-Semiconductor Heterostructure Field Effect Transistors (MOSHFETs). The comparison of the noise properties of conventional AlGaN/GaN HFETs and AlGaN/GaN MOS-HFETs fabricated on the same wafer, allowed us to estimate the contribution of the gate current noise to the HFETs output noise. The effect of the gate current fluctuations on output noise properties of HFETs depends on the level of noise in the AlGaN/GaN HFETs. For the transistors with a relatively high magnitude of the Hooge parameter ~10-3, even a relatively large leakage current Ig (Ig/Id ~ 10-310-2, where Id is the drain current) does not contribute a significant fraction of the output noise. In the HFETs with a relatively small values of (~ 10-510-4), the fractional contribution of the leakage current to output noise can be significant even at Ig/Id ~ 10-410-3. For such transistors, a very rapid increase of the 1/f noise with gate bias was observed. The differences in the noise behavior can be linked to the material quality of the AlGaN and GaN layers in different types of HFETs. We also studied the dependence of noise on the drain bias, and our results showed that the low frequency noise is approximately constant in the saturation region (see Fig. 9). Figure 9 Drain voltage dependencies of the drain current Id and the drain current spectral noise density SId/Id2 for the HFETs. (Vg = -2V) (From S. L. Rumyantsev, N. Pala, M. S. Shur and R. Gaska, M. E. Levinshtein, M. Asif Khan, G. Simin, X. Hu, and J. Yang, Effect of gate leakage current on noise properties of AlGaN/GaN field effect transistors, submitted to J. Appl. Phys.) IV. MATERIALS A. Summary — Lester F. Eastman OMVPE growth of undoped AlGaN/GaN HEMT structures on thin (150 µm) sapphire substrate has been optimized, in order to remove heat from the devices more easily. SiC substrates preparation for MBE has been studied in cooperation with ATMI. Wafers from CREE, Northrop Grumman and Sterling were baked in H2 at 1500 °C. They showed improvements in the surface morphology, reaching bi-layer smoothness, but still showing polishing scratches in some cases. It is also planned to have SIMS measurements made on HEMT structures with different buffer layer thicknesses, to correlate with device performance differences. B. Epitaxial Growth of AlGaN/GaN HEMT Structures by OMVPE J.A. Smart, T.R. Prunty, and J.R. Shealy Efforts this past quarter focused on growing AlGaN/GaN heterostructures on thinner (150 µm) sapphire substrates. These thinner substrates will allow twice as much heat dissipation in the HMET’s. AlGaN nucleation experiments indicated that the Al mole fraction needed to be increased from approximately 12 % (on standard 330 µm thick sapphire) to 16 % to achieve planar 2-dimensional growth in the first several hundred Angstroms of deposition. The increase Al content is required for uniform wetting of the substrate surface due to a slightly poorer surface finish observed on the thinned sapphire. Free carrier profiles, derived from C-V measurements, show a well confined 2DEG at the heterostructure, with no evidence of mobile carriers in the GaN buffer or at the substrate/epitaxy interface (similar to results on 330 µm sapphire). These thinner substrates "cleave" more easily, but break into irregular patterns (spider cracks) and don’t follow diamond scribed paths as the thicker substrates usually do. Therefore, Hall samples need to be sawed out of the 2" diameter wafers instead of cleaved. Experiments are currently underway for optimizing the sawing of thinner sapphire for Hall samples and subsequent electron transport measurements. C. MBE growth of AlGaN/GaN HFETs - William J. Schaff This quarter has focussed on improvements to growth on SiC. Substrates were annealed in hydrogen at 1500°C in another laboratory for investigation into the effect of etched SiC surfaces on GaN epitaxial growth. SiC wafers that are semi-insulating, high resistivity and p-type were thermally etched. They will be loaded for growth following replacement of the RHEED filament which failed during the first week of June. The RF source has developed an external water leak which will require returning the source to the manufacturer for repair. This is expected to take place within the next 4 weeks. HEMT’s using growths on sapphire were investigated using pulsed RF, real time load line analysis. Pulsed RF output powers over 6 W for 1mm HFETs on MBE materials have been obtained. Samples of this wafer will be sent out for SIMs analysis, for comparison to similar structures with thinner GaN buffers, which exhibited stronger levels of slump.