Welcome EE175A/B Senior Design
Section Professor: Sheldon Tan
Section Assistant Ms. Ning Mi
Lab location: Eng-II 361
Group meeting time: 4:00pm-5:00pm, Wed
Wireless Message-based Camera Surveillance
In this project, we plan to design a wireless message-based (using GSM small message service,
SMS) to build a surveillance system. The system will be built based on the Altera’s popular ED2
development system and Nois II soft microprocessor software environment.
Camera-based surveillance has been intensively used for many security places. The exist camera-
based surveillance system typically was built in the closed-circuit style. In the project, we plan to
build wireless camera surveillance system. In this system, the camera send the live pictures of
the scene under surveillance and the system analyze the pictures. If suspicious pictures are
captured, the system will send multi-media message to the security officers using its wireless
front-end. The message can contains the suspicious picture with location, time information for
The system will be built based on the popular Altera’s ED2 (Education and Development Board).
The board has the all the interface to work with outside camera, GSM/GPRS modern to input the
images and send out the message. The image process will be done in the Nois-II soft core
microprocessor. We will use the Altera’s latest SOPC Builder to create the whole digital systems
and integrate with the existing devices drivers for all the components.
The project requires that students must have taken the EE120 (Digital Design) course and have
some basic knowledge about the hardware description languages such as Verilog-A and have
some C/C++ programming experience.
Benefit to the students
Through the project, the student will be able to learn to how to design a real digital system
consisting of software and hardware and how to use the latest FPGA design environments and
design methodologies to do the real industry-like design. Students will learn the hardware
description languages like Verilog-A, VHDL, the System-on-a-Chip design methodologies in
Altera’s Quartus-II design environment like SOPC Builder. The soft core microprocessor Nois
II development environment Nois II IDE and the operation systems Micro/OS-II. Those hand-on
design experience will significantly benefits student for their future industry career.
2. Design environment
Hardware platform：Altera DE2 board＋1.3Mp CCD camera＋GSM/GPRS Modem。
Software：Quartus II 6.1＋SOPC Builder 1.1＋Nios II 1.1 IDE。
3. System architecture
Hardware architecture : We use Altera’s SOPC Builder to build the whole system consisting
of Nios II soft microprocessor, memory, IP and I/O in a single FPGA. The Avalon bus connects
CPU and DMA, timer, UART, self-defined CCD camera, tri-state bridge, EPCS controller,
SRAM and SDRAM. The external device is 1.3MP CCD camera, GPRS modem, Flash memory.
We use Nois II C2H lib to perform the graph acceleration and perform the graph comparison,
preprocessing and coding.
FPGA core Nios II JTAG
Image CCD Controller DMA
Avalon Interconnect Fabric
GPRS Modem UART
Image Processing Tristate CFI
Block Bridge FLASH
Software architecture : In the Nois II IDE development environment, the system design
uses the HAL layer to write the device drivers, which consists of RS232 serial port controller,
SDRAM flasher controller, self-defined CCD controller, DMA. In the multi-task case, we use
Micro/OS-II operation system to schedule the task. Micro/OS-II is very portable, configurable,
real-time operational kernel and is very reliable and secure. Micro/OS-II is built on HAL lib in
Nois II and is more transparent to the underlying hardware. We can also call the HAL APL
functions. In the wireless communication, GSM/GPRS modem takes of the communication
between the surveillance system and the cell phone via the public wireless network (We need a
SIM card for this) via the AT commands to communicate. In the operation system, we write the
application program to send the information, CCD parameters, and configuration of CCD and
graph coding (JEPG), image comparison and GPRS communication.
CCD config. Image Image coding and
C standard μC/FS API
DMA controller CCD controller
RS232 driver controller controller