FIGURE 2-1 Block diagram of a rectifier by g4039193

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									                     Chapter 2:
                     Diode Applications




Fahmi Samsuri                              Faculty of Electrical &
Analog Electronics                        Electronic Engineering,
                                                        KUKTEM
FIGURE 2-1   Block diagram of a rectifier and a dc power supply with a load.
FIGURE 2-2   Half-wave rectifier operation. The diode is considered to be ideal.
FIGURE 2-3   Average value of the half-wave rectified signal.
FIGURE 2-4
FIGURE 2-5   The effect of the barrier potential on the half-wave rectified output voltage is to reduce the peak value of the input by abo
FIGURE 2-6
FIGURE 2-7   Output voltages for the circuits in Figure 2-6. Obviously, they are not shown on the same scale.
FIGURE 2-8 The PIV occurs at the peak of each half-cycle of the input voltage when the diode is reverse-biased. In this
circuit, the PIV occurs at the peak of each negative half-cycle.
FIGURE 2-9   Half-wave rectifier with transformer-coupled input voltage.
FIGURE 2-10
FIGURE 2-11   Full-wave rectification.
FIGURE 2-12
FIGURE 2-13 A center-tapped full wave rectifier.
FIGURE 2-14 Basic operation of a center-tapped full-wave rectifier. Note that the current through the load resistor is in the
same direction during the entire input cycle, so the output voltage always has the same polarity.
FIGURE 2-15   Center-tapped full-wave rectifier with a transformer turns ratio of 1. Vp(pri) is the peak value of the primary
voltage.
FIGURE 2-16   Center-tapped full-wave rectifier with a transformer turns ratio of 2.
FIGURE 2-17   Diode reverse voltage (D2 shown reverse-biased). The PIV is twice the peak value of the output voltage plus a
diode drop.
FIGURE 2-18
FIGURE 2-19
FIGURE 2-20   Operation of a bridge rectifier.
FIGURE 2-21   Bridge operation during a positive half-cycle of the primary and secondary voltages.
FIGURE 2-22 Peak inverse voltages across diodes D3 and D4 in a bridge rectifier during the positive half-cycle of the
secondary voltage.
FIGURE 2-23
FIGURE 2-24   Power supply filtering.
FIGURE 2-25   Operation of a half-wave rectifier with a capacitor-input filter.
FIGURE 2-26   Half-wave ripple voltage (blue line).
FIGURE 2-27   Frequencies of half-wave and full-wave rectified voltages derived from a 60 Hz sine wave.
FIGURE 2-28 Comparison of ripple voltages for half-wave and full-wave rectified voltages with the same filter capacitor and
load and derived from the same sinusoidal input voltage.
FIGURE 2-29   Vr and VDC determine the ripple factor.
FIGURE 2-30
FIGURE 2-31   Surge current in a capacitor-input filter.
FIGURE 2-32   The 7800 series three-terminal fixed positive voltage regulators.
FIGURE 2-33   A basic +5.0 V regulated power supply.
FIGURE 2-34   A basic power supply with a variable output voltage (from 1.25 V to 6.5 V).
FIGURE 2-35   Examples of diode limiters (clippers).
FIGURE 2-36
FIGURE 2-37   Waveforms for Figure 2-36.
FIGURE 2-38   A positive limiter.
FIGURE 2-39   A negative limiter.
FIGURE 2-40
FIGURE 2-41
FIGURE 2-42   Output voltage waveform for Figure 2-41.
FIGURE 2-43   Diode limiters implemented with voltage-divider bias.
FIGURE 2-44
FIGURE 2-45
                               Clampers
• The clamping network is to “clamp” a signal to a different dc
level. Also known as dc restorers. The clamping circuit is often
used in TV receivers as a dc restorer.
• The network consists of:
        a) Capacitor
        b) Diode
        c) Resistive element
        d) Independent dc supply (option)  additional shift
• The magnitude of R and C must be chosen such that the time
constant  = RC is large enough to ensure that the voltage across
the capacitor does not discharge significantly during the interval the
diode is nonconducting.
• Our analysis basis that all capacitor is fully charge and discharge
in 5 time constant.
• Fig 2.45(a) will clamp the i/p signal to the zero level (ideal diode)
• The resistor R can be the load resistor or a parallel combination of
the load resistor and a resistor designed to provide the desired level
of R


            Vi
        V                       +                             +
                                Vi                        R   Vo
        0    T/2    T
                        t

       -V                       -                             -


                            Fig. 2.45(a): Clamper
                       Operation of clamper

+ ve region
        C
       + -                          • 0 T/2: Diode is ON state (short-cct
                            +       equivalent)
                                    • Assume RC time is small and
Vi                      R   Vo      capacitor charge to V volts very quickly
                                    • Vo=0 V
                                -

                                    • T/2 T: Diode is OFF state (open-cct
- ve region
                                    equivalent)
      +
          C
              -                     • Both for the stored capacitor voltage
                  +                 and applied signal pressure current
          V                 +
                                    through cathode to anode
V                 Vo    R   Vo      • KVL: - V- V- Vo = 0 and
                  -                             Vo = -2V
                            -
                                    • -2V the polarity is opposite the
                                    defined Vo
                Operation of clamper (continued)
The o/p waveform is clamped to 0 V  T/2 but maintains the same
total swing (2V) as the i/p.

                        Vi
                   V


                    0    T/2    T
                                     t

                   -V

                        Vo

                    0    T/2    T
                                     t




                  -2V
FIGURE 2-46   Positive clamper operation.
FIGURE 2-47   Negative clamper.
FIGURE 2-48
FIGURE 2-49   Output waveform across RL for Figure 2-48.
FIGURE 2-50   Half-wave voltage doubler operation. VP is the peak secondary voltage.
FIGURE 2-51   Full-wave voltage doubler operation.
FIGURE 2-52   Voltage tripler.
FIGURE 2-53   Voltage quadrupler.
FIGURE 2-54   Nonrepetitive forward surge current capability.
FIGURE 2-55   Forward voltage (VF) versus forward current (IF).
FIGURE 2-56   A selection of rectifier diodes based on maximum ratings of I O, IFSM, and IRRM.
FIGURE 2-57   Block representations of functioning and nonfunctioning power supplies.
FIGURE 2-58   Example of signal tracing: input to output.
FIGURE 2-59   Example of signal tracing: output to input.
FIGURE 2-60   Example of signal tracing: half-splitting.
FIGURE 2-61   The effect of an open diode in a half-wave rectifier is an output of 0 V.
FIGURE 2-62   The effect of an open diode in a center-tapped rectifier is half-wave rectification and a larger ripple voltage at
60 Hz.
FIGURE 2-63   Effect of an open diode in a bridge rectifier.
FIGURE 2-64   Effect of a shorted diode in a bridge rectifier.
FIGURE 2-65   Effects of a faulty filter capacitor.
FIGURE 2-66
FIGURE 2-67   Power supply preliminary schematic.
FIGURE 2-68   Power supply printed circuit board.
FIGURE 2-69   Power supply test bench.
FIGURE 2-70   Signal tracing sequences for three faulty power supply boards.
FIGURE 2-71 File circuits are identified with a CD logo and are in the Problems folder on your CD-ROM. Filenames
correspond to figure numbers (e.g., F02-71).
FIGURE 2-72
FIGURE 2-73
FIGURE 2-74
FIGURE 2-75
FIGURE 2-76
FIGURE 2-77
FIGURE 2-78
FIGURE 2-79
FIGURE 2-80
FIGURE 2-81
FIGURE 2-82
FIGURE 2-83
FIGURE 2-84
FIGURE 2-85
FIGURE 2-86
FIGURE 2-87
FIGURE 2-88

								
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