# Determining the Optimal Level of Product Availability.ppt

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```					                  EE 319K
Introduction to Embedded Systems

Lecture 6: SysTick Timer,
Exam 1 Review

Bill Bard, Andreas Gerstlauer, Jon Valvano, Ramesh Yerraballi   6-1
Agenda
qRecap
vSubroutines and Parameter Passing
o AAPCS Convention
o In C: Address of (&), Pointer to (*)
vData Structures: Arrays, Strings
o Length: hardcoded vs. embedded vs. sentinel
o Array access: indexed vs. pointer arithmetic
vFunctional Debugging
qOutline
vSysTick Timer
vExam 1 Review

Bill Bard, Andreas Gerstlauer, Jon Valvano, Ramesh Yerraballi   6-2
SysTick Timer

qTimer/Counter operation
v24-bit counter decrements at bus clock
frequency
o With 50 MHz bus clock, decrements every 20 ns
vCounting is from n à 0
o Setting n appropriately will make the counter a
modulo n+1 counter. That is:
Ø next_value = (current_value-1) mod (n+1)
Ø Sequence: n,n-1,n-2,n-3… 2,1,0,n,n-1…

Bill Bard, Andreas Gerstlauer, Jon Valvano, Ramesh Yerraballi   6-3
SysTick Timer

q Initialization (4 steps)
v Step1: Clear ENABLE to stop counter
v Step2: Specify the RELOAD value
v Step3: Clear the counter via NVIC_ST_CURRENT_R
v Step4: Set CLK_SRC=1 and specify interrupt action
via INTEN in NVIC_ST_CTRL_R

Bill Bard, Andreas Gerstlauer, Jon Valvano, Ramesh Yerraballi   6-4
SysTick Timer
SysTick_Init
; disable SysTick during setup       24-bit Countdown Timer
LDR R1, =NVIC_ST_CTRL_R
MOV R0, #0            ; Clear Enable
STR R0, [R1]
LDR R0, =0x00FFFFFF;    ; Specify RELOAD value
STR R0, [R1]            ; reload at maximum
; writing any value to current clears it
LDR R1, =NVIC_ST_CURRENT_R
MOV R0, #0
STR R0, [R1]            ; clear counter
; enable SysTick with core clock
LDR R1, =NVIC_ST_CTRL_R
MOV R0, #0x0005    ; Enable but no interrupts (later)
STR R0, [R1]       ; ENABLE and CLK_SRC bits set
BX LR
Bill Bard, Andreas Gerstlauer, Jon Valvano, Ramesh Yerraballi   6-5
SysTick Timer
;------------SysTick_Wait------------
; Time delay using busy wait.
; Input: R0 delay parameter in units of the core clock
;        50 MHz(20 nsec each tick)
; Output: none
; Modifies: R1, R2, R3
SysTick_Wait
LDR R1, =NVIC_ST_CURRENT_R ; R1 = &NVIC_ST_CURRENT_R
LDR R2, [R1]               ; R2 startTime
SysTick_Wait_loop
LDR R3, [R1]               ; curTime
SUB R3, R2, R3             ; elapsed = startTime - curTime
AND R3, R3, #0x00FFFFFF    ; 24-bit subtraction
CMP R3, R0
BLS SysTick_Wait_loop      ; repeat if elapsed time <= delay
BX LR

Bill Bard, Andreas Gerstlauer, Jon Valvano, Ramesh Yerraballi   6-6
SysTick Timer
;------------SysTick_Wait10ms------------
; Call this routine to wait for R0*10 ms
; Time delay using busy wait. This assumes 50 MHz clock
; Input: R0 number of times to wait 10 ms before returning
; Output: none
; Modifies: R0
DELAY10MS EQU 500000     ; clock cycles in 10 ms
SysTick_Wait10ms
PUSH {R4, LR}               ; save R4 and LR
MOVS R4, R0                 ; R4 = R0 = remainingWaits
BEQ SysTick_Wait10ms_done   ; R4 == 0, done
SysTick_Wait10ms_loop
LDR R0, =DELAY10MS          ; R0 = DELAY10MS
BL SysTick_Wait             ; wait 10 ms
SUBS R4, R4, #1             ; remainingWaits--
BHI SysTick_Wait10ms_loop   ; if(R4>0), wait another 10 ms
SysTick_Wait10ms_done
POP {R4, PC}

Bill Bard, Andreas Gerstlauer, Jon Valvano, Ramesh Yerraballi   6-7
SysTick Timer in C
#define NVIC_ST_CTRL_R(*((volatile unsigned long *)0xE000E010))
#define NVIC_ST_CURRENT_R(*((volatile unsigned long *)0xE000E018))

void SysTick_Init(void){
NVIC_ST_CTRL_R = 0; // 1) disable SysTick during setup
NVIC_ST_CURRENT_R = 0; // 3) any write to current clears it
NVIC_ST_CTRL_R = 0x00000005; // 4) enable SysTick with core clock
}

// The delay parameter is in units of the 50 MHz core clock(20 ns)
void SysTick_Wait(unsigned long delay){
unsigned long startTime = NVIC_ST_CURRENT_R;
while ((startTime-NVIC_ST_CURRENT_R)&0x00FFFFFF > Delay){}
}

// Call this routine to wait for delay*10ms
void SysTick_Wait10ms(unsigned long delay){
unsigned long i;
for(i=0; i<delay; i++){
SysTick_Wait(500000); // wait 10ms
} Bill Bard, Andreas Gerstlauer, Jon Valvano, Ramesh Yerraballi   6-8
Exam 1 Syllabus

qLectures 1-5
qLabs 1-3
qHomeworks 1-5 (C Programming)
qChapters 1-5 from text
vSome sections skipped
vLook at slides for reference
qChapters 1-4 from Zyante online book

Bill Bard, Andreas Gerstlauer, Jon Valvano, Ramesh Yerraballi   6-9
Exam 1 Review
qDefinitions (matching or multiple
choice)
v volatile, nonvolatile, RAM, ROM, port
v static efficiency, dynamic efficiency
v structured program, call graph, data flow graph
v basis, nibble, precision, kibibyte, mebibyte
v signed/unsigned,overflow, ceiling and floor, drop out
v bus, address bus, data bus
v memory-mapped, I/O mapped
v bus cycle, Harvard architecture, pipelining
v tristate, open collector, ALU, D flip flop, registers
v device driver, CISC, RISC

Bill Bard, Andreas Gerstlauer, Jon Valvano, Ramesh Yerraballi   6-10
Exam 1 Review
qNumber conversions - convert one
format to another
valternatives, binary bits
vsigned decimal e.g., -56
vunsigned decimal e.g., 200
vbinary e.g., %11001000

Bill Bard, Andreas Gerstlauer, Jon Valvano, Ramesh Yerraballi   6-11
Exam 1 Review
qCortex-M3 operation & instructions
o Yielding result, N, Z, V, C
vOperation of Thumbnail instructions
vStack operations
qSwitch and LED interfaces
qC Programming
vDeclarations, expressions, control flow
o Conditionals and Loops
vNo Arrays

Bill Bard, Andreas Gerstlauer, Jon Valvano, Ramesh Yerraballi   6-12
Exam1 Review

qSimple programs (assembly and C)
vcreate global variables            • Not on Exam
vspecify an I/O pin is an input        – Pointers in C
vspecify an I/O pin is an output       – Arrays, strings
vclear an I/O output pin to zero       – Call by reference
vset an I/O output pin to one          – Cycle by cycle
execution
vtoggle an I/O output pin              – 9S12
vcheck if an I/O input pin is high or low
vadd, sub, shift left, shift right, and, or, eor

Bill Bard, Andreas Gerstlauer, Jon Valvano, Ramesh Yerraballi   6-13
Practice Problems
qBook
vHardware interfacing
o 4.12, 4.13, 4.15
vPort initialization
o 4.5, 4.6, 4.7, 4.10, 4.11
vSoftware (do both in assembly and C)
o 4.18, 4.19, 4.20, Lab 4.3, Lab 4.5, Lab 4.6,
o 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 5.10
qLecture worksheets
vPosted w/ lecture notes on Blackboard
qPrevious year’s exams
vHomework 5
vhttp://www.ece.utexas.edu/~valvano/Volume1
Bill Bard, Andreas Gerstlauer, Jon Valvano, Ramesh Yerraballi   6-14

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