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VLSI IEEE PROJECT TOPICS

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					VLSI PROJECT TOPICS
 Area-Efficient Universal Cryptography Processor for Smart Cards-2007  The CSI Multimedia Architecture-2007  VLSI Implementations of the CryptographicHash Functions MD6 and ïrRUPTAn -2009  Improvement Of The Orthogonal Code Convolution Capabilities Using Fpga Implementation-2007  A Vhdl Model of a IEEE1451.2 Smart Sensor:Characterization And Applications-2007  Fuzzy Based PID Controller Using VHDL/VERILOG for transportation Application-2008  Implementation of IEEE 802.11 a Wlan Baseband Processor-2008  A Lossless Data Compression and Decompression Algorithm and its Hardware Architecture-2008  A Verilog Implementation of UART Design with Bist Capability-2008  A Robust Uart Architecture Based On Recursive Running Sum Filter For Better Noise Performance-2008  Fpga Implementation of USB Transceiver Macrocell Interface With Usb2.0 Specifications-2008  A Vlsi Architecture For Visible Watermarking In A Secure Still Digital Camera (S2dc) Design (Corrected)-2008  A Low-Power Multiplier With The Spurious Power Suppression Technique-2007  Design Of Reconfigurable Coprocessor for Communication Systems2008  Block-Based Multiperiod Dynamic Memory Design For Low DataRetention Power-2008 Verilog Course Team
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 A Symbol-Rate Timing Synchronization Method for Low Power Wireless Ofdm Systems -2008  On The Design Of A Multi-Mode Receive Digital-Front-End For Cellular Terminal Rfics-2008  Design Exploration of A Spurious Power Suppression Technique (Spst) And Its Applications-2008  Implementation of A Multi-Channel Uart Controller Based On FIFO Technique and FPGA-2007  Optimized Software Implementation of a Full-Rate IEEE 802.11a Compliant Digital Baseband Transmitter on a Digital Signal Processor2005  An Fpga-Based Architecture for Real Time Image Feature Extraction2007  Fpga Based Generation of High Frequency Carrier for Pulse Compression Using Cordic Algorithm  Vlsi Architecture and Fpga Prototyping of a Digital Camera for Image Security and Authentication-2008  Fpga Based Power Efficient Channelizer for Software Defined Radio  FPGA Implementation(s) of a Scalable Encryption Algorithm.  Simulation Based Edge Detection

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