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SIMULATION_ CONTROL AND ANALYSIS OF HTS RESISTIVE AND POWER ELECTRONIC FCL

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SIMULATION_ CONTROL AND ANALYSIS OF HTS RESISTIVE AND POWER ELECTRONIC FCL Powered By Docstoc
					INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING
 International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 –
 6545(Print), ISSN 0976 – 6553(Online) Volume 4, Issue 3, May - June (2013), © IAEME
                           & TECHNOLOGY (IJEET)

ISSN 0976 – 6545(Print)
ISSN 0976 – 6553(Online)                                                     IJEET
Volume 4, Issue 3, May - June (2013), pp. 82-94
© IAEME: www.iaeme.com/ijeet.asp
Journal Impact Factor (2013): 5.5028 (Calculated by GISI)                  ©IAEME
www.jifactor.com




   SIMULATION, CONTROL AND ANALYSIS OF HTS RESISTIVE AND
    POWER ELECTRONIC FCL FOR FAULT CURRENT LIMITATION
     AND VOLTAGE SAG MITIGATION IN ELECTRICAL NETWORK

                                       V Yuvaraj1, T Vasanth2
                            1
                                Central Power Research Institute, India,
                                     2
                                       Jurong Shipyard, Singapore


  ABSTRACT

          Linear growth of Electrical energy demand in the world resulting in a consistent
  increase in the short circuit level in electrical network, which effects in blackout. Usage of
  renewable energy to meet demand without proper synchronization will result in power
  quality problems like voltage sag, swell etc. Power System engineers at utility side are facing
  challenges of integrating new generation of power and renewable energy into existing
  electrical network. The High Temperature Superconducting Fault Current Limiter (HTSFCL)
  and Power Electronic Fault Current Limiter (PEFCL), offers a possible solution to the
  electrical network. Power quality problems caused by short circuit and renewable energy
  sources which has been simulated and analysed in this paper. The simulated results are
  analysed for the effect of resistive HTSFCL in both single and three phase electrical network
  performance to reduce fault current level and PEFCL for both single and three phase
  electrical network recital for fault current and power quality and also the total harmonic
  distortion (THD) is analysed during the fault with MATLAB Simulink.

  Keywords - Fault Current, HTSFCL, PEFCL, Power Quality, THD, Voltage Sag.

  I.    INTRODUCTION

        Fault Current Limiters (FCL) designed with high temperature superconductors (HTS)
  have been explored since 1980’s but a cost, practical and reliable concept has remained
  indefinable. There are many designs for FCLs, but the most widely explored have been those
  based on a resistive type and Inductive type. [1], [5]. Fault-current limiters using high
  temperature superconductors offer a solution to controlling fault-current levels on utility
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distribution and transmission networks. These fault-current limiters, unlike reactors or high-
impedance transformers, will limit fault currents without adding impedance to the circuit
during normal operation. [2], [3]
      Classical current limiters (fuses, electronic power components like SCR, IGBT, etc.,)
are available only for low voltages and their response time is limited by the detection time
(<1 ms), the delay time (~1 ms) and the limiting time itself (~1 ms). For a high temperature
superconducting fault current limiter the limitation is effective in a sub millisecond time
without detection or external command. [4]
       The most common is the resistive type: it is based on a high temperature
superconducting coil in series with the load and wound to minimize the inductance, offering a
low voltage drop in un-faulted operation. Under short circuit conditions the current rises very
quickly up to the critical current. At this time a quench is induced and the normal resistance
of the superconducting cable limits the fault current to a low value, cut afterwards without
any problem by a circuit breaker. This circuit-breaker must be very fast to reduce the heat
dissipation into the superconducting coil. This device is simple and has proved its operation.
[6], [7]
      The solid-state breakers are always embedded into two major useful categories in power
system devices: i) solid-state transfer switch and ii) solid-state fault current limiter (SSFCL)
or Power electronics Fault current limiter (PEFCL). Moreover, the high level of short circuit
current becomes the serious problem. It may be damage the electric devices or effect to
machines operation. A fault current let through reactor and a ZnO surge arrestor. It overcame
the limitation of both IGBT FCL and SCR Bridge FCL. [8]

     This paper was divided into 7 main sections. Section 2 gives the details about fault
current limiter. Section 3 explains the types of fault current limiters. Section 4 gives overview
of Power Quality Issues, Consequences and Standards. Section 5 figures out the simulation
models of HTS FCL/ PEFCL. Section 6 and 7 shows simulation results of single and three
phase models and conclusion.

II.   FAULT CURRENT LIMITER

       Before technologies can be considered for the application of limiting a distributed
generator’s fault current contribution, the operating conditions and requirements of such a
limiter must first are established. [5]

1.      Fault-Current Problem
         Electric power system designers often face fault-current problems when expanding
existing buses. Larger transformers result in higher fault-duty levels, forcing the replacement
of existing bus work and switchgear not rated for the new fault duty.

2.      Role of fault current limiter
       As mentioned earlier, the role of the FCL is to limit prospective fault current levels to
a more manageable level without a significant impact on the distribution system. Consider a
simple power system model, as shown in Fig. 1, consisting of a source with voltage Vs,
internal impedance Zs, load Zload, and fault impedance Zfault.




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                        Fig 1. Power Circuit Without and With FCL

In steady state,
                                                               (1)

When a fault occurs in a system,

                                                               (2)
Where,        <<
      Since the supply impedance is much smaller than the load impedance, Equation 2
shows Zs that the short circuiting of the load will substantially increase the current flow.
However, if a FCL is placed in series, as shown in the modified circuit, Equation 3 will hold
true;

                                                               (3)

        quation 3 tells that, with an insertion of a FCL, the fault current will now be a
function of not only the source Zs and fault impedance Zfault, but also the impedance of the
FCL. Hence, for a given source voltage and increasing ZFCL will decrease the fault current
Ifault.

III.   TYPES OF FAULT CURRENT LIMITERS

      This section presents a brief review of the various kinds of FCL that has been
implemented or proposed. FCL(s) can generally be categorized into three broad types:

1) Passive limiters
2) Power Electronic type limiters, and
3) Hybrid limiters
    In the past, many approaches to the FCL design have been conducted ranging from the
very simple to complex designs. A brief description of each category of limiter is given
below.




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1.      Passive limiters
        Fault limiters that do not require an external trigger for activation are called passive
limiters. The current limiting task is achieved by the physics involved in the FCL itself. The
simplest of all kinds of fault current limiter is the inductor. The current limiting strategy is
achieved by inserting impedance. Since current cannot change instantaneously in an inductor,
current is therefore limited at the moment of a fault. Fig. 2 shows an inductor in series with
the load and source.




                  Resistive Type                              Inductive Type

                                    Fig 2. Passive Limiters

        Superconductor materials lose their electrical resistance below certain critical values
of temperature, magnetic field, and current density [6]. SFCL(s) work on the principle that
under steady state, it allows for the load current to flow through it without appreciable
voltage drop across it. During a fault, an increase in the current leads to a temperature rise
and a sharp increase in the impedance of the superconducting material. Below are a few
advantages and disadvantages of using an SFCL:
(1) Virtually no voltage drops in steady state.
(2) Quick response times and effective current limiting, but
(3) Superconducting coils can saturate and lead to harmonics.

2.      Power Electronic Type limiters
         Recent developments in power switching technology have made solid state limiters
suitable for voltage and power levels necessary for distribution system applications. Power
Electronics limiters use a combination of inductors, capacitors and Thyristor or IGBT to
achieve fault limiting functionality. An example of a solid state limiter is shown in Fig. 3. In
this type of limiter, a capacitor is placed in parallel with an inductor and a pair of Thyristor.
[8] In steady state, the thyristors are turned off and all current flows through the capacitor.
The placement of the capacitor is also useful by nature because it provides series
compensation for the inductive transmission line. Hence, equation 4 holds true:


                                       ω
                                                                      (4)




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                      Fig. 3 PEFCL                      Fig 4. Hybrid Limiter

        However, when a fault occurs the thyristors are switched on, which forces most of the
current to flow through the inductor branch. The net FCL impedance seen by the circuit is as
follows.

                                       ω
                                                                      (5)

       Below are a few advantages and limitations of solid state limiters in general:-

(1)Provide significant fault current limiting impedance.
(2) Low steady state impedance as capacitors and inductors can be tuned for a particular
frequency to show virtually no impedance and voltage drops.
(3) Harmonics introduced due to switching devices.
(4) Voltage drop introduced during faults.

3.      Hybrid limiters
        As the name implies, hybrid limiters use a combination of mechanical switches, solid
state FCL(s), superconducting and other technologies to create current mitigation. It is a well-
known fact that circuit breakers and mechanical based switches suffer from delays in the few
cycles range. Power electronic switches are fast in response and can open during a zero
voltage crossing hence commutating the voltage across its contacts in a cycle. Fig. 4 shows
the circuit arrangement of Hybrid limiter device. [4]
        The reactance of the capacitor C1 and reactor L is about zero at nominal power
frequencies. In steady state, the TVS (Triggered Vacuum Switch) and SW2 are in the off
state. SW2 is a quick permanent magnetism vacuum contactor with a 3-10ms closure delay,
which prevents TVS from long-time arc erosion. When a fault occurs, a trigger signal is sent
to both TVS and the contactor turning on the bypass capacitor C1. This creates a situation
where the reactor L will limit the fault current immediately. The ZnO arrestor is used for over
voltage protection and capacitor C2 and switch SW1 is set-up as conventional series
compensation

IV.   POWER QUALITY ISSUES, CONSEQUENCES AND STANDARDS

       Power distribution systems, ideally, should provide their customers with an
uninterrupted flow of energy at smooth sinusoidal voltage at the contracted magnitude level
and frequency. A power voltage spike can damage valuable components. Power Quality

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problems encompass a wide range of disturbances such as voltage sags/swells, flicker,
harmonics distortion, impulse transient, and interruptions. [9]

1.    Voltage Sag
      Voltage sags can occur at any instant of time, with amplitudes ranging from 10 – 90%
and a duration lasting for half a cycle to one minute. The voltage sag is due to start-up of
wind turbine and it causes a sudden reduction of voltage. It is the relative % voltage change
due to switching operation of wind turbine. The decrease of nominal voltage change is given
in Equation 6.
                                         Pn
                                ∆d =Lµ                             (6)
                                         Pk
    Where        is relative voltage change,     is rated apparent power,    is short circuit
apparent power, and          is sudden voltage reduction factor. The acceptable voltage dips
limiting value is 3%.

2.    Harmonics
      The total harmonic distortion results due to the operation of power electronic
converters. The harmonic voltage and current should be limited to the acceptable level at the
point of wind energy system connection to the network.

V.    SIMULATION MODELS OF HTS FCL/ PEFCL




                                 Fig 5. Simulation Model

        In the simulation model we considered solar energy system for single phase network
and wind energy system for three phase network. Both renewable energy systems will create
power quality problems due to its variation in wind and solar radiation. Sometimes because
of variation in source also creates some over voltage problems. Here in this paper we
considered both HTS FCL and PEFCL. HTS FCL is only to minimize the short circuit fault
current in the transmission lines. PEFCL is used for both short circuit fault current and power
quality problems like voltage sag and harmonics. We are not considered voltage swell in this
because during fault condition voltage swell won’t occur. The simulation model of the system
is shown in Fig. 5.

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       We simulated and analysed both HTS FCL and PEFCL based circuit. Comparing both
types HTS is reacts fast to limit fault current but quenching time is slow. In case of PEFCL
action is based on the control signal given to the Power Electronics switches but recovery
time is fast. PEFCL based system controls voltage sag and harmonics. Various results are
analysed and discussed in the results section below with before and after fault time.

VI.     SIMULATION RESULTS AND ANALYSIS

1.       Single Phase Model Results




      Fig. 6 Output V/ I Without HTS FCL/            Fig. 7 Output V/ I With HTS FCL
                     PEFCL




                               Fig. 8 Output V/ I With PEFCL

       A simple single phase 3.3Kv, 200A, 50Hz electrical network (not ideal case) without
High Temperature Superconducting Fault Current Limiter (HTS FCL) or Power Electronic
Fault Current Limiter (PEFCL) and creating fault at exactly 0.2sec has been simulated with
Matlab Simulink and the result is shown in Fig. 6 above. From the result it is analysed that at
exactly 0.2sec sudden increase in fault current from 200A to 2065A and sudden decrease in
output voltage from 3.1Kv to 1Kv after creating fault in the electrical network.
       In the same single phase 3.3Kv, 200A, 50Hz electrical network (not ideal case) High
Temperature Superconducting Fault Current Limiter (HTS FCL) is connected and creating

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fault at exactly 0.2sec has been simulated with Matlab Simulink and the result is shown in
Fig. 7 above. From the result it is analysed that at exactly 0.2sec the fault current is reduced
from 2065A to 380A after creating fault in the electrical network.
        Single phase 3.3Kv, 200A, 50Hz electrical network (not ideal case) Power Electronic
Fault Current Limiter (PEFCL) is connected and creating fault at exactly 0.2sec has been
simulated with Matlab Simulink and the result is shown in Fig. 8 above. From the result it is
analysed that at exactly 0.2sec the fault current is reduced from 2065A to 150A and the
output voltage is improved from 1Kv to 3Kv i.e., Voltage SAG mitigation has been done
after creating fault in the electrical network.

2.       THD Analysis without and with FCL




 Fig. 9 Output Voltage THD Value Without           Fig. 10 Output Current THD Value Without
                  PEFCL                                             PEFCL




     Fig. 11 Output Voltage THD Value With          Fig.12 Output Current THD Value With
                     PEFCL                                         PEFCL




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          Fig. 9 and 10 above shows the Total Harmonic Distortion (THD) analysis of the
simple single phase 3.3Kv, 200A, 50Hz electrical network (not ideal case) without Power
Electronic Fault Current Limiter (PEFCL). The THD value of output Voltage and Current
during fault period after analysis is given by 2.48% and 3.09% respectively.
          Fig. 11 and 12 above shows the Total Harmonic Distortion (THD) analysis of the
simple single phase 3.3Kv, 200A, 50Hz electrical network (not ideal case) with Power
Electronic Fault Current Limiter (PEFCL). The THD value of output Voltage and Current
during fault period after analysis is given by 0.25% and 0.99% respectively.

3.      Three Phase Model Results
         A simple three phase 415v, 200A, 50Hz electrical network (not ideal case) without
High Temperature Superconducting Fault Current Limiter (HTS FCL) or Power Electronic
Fault Current Limiter (PEFCL) and creating fault at exactly 0.1sec has been simulated with
Matlab Simulink and the result is shown in Fig. 13 above. From the result it is analysed that
at exactly 0.1sec sudden increase in fault current from 200A to 1500KA and sudden decrease
in output voltage from 340v to 165v after creating fault in the electrical network.




     Fig. 13 Output V/ I Without HTS FCL/         Fig. 14 Output V/ I With HTS FCL
                    PEFCL




                             Fig. 15 Output V/ I With PEFCL




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        In the same three phase 415v, 200A, 50Hz electrical network (not ideal case) High
Temperature Superconducting Fault Current Limiter (HTS FCL) is connected and creating
fault at exactly 0.1sec has been simulated with Matlab Simulink and the result is shown in
Fig. 14 above. From the result it is analysed that at exactly 0.1sec the fault current is reduced
from 1500KA to 213A and the output voltage is improved little from 165v to 195v i.e.,
Voltage SAG mitigation has not been done after creating fault in the electrical network.
        Three phase 415v, 200A, 50Hz electrical network (not ideal case) Power Electronic
Fault Current Limiter (PEFCL) is connected and creating fault at exactly 0.1sec has been
simulated with Matlab Simulink and the result is shown in Fig. 15 above. From the result it is
analysed that at exactly 0.1sec the fault current is reduced from 1500KA to 1.7KA and the
output voltage is improved from 165v to 336v i.e., Voltage SAG mitigation has been done
after creating fault in the electrical network.

4.      THD Analysis without and with FCL
        Fig. 16 above shows the Total Harmonic Distortion (THD) analysis of the simple
three phase 415v, 200A, 50Hz electrical network (not ideal case) without Power Electronic
Fault Current Limiter (PEFCL). The THD value of output Voltage during fault period after
analysis is given by 1.81% respectively.
        Fig. 17 above shows the Total Harmonic Distortion (THD) analysis of the simple
three phase 415v, 200A, 50Hz electrical network (not ideal case) with Power Electronic Fault
Current Limiter (PEFCL). The THD value of output Voltage during fault period after analysis
is given by 0.68% respectively.




 Fig. 16 Output Voltage THD Value Without           Fig. 17 Output Voltage THD Value With
                  PEFCL                                             PEFCL




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5.     Single Phase Combine HTS+PEFCL Model Results




     Fig. 18 Output V/ I With HTS+PEFCL               Fig. 19 Output Current THD Value With
                                                                   HTS+PEFCL

       Basic single phase 3.3Kv, 200A, 50Hz electrical network (not ideal case) with combined
High Temperature Superconducting Fault Current Limiter (HTS FCL) and Power Electronic
Fault Current Limiter (PEFCL) and creating fault at exactly 0.2sec has been simulated with
Matlab Simulink and the result is shown in Fig. 18 above. The output result is analysed by
creating fault at 0.2sec and the fault current is get reduced from 2065A to 143A in the electrical
network and sudden decrease in output voltage from 3.1Kv to 2.8Kv. This is better than single
controller.
6.      THD Analysis with HTS+PEFCL
     Fig. 19 above shows the Total Harmonic Distortion (THD) analysis of the basic single phase
3.3Kv, 200A, 50Hz electrical network (not ideal case) with HTS+PEFCL. The THD value of
output Current during fault period after analysis is given by 1.87%. This is slightly higher than
single controller.
7.     Three Phase Combine HTS+PEFCL Model Results




      Fig. 20 Output V/ I With HTS+PEFCL            Fig. 21 Output Current THD Value With HTS+PEFCL


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    Three phase 415v, 200A, 50Hz electrical network (not ideal case) is connected with
combined High Temperature Superconducting Fault Current Limiter (HTS FCL) and Power
Electronic Fault Current Limiter (PEFCL) and creating fault at exactly 0.2sec has been
simulated with Matlab Simulink and the result is shown in Fig. 20 above. From the result it is
analysed that at exactly 0.2sec the fault current is limited to 259A and the output voltage is
improved from 165v to 335v i.e., Voltage SAG mitigation has been done after creating fault
in the power system network.

8.      THD Analysis with HTS+PEFCL
        Fig. 21 above shows the Total Harmonic Distortion (THD) analysis of the basic three
phase 415v, 200A, 50Hz electrical network (not ideal case) with HTS+PEFCL. The THD
value of output Current during fault period after analysis is given by 0.02%. This is better
than single controller.

VII. CONCLUSIONS

    In this paper simple single phase and three phase, without and with High Temperature
Superconducting Fault Current Limiter (HTSFCL), Power Electronic Fault Current Limiter
(PEFCL) and combined HTS+PEFCL and creating fault at 0.2sec and 0.1sec has been
simulated using Matlab simulink. Output results of the simulation is analysed and the results
shows that with HTS FCL optimizes only the fault current, but voltage sag mitigation cannot
be done because there is no power electronics devices present in the circuit. And the
simulated PEFCL output results also been analysed and it shows that it is capable of
optimizing fault current as well as voltage sag mitigation. The combined HTS+PEFCL will
limit fault current as well as voltage sag compensation. Total Harmonic Distortion (THD) is
analysed for both single phase and three phase electrical network during fault time and the
results are shown above. The voltage THD has been reduced from 2.48% to 0.23% for single
phase and for three phase voltage THD is reduced from 1.81% to 0.68%. For combined
HTS+PEFCL the THD analysis has been done for both single and three phase electrical
network. THD value for single phase electrical network is slightly higher than the single
controller i.e., 1.87%. But for three phase electrical network the THD value is much better
than single controller i.e., 0.02%. From these results we suggest that the single Power
Electronic controller and combined HTS+PEFCL will give best control solution for both fault
current and voltage SAG mitigation. And also if power electronic switches are made with
superconducting material will give more advance solutions for different electrical issues.

REFERENCES

 [1] Swarn S. Kalsi, Member and Alex Malozemoff, Senior Member “HTS Fault Current
     Limiter Concept” Power Engineering Society General Meeting, IEEE 1426 - 1430
     Vol.2 (2004).
 [2] Superconducting Fault Current Limiters, Technology Watch 2009, EPRI, (2009).
 [3] E. Thuries, V. Pham, Y. Laumond, T. Verhaege, A. Fevrier, M. Collet, and M.
     Bekhaled, “Towards the superconducting fault current limiter,” IEEE Trans. Power
     Del., vol. 6, no. 2, pp. 801–808, (1991).




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International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 –
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[4]    P. Tixador et al., ‘Hybrid superconducting a.c. fault current limiter principle and
       previous studies’, IEEE Transactions on Magnetics, Vol. 28, No. 1, pp 446-449
       (1992).
[5]    http://www.wtec.org/loyola/scpa/04_03.htm.
[6]    S. Kalsi and A. Malozemoff, ‘Resistive High Temperature Superconductor Fault
       Current Limiter’, the Power Delivery Applications of Superconductivity Task Force,
       New York, 23-24 (2003)
[7]    Fabio,T. and Stefano, Q.; “Reducing Voltage Sags through Fault Current
       Limitations”, IEEE Transaction on Power Delivery, Vol. 16(1) (2001).
[8]    T. Kulworawanichpong, “Modeling and Simulation of a Solid-state Breaker for
       Medium-voltage Feeder Protection using MATLAB’s PowerSystem Blockset”, in
       Proc. 2003 IEEE Bologna PowerTech Conference, pp. 30-35 (2003).
[9]     Yuvaraj, V., S. N. Deepa, AP Roger Rozario, and Madhusudan Kumar. "Improving
       Grid Power Quality with FACTS Device on Integration of Wind Energy System."
       In Modelling Symposium (AMS), 2011 Fifth Asia, pp. 157-162, IEEE, 2011
[10]    B. Korobeynikov, D. Ishcenko, and A. Iscchenko, "Solid-state fault current limiter
       for medium voltage distribution systems," in Proc. 2003 IEEE Bologna PowerTech
       Conference, pp. 1468-1473 (2003).
[11]   M. M. A. Salama, H. Temraz, A. Y. Chikhani, and M. A. Bayoumi, "Fault-current
       limiter with thyristor-controlled impedance," IEEE Transactions on Power Delivery,
       vol. 8, pp. 1518-1528, Jul (1993)
[12]   M. M. R. Ahmed, G. A. Putrus, and L. Ran, "Power quality improvement using a
       solid-state fault current limiter," in Proc. Transmission and Distribution Conference
       and Exhibition 2002: Asia Pacific. IEEE/PES, pp. 1059-1064 (2002)
[13]   Premanand.S, K.Vidya, D.Nivea and T.Geethapriya, “Improved Performance Of Asd
       Under Voltage Sag Conditions” International Journal of Electrical Engineering &
       Technology (IJEET), Volume 4, Issue 2, 2013, pp. 46 - 52, ISSN Print : 0976-6545,
       ISSN Online: 0976-6553
[14]   Shubhangi Arbale and Rajesh M Holmukhe, “Monitoring and Analysis of Reliaibility
       Of Electrical Distribution System Using Matlab – A Case Study” International
       Journal of Electrical Engineering & Technology (IJEET), Volume 4, Issue 2, 2013,
       pp. 330 - 337, ISSN Print : 0976-6545,ISSN Online: 0976-6553




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