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EECS 105 Fall 2003, Lecture 15

Lecture 15:

Small Signal Modeling

Department of EECS                                          University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                       Prof. A. Niknejad

Lecture Outline

   Review: Diffusion Revisited
   BJT Small-Signal Model
   Circuits!!!
   Small Signal Modeling
   Example: Simple MOS Amplifier

Department of EECS                                       University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                                      Prof. A. Niknejad

Notation Review
Large signal
iC  f (vBE , vCE )
I C  iC  f (VBE  vBE ,VCE  vCE )
Quiescent Point                                                                  small signal
(bias)                                                                    DC (bias)
I C  ic  f (VBE  vbe ,VCE  vce )
small signal
f             f                    (less messy!)
Q  (VBE ,VCE )            ic           vbe             vce
vBE   Q
vCE   Q

transconductance                                  Output conductance

     Since we’re introducing a new (confusing) subject, let’s adopt some
consistent notation
     Please point out any mistakes (that I will surely make!)
     Once you get a feel for small-signal analysis, we can drop the notation
and things will be clear by context (yeah right! … good excuse)
Department of EECS                                                      University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                                Prof. A. Niknejad

Diffusion Revisited
     Why is minority current profile a linear function?
     Recall that the path through the Si crystal is a zig-zag series
of acceleration and deceleration (due to collisions)
     Note that diffusion current density is controlled by width of
region (base width for BJT):
Density here fixed by potential (injection of carriers)
Physical interpretation: How many electrons (holes) have
Half go left,                  enough energy to cross barrier? Boltzmann distribution give
half go right                  this number.

Density fixed by
metal contact

Wp

     Decreasing width increases current!
Department of EECS                                                University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                                        Prof. A. Niknejad

Diffusion Capacitance
     The total minority carrier charge for a one-sided
junction is (area of triangle)
qV
1          1                         D

Qn  qA  bh2  qA  (W  xdep , p )(n p 0e kT  n p 0 )
2          2

     For a one-sided junction, the current is dominated
by these minority carriers:
qVD
ID                (n p 0e kT  n p 0 )
Wp  xdep , p

ID     Dn
                                      Constant!
Qn W  x
dep , p 
2
p

Department of EECS                                                        University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                                     Prof. A. Niknejad

Diffusion Capacitance (cont)
     The proportionality constant has units of time
Distance across
Qn W p  xdep , p 
2
P-type base
T     
ID       Dn

q W p  xdep , p 
2       Diffusion Coefficient

T                                 Mobility
kT       n
Temperature

     The physical interpretation is that this is the transit
time for the minority carriers to cross the p-type
region. Since the capacitance is related to charge:
Qn   T I D          Qn      I
Cd       T     g d T
V       V
Department of EECS                                                     University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                             Prof. A. Niknejad

BJT Transconductance gm

     The transconductance is analogous to diode
conductance
Department of EECS                             University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                                Prof. A. Niknejad

Transconductance (cont)

     Forward-active large-signal current:

iC  I S e   vBE / Vth
(1  vCE VA )

• Differentiating and evaluating at Q = (VBE, VCE )
iC          q
    I S e qVBE / kT (1  VCE VA )
vBE   Q
kT

iC               qI C
gm                   
vBE         Q
kT
Department of EECS                                               University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                                                      Prof. A. Niknejad

BJT Base Currents
Unlike MOSFET, there is a DC current into the
base terminal of a bipolar transistor:

I B  IC F   I S F  eqVBE / kT (1  VCE VA )

To find the change in base current due to change
in base-emitter voltage:
iB                     iB            iB       iC               1
ib               vbe                                                         gm
vBE   Q                vBE   Q
iC       vBE   Q
F
Q

gm
ib         vbe
F
Department of EECS                                                                      University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                         Prof. A. Niknejad

Small Signal Current Gain
iC
0         F
iB

iC   0 iB

ic   0ib

     Since currents are linearly related, the derivative is a
constant (small signal = large signal)
Department of EECS                                         University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                                         Prof. A. Niknejad

Input Resistance rπ
iB          1 iC             gm
 r 
1
                            
vBE   Q
 F vBE   Q
F
F
r 
gm

     In practice, the DC current gain F and the small-signal
current gain o are both highly variable (+/- 25%)
     Typical bias point: DC collector current = 100 A

25 mV
r  100             25 k
.1mA
Ri                 MOSFET

Department of EECS                                                         University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                         Prof. A. Niknejad

Output Resistance ro
Why does current increase slightly with increasing vCE?
Collector (n)

WB    Base (p)

Emitter (n+)

Answer: Base width modulation (similar to CLM for MOS)
Model: Math is a mess, so introduce the Early voltage

iC  I S e vBE / Vth (1  vCE V A )
Department of EECS                                         University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                      Prof. A. Niknejad

Graphical Interpretation of ro

slope~1/ro

slope

Department of EECS                      University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                             Prof. A. Niknejad

BJT Small-Signal Model

ib  r vbe
1
ic  g m vbe  vce
ro
Department of EECS                             University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                               Prof. A. Niknejad

BJT Capacitors
     Emitter-base is a forward biased junction 
depletion capacitance:
C j , BE  1.4C j , BE 0
     Collector-base is a reverse biased junction 
depletion capacitance
     Due to minority charge injection into base, we have
to account for the diffusion capacitance as well

Cb   F g m

Department of EECS                               University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                               Prof. A. Niknejad

BJT Cross Section
Core Transistor

External Parasitic
     Core transistor is the vertical region under the
emitter contact
     Everything else is “parasitic” or unwanted
     Lateral BJT structure is also possible
Department of EECS                               University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                          Prof. A. Niknejad

Core BJT Model
Reverse biased junction

Base                                      Collector

g m v

Fictional Resistance
(no noise)
Reverse biased junction &
Diffusion Capacitance      Emitter

     Given an ideal BJT structure, we can model most of the
action with the above circuit
     For low frequencies, we can forget the capacitors
     Capacitors are non-linear! MOS gate & overlap caps are
linear
Department of EECS                                          University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                               Prof. A. Niknejad

Complete Small-Signal Model
“core” BJT           Reverse biased junctions

Real Resistance
(has noise)

External Parasitics

Department of EECS                                               University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                               Prof. A. Niknejad

Circuits!

    When the inventors of the bipolar transistor first
got a working device, the first thing they did was to
build an audio amplifier to prove that the transistor
was actually working!
Department of EECS                               University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                                          Prof. A. Niknejad

Modern ICs

Source: Intel Corporation
Used without permission

Source: Texas Instruments
Used without permission

     First IC (TI, Jack Kilby, 1958): A couple of transistors
     Modern IC: Intel Pentium 4 (55 million transistors, 3 GHz)
Department of EECS                                                          University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                          Prof. A. Niknejad

A Simple Circuit: An MOS Amplifier

Input signal                   VDD
RD                Supply “Rail”

vo

I DS
vs
vGS  VGS  vs                                 Output signal
VGS

Department of EECS                          University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                 Prof. A. Niknejad

Selecting the Output Bias Point
     The bias voltage VGS is selected so that the output is
mid-rail (between VDD and ground)
     For gain, the transistor is biased in saturation
     Constraint on the DC drain current:
VDD  Vo VDD  VDS
IR            
RD        RD
     All the resistor current flows into transistor:
I R  I DS , sat
     Must ensure that this gives a self-consistent
solution (transistor is biased in saturation)
VDS  VGS  VT
Department of EECS                                 University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                                     Prof. A. Niknejad

Finding the Input Bias Voltage
     Ignoring the output impedance
W     1
I DS , sat    nCox (VGS  VTn )2
L     2
     Typical numbers: W = 40 m, L = 2 m,
RD = 25k, nCox = 100 A/V2, VTn = 1 V,
VDD = 5 V
VDD                W     1
I RD          I DS , sat  nCox (VGS  VTn ) 2
2 RD               L     2
5V                   μA 1
 100μA  20 100 2  (VGS  1) 2
50k                  V 2
.1  (VGS  1) 2                VGS  1.32   VGS  VT  .32  VDS  2.5            
Department of EECS                                                     University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                            Prof. A. Niknejad

Applying the Small-Signal Voltage

Approach 1. Just use vGS in the equation for the total
drain current iD and find vo
vGS  VGS  vs

vs  vs cos t
ˆ

W1
vO  VDD  RDiDS    VDD  RD nCox     (VGS  vs  VT )2
L 2

Note: Neglecting charge storage effects. Ignoring
device output impedance.

Department of EECS                                            University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                              Prof. A. Niknejad

Solving for the Output Voltage vO
W1
vO  VDD  RDiDS    VDD  RD nCox     (VGS  vs  VT )2
L 2
2
W 1            2       vs    
vO  VDD  RDiDS      VDD  RD nCox     (VGS  VT ) 1           
L 2                 VGS  VT 

I DS
2
       vs    
vO  VDD  RD I DS 1           
    VGS  VT 

VDD
2

Department of EECS                                              University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                                                         Prof. A. Niknejad

Small-Signal Case
     Linearize the output voltage for the s.s. case
     Expand (1 + x)2 = 1 + 2x + x2 … last term can be
dropped when x << 1
2
                vs                            2v s                           vs             2
 1 + ------------------------- = 1 + ------------------------- +  ------------------------- 
-                                -                             -
     V G S – V Tn                    V GS – V Tn  V – V 
GS              Tn

Neglect

    2vs 
vO  VDD  RD I DS 1        
 VGS  VT 

Department of EECS                                                                         University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                                              Prof. A. Niknejad

Linearized Output Voltage
For this case, the total output voltage is:
VDD     2vs 
vO  VDD      1       
2  VGS  VT 
VDD   vsVDD
vO      
2 VGS  VT
“DC”
Small-signal output

The small-signal output voltage:
vsVDD
vo               Av vs
VGS  VT

Voltage gain
Department of EECS                                              University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                         Prof. A. Niknejad

Plot of Output Waveform (Gain!)
Numbers: VDD / (VGS – VT) = 5/ 0.32 = 16      output

input

mV

Department of EECS                         University of California, Berkeley
EECS 105 Fall 2003, Lecture 15                                               Prof. A. Niknejad

There is a Better Way!
        What’s missing: didn’t include device output
impedance or charge storage effects (must solve
non-linear differential equations…)
        Approach 2. Do problem in two steps.
        DC voltages and currents (ignore small signals
sources): set bias point of the MOSFET ... we had
to do this to pick VGS already
        Substitute the small-signal model of the MOSFET
and the small-signal models of the other circuit
elements …
        This constitutes small-signal analysis
Department of EECS                               University of California, Berkeley

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