ECE 462/562: COMPUTER
ARCHITECTURE AND DESIGN
Professor Ahmed Louri
Website for Professor:
Website for course:
August 26, 2008
The University of Arizona
Pre-requisites For ECE 462/562
Office Hours & Textbook
Attendance & Grading Policy
Communication Between Students-TA-
ECE 462/562 Course Focus
Understanding the design techniques, machine
structures, technology factors, and evaluation
methods that will determine the form of
computers in 21st Century, be it for desktop,
server, embedded, supercomputing, etc.
Computer Architecture is at the heart of this!
• Instruction Set Design Interface Design
• Organization (ISA)
Operating Measurement &
Digital Logic (ECE 274 or equivalent) .
Basic Machine Structure: processor, memory,
I/O, etc or
ECE 369 or equivalent.
Some assembly language programming.
Some programming in a high-level language
such as C.
Use of basic Unix commands; refer to the ECE
OFFICE HOURS & TEXTBOOK
Instructor: Prof. Ahmed Louri
– Office Hours: 3:30 – 4:30pm, Tuesday, Thursday, in ECE Room 456S
– Phone - 520 621 2318
– E-mail: firstname.lastname@example.org
TA: Arjun Hary (E-mail: email@example.com)
– Office Hours: 2:00 – 3:00pm, Tuesday, Thursday in ECE Room 250
– Lab Hours: 2:00 - 4:00pm Monday, Friday in ECE Room 250
“Computer Architecture a Quantitative Approach” J.L. Hennessy and D. A.
Patterson, Morgan Kaufmann Publishers, Fourth Edition
(having access to previous editions will be helpful but you need the 4th
In addition to the book, this course includes a number of reading papers from
recent conferences and journals. Such papers are very important and are
required reading for this course.
This course is designed to introduce senior-level and first-
year graduate students to the fundamental design principles
and major design tradeoffs in computer architecture. It is
designed to provide students with basic knowledge and
ability required for understanding, evaluating, and
designing standard and novel computer architectures.
At the end of this course, students will :
(1) know the fundamentals of computer architecture and
(2) be able to appreciate the various design issues and
tradeoffs of computer design
(3) be able to apply this knowledge to solve various design
problems creatively, and
(4) be able to understand current trends and future directions
of computer architecture.
COURSE OBJECTIVES (continued)
In-depth understanding of the inner-workings of
computers, their evolution, design trade-offs, and
where the computer field is heading.
Gain experience with the design process in the context
of a large hardware system: computer design, from the
functional specs to physical implementation.
Computer architecture impacts EVERY other aspect of
computer engineering and computer science.
It is a unifying field for hardware and software.
COURSE OUTLINE (a sample only)
Fundamentals of computer design (technology, cost, quantitative
Instruction Set Design (subject of ECE 369 - very briefly, if at all)
Processor design (from every aspect)
Pipelining: principles and advanced topics
Instruction Level Parallelism
Principles of Multithreading
Thread Level Parallelism
Hierarchical Memory Design & Cache Design
Interconnects and Buses
I/O System Organization
Parallel Processing Principles
Multi-core Processor Design
ECE 369: Fundamentals of computer systems:
(computer organization and hardware): how does a
computer work and how to build it.
ECE 462/562: Computer Architecture : not only how
to build a computer but also how to evaluate,
analyze, compare it, and possibly improve it.
ECE 568: introduction to high-performance
computing and parallel processing
ECE 569: advanced parallel processing systems
ECE369 then ECE 462/562 then ECE 568 then ECE
What will you get out of ECE462/562
Critical performance measures and benchmarks
Processor design techniques (principles & state-of-the-art concepts)
Memory hierarchy design techniques and critical design issues
Pipelining and Parallelism
Static / Dynamic Scheduling
Multi-core processor design
Interconnection schemes and networks
Understanding Technology Trends and limitation: power, reliability,
Experience in designing an entire system (through modeling and
Ability to pursue advanced graduate degrees (MS,Ph.D) in high-
performance computing, and networking
Ability to pursue a career in computer systems design
Class consists of lectures, homeworks, lab assignments,
exams, and a project (project for graduate students
Two lectures per week and lab sessions.
Lectures delivered by Instructor, lab sessions and
discussion delivered by TA.
Most assignments consist of two parts:
- Homework problems: theoretical in nature (problems
similar to the ones at the end of each chapter in the book)
- Lab assignments: require programming
There will be approximately eight to nine assignments
(homeworks and lab assignments)
Three exams (three independent exams, no
comprehensive final) (pros and cons).
COURSE WORKLOAD (continued)
Class attendance is required and taken into consideration
for final grade.
It is not compulsory to attend all lab sessions, but highly
recommended that you show up for at least one session.
Studying together in groups is ok but :
Work handed in for grade (homework, lab assignment,
term paper, etc.) MUST BE YOUR OWN.
It is the student responsibility to review and refresh on
You will be doing a lot of reading in this class. Besides
the textbook, I will provide you with papers dealing with
recent advances and developments in the field. Some of
these papers will also be required reading.
COURSE WORLOAD (continued)
I have to explicitly state this per University policy:
Cheating in ECE 462/562 will automatically result in
failure and possible expulsion from the ECE and the
Examples of cheating include:
- Submitting someone’s work, or something very similar
(both assignments will result in zero, both students will
fail the class)
- Downloading a solution/program from somewhere and
submitting it as your own.
- Plagiarizing someone’s work and submitting it as your
own for the project.
If you use someone’s work as a reference or a starting
point, it MUST be cited and clearly indicated.
Grading Policy for Undergraduates
For Undergraduate students:
Three Exams 60%
Lab/Homework Assignments 30%
Class participation 10%
No late homework or labs accepted.
No partial credits on assignments:
- it works to the specs of the problem, you get a grade
- it does not work to the problem specs, you get zero.
No make-up exams.
Grading Policy Graduate Students
For graduate students:
Three exams 50%
Homeworks / Lab assignments: 25%
Term Project 20%
Class participation 5%
For graduate students this course has a larger significance, next slide
For graduate students, this course represents a transition from
coursework to the research world.
You can consider yourself a researcher now.
In research, you are supposed to be able to:
1) do investigative work on a particular topic: ability to rapidly
scan and understand research papers (key to your success)
2) document your findings (in terms of technical papers)
3) disseminate your findings through conference and journal
4) present it and defend it in front of the scientific community.
This course and the project will significantly help in this
Transition from a good student to a good research colleague!
Grading Policy (continued)
Homeworks/Lab assignments must be turned in
You will use a turn-in program to submit the homeworks
DO NOT E-MAIL ME YOUR HOMEWORK, LAB, OR
EXAM IT WILL NOT BE GRADED!
Please refer to Please Read Me First link on the class
website regarding how to use turn-in.
Your grades will be displayed on the website. For this
purpose, you will be assigned by the TA a unique
number which will neither be your SSN nor Student ID.
This way you can monitor your grades and your progress
in class online at anytime.
TA & Website Information
The TA is Mr. Arjun Hary.
E-mail accounts are required for every student enrolled
in the class, on Unix as well as Windows machines at
the ECE Dept.
Lab Hours in ECE 250 (M,F: 2-4pm)
Office Hours in ECE 250 (T, Th: 2-3pm)
Please check the ‘Please Read Me First’ link on the
course website (http://www.ece.arizona.edu/~ece462).
- Account creation
- Mailing List for the class
- Turnin procedure for assignments
TA & Website Information
The lab sessions will be held in Room no. ECE 250. The other labs
which can be used by the students are Room no. ECE 232 and ECE
Room ECE 250 (open between 8am-5pm, unless reserved)
Room ECE 232 (open between 8am-5pm)
Room ECE 229 (open between 8am-11pm)
PLEASE locate the rooms and the resources available. Do not wait until due
Website will be password-protected: once we verify you are
registered for the class, you will provided with a password.
Simulators – WinMIPS64 (on Windows based machines), Dinero4
(on Unix based machines)
(You can follow instructions on the class website for accessing
E-mail (firstname.lastname@example.org) in case of any problems!
CLASS FORMAT (Prof. Louri)
The lectures will be on PowerPoint. Occasional writing on the
Please arrive on time to the class.
The PowerPoint presentations are only main bullets of the lecture.
Details and explanations are given in class.
Suggestion 1: print the class material beforehand, and try to write
down what I say in class on the ppt printout. Also, I would
encourage you to read the relevant chapter before the lecture
Questions are allowed and highly encouraged during the lecture.
Please do not hesitate to ask questions anytime during the lecture.
PLEASE DO NOT SLEEP IN CLASS! It is disturbing to the
instructor as well as to your classmates. Please turn off phones,
Suggestion 2: please have a light lunch or a snack only before
class. Having a heavy lunch will definitely interfere with your
ability to follow the entire lecture!
Need to check the website daily. Important announcements
related to the course will be posted on the course website.
My goal is to :
– Show you how to understand the fundamentals of
computer architecture in its present form and its
evolution in the future.
– Show you how to design by leading you through the
process on challenging problems.
– Open the door for learning for you: you need to walk
through the door!
I want you to succeed in achieving your goals
– easy transition from undergrad to grad studies
– easy transition to the industrial world
– well prepared for graduate studies
CLASS INTERACTION (continued)
– Show initiative
– Ask questions during class
– Come to office hours
– Find me in the lab, or my office if you can’t make it to office
– Do not listen to rumors about such and such professor. Most of
the time these are false and driven by ulterior motives.
– Don’t be intimidated, keep in mind that in the learning process
EVERY QUESTION IS A VALID QUESTION !!! There is no
such a thing as a stupid question! Of course, this does not hold
during the exams
– If you don’t understand ask, ask, ask!
– Be proactive and you will succeed !!
Homework #0 (for credit)
Design Your Own web site with your
picture in the page.
Upload the information sheet on YOUR
website by downloading it from the
Send the URL to the TA.
Please refer to Please Read Me First link
on the website.
DEVELOP YOUR HOME PAGE FOR ECE 462/562
Your Your Major & Year:
Picture E-mail Address:
About Yourself (brief)
How you can be reached:
A Research Assistantship for this semester is available for a
graduate student. This assistantship will lead to an MS and/or
1) On-chip networks for Multi-core processor architectures with
applications to embedded and low-power systems.
2) Self-reconfigurable and fault-tolerant
Please contact me for an appointment. For contact information, please
visit my lab website
High Performance Computing Architectures &
Scalable Inter-board Interconnect
Optical Interconnection Networks for
Optical Tx/Rx Large Scale Parallel & Distributed
• Performance-adaptive, Power-aware, Fault-tolerant &
Board 0 Board B-1 Scalable Optical Interconnection Networks.
Multi-Core architectures & Network-
Processing Nodes On-board interconnect • Design of Modular, Fault-tolerant, Low-Power, Area-
efficient interconnects such as the NoCs for next
(0,3) (1,3) (2,3) (3,3) generation Multicore ICs
NoC Router Simulation Relevant Courses:
(0,2) (1,2) (2,2) (3,2)
• Computer Architecture & Design
• Introduction to Parallel Processing
Core(0,1) (1,1) (2,1) (3,1) Simulation
• High Performance Computing – Technology, Architecture
(0,0) (1,0) (2,0) (3,0) Potential Impact :
Simulation Research & Development of next-generation
power-aware, fault-tolerant, high-performance
Work to be done
• Design & Development of Reconfigurable & Scalable computing architectures & technologies.
Optical Interconnection Architectures for next
generation High-Performance Computing Systems Prof. Ahmed Louri
• Design, Modeling & Evaluation of state-of-the-art email@example.com
Network-on-Chip (NoC) architectures and Low-Power
For more info : http://www.ece.arizona.edu/~ocppl