The Teaching olf VHDL in Computer Architecture
Tsai Chi Huang, Roy W. Melton, Philip R. Bingham, Cecil 0. Alford, and Farzad Ghannadian Computer Engineering Research Laboratory, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, Georgia
Abstract
There are problems in incorporating VHI3L into the undergraduate curriculum's beginning computer architecture courses. The problems relate mainly to cost arising from two factors: VHDL tool avai1,ability and proper lecture material to coincide with the course objective(s). A t the Georgia Institute o Technology, f pilot VHDL lecture materiuls have been developed to address these two issues. VHDL,. VHDL is an ideal tool for students to learn about computer architecture at a detailed level because of its ability to model digital system components. At the Georgia Institute of Technology, VHDL lessons have been created to complement an introductory computer architecture class using the VHDL synthesis tool, Cypress Warp. They are designed to instruct key concepts rather than to be a VHDL syntax reference, such as reference
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Introdluction
VHDL, very high-speed integrated circuit (VHSIC) hardware description language, has became an important tool in designing and testing complicated digital systems using thousands of gates. VHDL popularity has risen in the digital engineering world because of its siinplistic yet powerful modeling capability. In addition, the VHDL language has evolved through an IEEE standardization process. While reaching maturity in industry as a digital modelirig and hardware syntlhesis tool, VHDL faces many obstacles in academia for use as a digital system design teaching tool, especially for undergraduate courses. The first problem is the availability of VHDL tools for student use outside class to relieve the problem of school laboratory resource contention. Personal computers have become a very common tool for students' home use due to their low cost and widespread appeal. However at present, there is not a suitable VHDL program that fits into a siudent's budget. The ideal VHDL tool should cost students no more than the price of a text book. A second problem is the focus of VHDL learning topics. The goal of using VHDL in academia for beginning undergraduate computer engineering students is different from industrial usage goals. The industry setting requires lessons for someone with plenty of digital experience and no VHDL background. As a result, current VHDL references and texts offer lessons oriented towards the experienced digital designer, making it very difficult for beginning engineering students (who lack this background) to grasp
The Cypress Warp synthesis tool consists of a complete VHDL development suite that can be purchased within a student's budget. The development suite comes with an editor, a synthesis tool for Cypress complex programmable logic devices (CPLD), and a simulator that simulates the VHDL conversion of JEDEC code into waveforms. Due to the fact that Cypress Warp is a synthesis tool, using it to model digital systems at a high level can exhaust its capabilities. Nevertheless, the Cypress Warp tool is very good for students to learn how digital logic works in detail and also gives them the ability to build a logic block and study its output. Tlhe VHDL course material created consists of six lessons designed to be taught in a one quarter course. Each lesson is intended to last two weeks. These lessons range from the gate level to the computer architecture ALU (datapath level. However, the lessons do not give students detailed information about VHDL language syntax. Instead, they reveal only important and complex VHDL concepts. In addition, they give many examples of how VHDL can be used to create computer architecture components through hardware synthesis, including text book examples [2].
VHDL lecture notes organization
The six VHDL lessons for the beginning computer architecture class are: VHDL-Hardware Design Sof7wai-e Approach; VHDL Behavior and Structure Model's; State Machine and Programmable Logic Devices; Digital Device Modeling; Digital Design Using Divide and Conquer; and, ALU Datapath Implementation. Each lesson constitutes a chapter of the laboratory book.
0-8186-7996-4/97$10.00 0 199'7 IEEE
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The first chapter, VHDL-Hardware Design Software Approach, covers the essence of the VHDL programming language. The material assumes students have some prior experience with an imperative programming language (e.g., C, FORTRAN, BASIC, etc.). This lesson emphasizes parallel and object programming. Since VHDL contains features closely related to these concepts, this lesson lays a foundation for learning VHDL. In the notes, a hands-on example of using a primitive logic gate to make simple circuits in VHDL is investigated: creating a binary to BCD converter. The second lesson introduces conceptual VHDL modeling paradigms. It presents various constructions of the same circuit through VHDL structural, dataflow, and behavior modeling, using digital memory elements such as flip-flops and latches as examples. The resulting and intermediate waveforms are observed from the simulated circuit to illustrate the fundamental learning of digital memory elements. The next lesson extends modeling paradigm concepts by introducing state machines and their construction from programmable elements. It studies closely the syntax and semantics of the VHDL entity and architecture statements, whereas, in the previous lesson, they were used with little explanation. Both Moore and Mealy type state machines are used as implementation examples. Conversion algorithms between Moore and Mealy machines are also implemented and tested in VHDL to observe the differences in output waveforms. The fourth lesson deals with the modeling of realworld digital components. It stresses the concept of using VHDL process blocks where the execution of each process block is simulated in parallel. The SRAM memory device is introduced to students as an example for making a VHDL model and studying its execution characteristics . The following lesson uses the basic VHDL building block to create a more complicated digital system such as an ALU block. It introduces the concept of structured programming which uses VHDL function, procedure, and component statements to simplify the VHDL design process by breaking the large problem into smaller problems. The use of library and package statements further enforces the concept of VHDL object-based programming. As an example, an ALU block containing simple logical, add, and shift function blocks is implemented. Notice that the synthesis nature of the tool limits the implementation of complicated circuits, so a 4bit ALU was chosen to demonstrate necessary concepts while not overloading the logic fitting capabilities for the VHDL simulator. In the last chapter, having learned all the basic ingredients of VHDL and the fundamental digital elements, students extend their knowledge to create a
more realistic VHDL circuit: an ALU datapath. The topdown and bottom-up design approaches are used to implement an ALU datapath using the example in reference [2] (the course text book) shown in Figure 1. After constructing the ALU datapath, a simple sequence of instructions (shown in Figure 2) is simulated, and the intermediate results are observed. Again, due to limitations of the current VHDL tool, further simplification to the ALU block (such as reducing functionality) and memory element (smaller size) are required to ensure the fitting and thus simulation of the ALU datapath implementation.
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Figure 1. ALU Datapath Block Diagram
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Figure 2. Test Instructions
Conclusion
Currently, the VHDL notes are distributed to secondyear undergraduate students in their introductory computer architecture course. In addition to learning concepts of computer architecture, the students also get hands-on experience i n creating actual architectural components using VHDL. The use of students’ personal computers eliminates laboratory contention for these students, leaving resources available for the upper-class students. The authors would like to thank Mr. Bill Bradford and Mr. Paul Dieffenderfer of Cypress Semiconductor for their generous assistance with materials, technical support, and encouragement.
References
[ I ] Peter J. Ashenden, “The VHDL Cookbook,’’ Dept. of
Computer Science, University of Adelaide, South Australia (1 990). [2] David A. Patterson and John L. Hennessy, “Computer The Hardware/Software Organization and Design: Interface,” Morgan Kaufmann Publishers Inc. (1 994).
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