Capacitor Charge-Discharge Circuits

Document Sample
Capacitor Charge-Discharge Circuits Powered By Docstoc
					                                                                          APPLICATION NOTE AN-0001
             CAPACITOR CHARGE/DISCHARGE CIRCUITS
                                              By:ABHIJIT D.PATHAK


   There are many applications which require                   14N08,assuming mains input voltage is 440
pulse power. The needed burst of energy is de-                 VAC, 50Hz/60 Hz. If 550 VAC,3 phase is avail-
rived by rapidly discharging a previously charged              able, one can use VUO 36-16N08 and likewise
capacitor .As the energy stored in a capacitor is              for 575 VAC, choose VUO 36-18N08.The cur-
equal to 1/2CV2, higher voltage gives consider-                rent rating also depends on the number of ca-
ably greater pulse power.                                      pacitors connected in parallel and, therefore, their
   There are many applications of pulse power,                 total capacitance. The rectified power is filtered
such as pulse lasers, which may be used for cut-               by a D.C.Choke, made up of four “C” cores
ting or welding or flashlamps, which may be used               (manufactured from annealed 0.23mm strips of
to generate flashes of high intensity light. All these         CRGO grade silicon iron ), arranged in such a
and many more applications require bursts of                   way that with the specified air gap, and copper
energy that can be derived from fast discharge                 strip wound on a bobbin, it gives just adequate
of a previously charged capacitor.                             inductance at the operating D.C. current without
   The capacitors used in these types of equip-                saturating.
ments are high voltage energy storage capaci-                      An electrolytic capacitor filters the D.C. bus.
tors that need to be carefully charged by a spe-               Please note the fast acting fuses placed strate-
cially designed “Capacitor-Charging Power Sup-                 gically to protect semiconductors. A shunt placed
ply” CCPS. Fig(1) depicts charge and discharge                 just between the common return path of the in-
cycle of the capacitor (or banks of capacitors in              verter and 3-phase bridge rectifier can enable one
parallel, depending on the energy required), in                to pick the voltage off the shunt and, after proper
which one can easily see the soft and slow charg-              conditioning, use it to shut off the inverter in case
ing cycle and the abrupt discharge. Notice also                of overload or short circuit. Likewise, one can also
the trickle charge or refresh mode, which imme-                put Current transformers on each incoming mains
diately follows the charge mode.                               and use that to monitor the load and also to use it
   In order that these capacitors be charged in the            to trip the shunt operated circuit breaker in case
shortest possible time, without causing undue                  of malfunction or overload. Notice the line filter
stresses on semiconductors or wound compo-                     inductors (Lf) placed in series with each phase.
nents, it is advisable to use high frequency reso-             This is generally constructed out of E+I cores (
nant mode ZCS inverter operating between 20                    with identical three limbs, and three identical bob-
to 30 KHz. IXYS Corporation’s BIMOSFETs can                    bins) wound with required gauge polyester insu-
perform creditably as switches for this resonant               lated copper winding wire, and a required air gap
mode inverter.The chosen devices: IXBH40N140                   between stack of “E” and stack of “I”. The geom-
or IXBH40N160 depending on Mains Voltage.                      etry, number of turns and air gap determine the
For calculating the inductance of the resonating               inductance and saturation flux density of this filter
choke, leakage inductance of the step-up trans-                inductor, whose purpose it is to reduce the di/dt
former (as reflected on the primary side) has to               and, in conjunction with three Cf (filter capacitors),
be taken into account.                                         to filter out the unwanted noise, spikes from
                                                               mains.
   The incoming mains are first rectified by a 3-
phase rectifier bridge, e.g. VUO36-                               As the resonant inverter operates at a frequency
                                                               in the range of 20 to 30 khz, the step-up trans-
« 2000 IXYS Corporation                                        1
               IXYS Corporation; 3540 Bassett Street; Santa Clara, CA 95054; Tel: 408-982-0700; Fax: 408-496-0670
       IXYS Semiconductor GmbH; Edisonstr. 15; D-68623; Lampertheim, Germany; Tel: +49-6206-503-0; Fax: +49-6206-503627
former is quite small. The inverter can be oper-              lar requirement of power.
ated with variable frequency and a predefined duty               Classical design procedures can be followed
cycle for ON and OFF, so as to satisfy the ca-                for designing resonant inductor, high frequency
pacitor charging requirement.                                 transformer and high frequency filter inductor.
   Please note the high speed bridge rectifier,               THE CONTROL CIRCUIT
VBE 20-20N01, made up of FRED Diodes and
                                                                 D.C. to A.C. Inverters operating at High Volt-
having PIV of 2000 Volts, just right for charging
                                                              age and High Frequency tend to gain significant
capacitor to 1000 V . A carefully designed high
                                                              advantages when using resonant mode and zero
frequency choke controls rate of in-rush current
                                                              current switching technique due to reduced
into the capacitors and also filters the rectified
                                                              switching losses.
power.
                                                                 The Control Circuit consists of UC 3865,reso-
   Two or more IXBH 40N160 BIMOSFETs op-
                                                              nant mode controller in ZCS ( Zero Current
erating in parallel, to match the current require-
                                                              Switched) mode. This circuit is shown in Fig.(7).
ments of the pulse load, can handle the
capacitor’s abrupt discharge functions.                          Rmin together with Rrange and Cvco determine
                                                              the operating frequency. For the application of
HIGH FEQUENCY TRANSFORMER, RESO-
                                                              capacitor charging using BIMOSFETs , one can
NANT INDUCTOR AND HIGH FREQUENCY
                                                              choose frequency in the range of 20 to 30 khz,
FILTER CHOKE
                                                              wherein optimization is obtainable. Rmin sets the
   It is proposed to use Amorphous Metal Cores                minimum frequency, while Rrange in conjunction
for building the above three wound components.                with P5 can set the operating frequency. Output
Several advantages ensue all at once, when                    voltage is fed back into R4 . P2 can help decide
Amorphous Metal Cores are chosen, instead of                  level of this feedback (proportional value); R5 ,
Ferrite, Powdered iron or CRGO cores. These                   P3 , and C5 determine lead (or velocity or de-
are listed below, as benefits over conventional               rivative) compensation, while P4 , C2 and R6
cores:                                                        determine level of lag (or Integral) compensation.
   1.Temperature rise:          Reduced                       Optimum adjustments can yield stable value of
   2. Energy Efficiency:       Increased                      output voltage, within preset value(with minimum
                                                              error) and with desired level of stability. Please
   3.Compactness :             Increased
                                                              note that the circuit has soft start feature, which
   4. Reliability:              Increased                     comes into effect, every time inverter is restarted.
   5.Application Freq. Range:Higher                               Resonant current in the inverter bridge is
   6.Cost :                     Reduced                       sensed by Hall effect transducers. For rectifica-
   The above advantages accrue, because of cer-               tion use either Schottky Diodes or FRED (Fast
tain intrinsic properties of Amorphous Materials,             Recovery Epitaxial Diodes) made by IXYS COR-
which offer lower core losses, even while operat-             PORATION. After filtering, it is sensed as a volt-
ing at relatively higher flux densities, exhibiting           age across R3 . This is fed into “zero” input di-
excellent permeability and high frequency perfor-             rectly. R1 and P1 help adjust the fault level of this
mance. Ferrites are brittle requiring extreme care            current before feeding this signal into “Fault” pin
in handling. Unlike Ferrites, Amorphous Metal                 of UC3865. Hin and Lin are the outputs of this
Cores are quite rugged and requires no special                ZCS resonant mode controller. Hin and Lin are
care. They are available as “Torroids” and/or “C”             fed into the Driver Circuit, which, in-turn, can drive
Cores in various shapes & sizes to meet particu-              four BIMOSFETs in the “H” Bridge forming high
                                                              frequency inverter.


                                                              2
              IXYS Corporation; 3540 Bassett Street; Santa Clara, CA 95054; Tel: 408-982-0700; Fax: 408-496-0670
      IXYS Semiconductor GmbH; Edisonstr. 15; D-68623; Lampertheim, Germany; Tel: +49-6206-503-0; Fax: +49-6206-503627
                                                       bootstrapping technique or use galvanic isolation
BIMOSFET DRIVER CIRCUITS                               (using opto-coupler or transformer) to drive the
                                                       upper BIMOSFETs. Bootstrapping technique is
    BIMOSFETs are new improved devices, which
                                                       used in Fig(3). It is always wise to use negative
fulfil the special requirements of high voltage
                                                       bias on the gate of non-conducting BIMOSFET
MOSFETs having lower conduction losses. Until
                                                       in the “H”Bridge. Fig(3) depicts how -ve bias is
the arrival of IXYS CORPORATION’s 1600V
                                                       generated for upper and lower BIMOSFETs.
BIMOSFETs, one had to connect two(say, 800V)
                                                       Please note that for the Driver IC chosen, one
MOSFETs in series to get a high voltage
                                                       can’t exceed a total power supply voltage of 20
MOSFET, with its attendant driving complexity.
                                                       volts; hence we have chosen -3.9 volts. Note that
The available IGBTs were too slow for some ap-
                                                       a low current sensitive zener with sharp knee and
plications. The technical specifications of the en-
                                                       1% tolerance should be chosen.
tire range of BIMOSFETs are available from IXYS
CORPORATION.                                              In order to protect the gate-emitter junction of
                                                       the BIMOSFETs, two 18V Zeners, connected
    Their internal construction is different from both
                                                       back-to-back are put across the junction. Here
MOSFETs and IGBTs; however, they can be
                                                       again choose low current sensitive zeners with
driven easily, using any MOSFET/IGBT driver.
                                                       sharp knee and 1% tolerance of Vz. Rb provides
H-BRIDGE DRIVER CIRCUIT, USING a bleed off path for stray charge, that might have
BOOTSTRAPPING TECHNIQUE, WITHOUT accumulated between gate and emitter junction
OPTO-ISOLATION                                         of the BIMOSFETs, to facilitate faster switch-off.
    Fig(3) shows this circuit with all the necessary      Rg sits in between the output pin of Driver IC
details required to build it for driving BIMOSFETs. and gate of BIMOSFET. Selection of proper value
It is necessary first to understand the driving re- of this resistor depends on various factors; pri-
quirements for BIMOSFETs, connected in “H” mary among them is speed, with which to turn on
Bridge configuration. Note that the primary re- the BIMOSFET. Another effect is that of dv/dt (of
quirement of any driver is to be able to charge the Collector-to-Emitter voltage, during switching),
the gate-source or gate-emitter capacitance, with which could, by charging the Collector-Gate-Ca-
required speed. Another requirement is to have pacitance, force a large current out of the gate,
minimum propagation delay, guaranteeing very which may damage the output stage of the Driver
quick response time between occurence of over- IC. Presence of sufficient value resistance, be-
load /short circuit and switching off of the tween output of the Driver IC and Gate of
BIMOSFETs. In fact, the Control Circuit described BIMOSFET, prevents this from happening. It is
above will just do that. A TWO-INPUT-AND gate appropriate at this juncture to talk of the impor-
continuously monitors gate signals Hin and Lin tance of properly selected snubber circuit, con-
(for upper and lower BIMOSFETs in the “H” sisting of non-inductive low value power resistor
Bridge), and in the unexpected event of simulta- connected in series with optimally chosen
neous occurence of the two, the AND gate gen- prolypropelene capacitor.This snubber is highly
erates a LOGIC HIGH and the Driver IC will stop recommended and by using it, one is lowering
the output for that much duration. This way, cata- the dependence of Rg on dv/dt related compul-
strophic punch through between upper and lower sions. If by any chance one is trying to connect
BIMOSFETs can never ever occur.                        two BIMOSFETs in parallel to increase current
    “H” Bridge configuration has another unique re- carrying capacity, then presence of Rg in series
quirement, that is the upper BIMOSFET ‘s emit- with gate of each BIMOSFET helps in ensuring
ter is not at the ground potential, but is floating, simultaneous Turn-On and Turn-Off of the two
making it necessary to either employ BIMOSFETs connected in parallel. An optimal

                                                              3
              IXYS Corporation; 3540 Bassett Street; Santa Clara, CA 95054; Tel: 408-982-0700; Fax: 408-496-0670
      IXYS Semiconductor GmbH; Edisonstr. 15; D-68623; Lampertheim, Germany; Tel: +49-6206-503-0; Fax: +49-6206-503627
value of Rg ,say, 22 Ohms can thus be chosen.                 of generating isolated + & - 15 VDC power sup-
  A fast switching diode (such as 1N4148) con-                plies. Alternatively, D.C. to D.C. converter (or A.C.
nected inversely across Rg helps very fast turn-              to D.C. PFC switcher) can be used with multiple
off of the BIMOSFETs. If necessary, a low value               isolated + & - 15 VDC supplies.
resistor can be connected in series with this                    Rb helps provide a bleed of path for any accu-
switching diode to obtain soft turn-off.                      mulated stray charge on gate-emitter capacitance
  For most applications, Driver ICs, which have               of the BIMOSFETs, while the 18 V zeners con-
D.C. Bus specification of 500 VDC will work.                  nected back to back ensures that the gate never
However, for those applications demanding                     ever receives any signal higher than 18.7 volts of
higher D.C. Bus voltages, up to, say, 1200 VDC                either polarity. Note the simple technique used to
another Driver IC is suggested in Fig(3).                     provide designer with independent choices for
                                                              selecting Rg ON and Rg off. This enables one to
  For the sake of completeness, Fig(4), depicts
                                                              design in the turn-on and turn-off speed of the
suggested circuit diagram for BIMOSFETs con-
                                                              BIMOSFETs. A properly designed snubber net-
nected in 3 phase bridge configuration. All the
                                                              work of Rc and Cc across each BIMOSFET en-
above comments apply to this Driver circuit as
                                                              sures that BIMOSFETs do not turn- On inadvert-
well.
                                                              ently due to dv/dt . For the sake of completeness,
MOSFET/ BIMOSFET/ IGBT DRIVER CIR-                            Fig(6) depicts similar circuit for driving
CUIT WITH OPTO-ISOLATION FOR “H”                              BIMOSFETs in a 3 phase bridge inverter configu-
BRIDGE INVERTER                                               ration.
  Fig(5) depicts complete circuit utilizing opto-             PULSED LOAD
isolators, identically for each switching device in
                                                                 Once the energy storage capacitor is fully
the “H” Bridge. Needless to say, the lower
                                                              charged, the pulsed load can be turned on by one
switches in the bridge actually do not require opto-
                                                              or more BIMOSFETs, depending on the load cur-
isolation, as they are referenced to common
                                                              rent. This can be controlled by sensing the volt-
ground. The logic behind making identical chains
                                                              age across the CL and turning On S5 . As soon
of opto-isolators and push-pull matched transis-
                                                              as the CL is discharged the control circuit, starts
tor pairs is to guarantee same propagation de-
                                                              its soft charging cycle, with designed in charging
lays for the gate signals for all switches in the “H”
                                                              time. Note that IXBH 40N160 can easily handle
Bridge, so when they arrive at the gate of the
                                                              1000 VDC as final voltage on the CL and in a
switches, they bear the same phase relationships,
                                                              transient voltage free environment, this can be
as when they were fed into the driver circuit.
                                                              extended upto,say,1200 or even 1300 VDC,
  Note that the input signals are individually fed            which will give greater energy storage capability.
into darlington transistor arrays so as to boost
                                                                 If a higher D.C.Bus voltage is available, high
their current capacity. These, in turn, are fed into
                                                              frequency high voltage transformer can be done
high speed opto-couplers. The output of the opto-
                                                              away with and the CL can be directly charged by
coupler is fed into matched transistor pairs of
                                                              the same circuits described above.
PNP & NPN through a resistor. Note the elabo-
rate bypassing of isolated power supplies, near                  The versatility of this system lies in its ability to
the transistor pairs with high quality capacitors             charge a variety of energy storage capacitors for
(having minimum ESR & ESL).                                   many different types of pulsed loads. The reso-
                                                              nant frequency of the Full Bridge Inverter is deter-
  For both upper BIMOSFETs in the “H” Bridge,
                                                              mined by value of total inductance and capaci-
isolated power supplies are used to power the
                                                              tance (both distributed and lumped) in series. The
PNP-NPN matched transistor pairs. A complete
                                                              capacitance of the energy storage capacitor,
power supply circuit is shown as one of the ways
                                                              4
              IXYS Corporation; 3540 Bassett Street; Santa Clara, CA 95054; Tel: 408-982-0700; Fax: 408-496-0670
      IXYS Semiconductor GmbH; Edisonstr. 15; D-68623; Lampertheim, Germany; Tel: +49-6206-503-0; Fax: +49-6206-503627
being charged, is reflected to primary by multi-              pacitors are being charged.
plying its value by square of the transformer turns              If capacity doubling is called for, two
ratio(i.e.Crefl= Cx(Ns/Np)2 By changing the rate              BIMOSFETs can be paralalled in the “H” Bridge
of charging, one can keep the same current                    as well as in series with the pulsed load. Vce(sat)
through resonant circuit, for some variations in              and Vf of BIMOSFET have a positive tempera-
capacitance values. As this high value capaci-                ture co-efficient. This makes it very easy for them
tance, when reflected to primary, is effectively              to be paralleled. Even the forward voltage drop
connected in series with Cr and Lr, the net series            of the Anti-Parallel diode, having same current
effective value of capacitance, which determines              rating as the BIMOSFET, has a positive temp.
the resonant frequency, is nearly same as Cr. This            co-efficient, enabling it also to share currents
is, because when one very small value capacitor               equally, when connected in parallel. It is, of course,
and one very large value capacitor are connected              understood that similar doubling of capacity will
in series, the net effective value is approximately           entail choosing appropriately rated higher capac-
equal to the small value(1/Ceff=1/Cr+1/Crefl                  ity 3-phase rectifier from a number of available
where Ceff stands for effective value of net ca-              units from IXYS CORPORATION. One can then
pacitance which determines resonant frequency,                choose fuses and MCBs (with proper i2t rating)
Crefl=value of energy storage capacitance re-                 and bigger filters. For output single phase high
flected to primary, Cr=lumped value of capacitor              speed rectifier, a full range of FRED diodes are
connected in series with Lr). This is the virtue of           available from IXYS CORPORATION. A full
the chosen series resonant inverter, which unlike             bridge rectifier can easily be constructed, using
parallel inverter, operates at the same frequency,            these FRED diodes.
even though different value energy storage ca-




                             Fig. 1 Charge/Discharge Cycle of Energy Storage

                                                              5
              IXYS Corporation; 3540 Bassett Street; Santa Clara, CA 95054; Tel: 408-982-0700; Fax: 408-496-0670
      IXYS Semiconductor GmbH; Edisonstr. 15; D-68623; Lampertheim, Germany; Tel: +49-6206-503-0; Fax: +49-6206-503627
                                                        6
        IXYS Corporation; 3540 Bassett Street; Santa Clara, CA 95054; Tel: 408-982-0700; Fax: 408-496-0670
IXYS Semiconductor GmbH; Edisonstr. 15; D-68623; Lampertheim, Germany; Tel: +49-6206-503-0; Fax: +49-6206-503627
                                                        7
        IXYS Corporation; 3540 Bassett Street; Santa Clara, CA 95054; Tel: 408-982-0700; Fax: 408-496-0670
IXYS Semiconductor GmbH; Edisonstr. 15; D-68623; Lampertheim, Germany; Tel: +49-6206-503-0; Fax: +49-6206-503627
                                                        8
        IXYS Corporation; 3540 Bassett Street; Santa Clara, CA 95054; Tel: 408-982-0700; Fax: 408-496-0670
IXYS Semiconductor GmbH; Edisonstr. 15; D-68623; Lampertheim, Germany; Tel: +49-6206-503-0; Fax: +49-6206-503627
                                                        9
        IXYS Corporation; 3540 Bassett Street; Santa Clara, CA 95054; Tel: 408-982-0700; Fax: 408-496-0670
IXYS Semiconductor GmbH; Edisonstr. 15; D-68623; Lampertheim, Germany; Tel: +49-6206-503-0; Fax: +49-6206-503627
                                                        10
        IXYS Corporation; 3540 Bassett Street; Santa Clara, CA 95054; Tel: 408-982-0700; Fax: 408-496-0670
IXYS Semiconductor GmbH; Edisonstr. 15; D-68623; Lampertheim, Germany; Tel: +49-6206-503-0; Fax: +49-6206-503627
                                                        11
        IXYS Corporation; 3540 Bassett Street; Santa Clara, CA 95054; Tel: 408-982-0700; Fax: 408-496-0670
IXYS Semiconductor GmbH; Edisonstr. 15; D-68623; Lampertheim, Germany; Tel: +49-6206-503-0; Fax: +49-6206-503627

				
DOCUMENT INFO
Shared By:
Stats:
views:10
posted:3/28/2013
language:Unknown
pages:11