Motherboard Study Notes

Document Sample
Motherboard Study Notes Powered By Docstoc
					Motherboard Study Notes
Difference between AT and ATX: AT and ATX are different form factors for Computers. A form factor is the physical layout of the motherboard and its associated case. Changing the design of a motherboard usually means changing the design of the case. There are different variations on the AT design. There is the original AT, and the Baby AT form factor. The Baby AT design is simply a smaller version of the original AT design. It is therefore less expensive to make. A Baby AT motherboard can usually fit inside either a Baby AT case or a full AT case. However, an AT motherboard is too big to fit in a Baby AT case and it therefore must fit into an AT case only. The ATX is a newer design for motherboards and cases. The ATX design uses a different power supply connector and the ATX case cools internal components much more efficiently than its predecessor. In addition to ATX, there is also Mini ATX and Micro ATX. These are smaller versions of the ATX motherboards and cases which adhere to the ATX design specifications, but skimp on expandability. MotherBoard Architecture

1. Slot 1 Connector - this is where your Pentium II or Pentium III processor fits in. If you are using a standard Pentium, AMD K5 or K6, a WinChip or an IBM/Cyrix processor then you will be using a Socket 7 (sometimes called Super 7 for the newer chips) motherboard and the connector will be as shown under the main diagram. 2. ISA (Industry Standard Architecture) Expansion Slots - used to add expansion cards such as sound cards and internal modems. This type of expansion slot has a 16-bit bandwidth with a frequency of 8MHz. They are the older interface and are now being phased out. 3. PCI (Peripheral Component Interface) Slots - these are a newer type of expansion slot than the ISA ones and more components are now making use of them instead of the older slots. They have a 16-bit bandwidth and a frequency of 33MHz. 4. AGP (Accelerated Graphics Port) - these are the newest standard in expansion slots, for use only with graphics boards. The newer model has a 64bit bandwidth and a frequency of 66MHz. 5. Memory Slots - the ones shown are DIMM (Dual Inline Memory Module) slots. Used to add memory to your computer.

6. Jumpers - these are used to configure the options on your motherboard, such as processor voltages etc. The jumper is placed over two pins to cause an electrical connection. Your motherboard manual should tell you the settings for each jumper. 7. Floppy disk and Primary/Secondary IDE channels - used to interface you hard drives, CD-ROMS and floppy drives to your motherboard. The smaller connector is for the floppy drive, and the two larger ones are for IDE (Integrated Drive Electronics) devices such as hard drives and CD-ROM drives. Up to two devices can be used from one channel, so on this motherboard you could have up to two floppy drives with four IDE devices. 8. Front Panel Connectors - these connect to the lights on the front of your system case to notify you of hard disk access, power etc. If you have an ATX style case then a power connector also fits here. The wires that should be connected to these come from the front of the case. 9. Real-Time Clock battery - allows the computer to retain the time when it is powered down. Also retains configuration data from when you first set up your computer. 10. BIOS EEPROM (Basic Input-Output System Electrically Erasable Programmable Read-Only Memory) - The BIOS configures the system resources on your system, and performs the self-check procedure each time you switch on your PC. 11. Ports - connects external peripherals to the system such as a keyboard, mouse and printer. Most modern systems will have one each of PS/2 keyboard and mouse connectors, two serial ports, one parallel port and two Universal Serial Bus (USB) ports. 12. Voltage Regulation - these components help to regulate the power supply to prevent 'spikes' when the power is switched on. 13. Power Supply Connector - this is where the power arrives from your case's PSU (Power Supply Unit). The one shown on this board is an ATX style connector and supports extra features such as auto shut-down and energy saving compatibility. The older AT style connectors have only a single row of pins and don't support these extra features.

Printer Study Notes

What is printer?
In computers, a printer is a device that accepts text and graphic output from a computer and transfers the information to paper, usually to standard size sheets of paper. Printers are sometimes sold with computers, but more frequently are purchased separately. Printers vary in size, speed, sophistication, and cost. In general, more expensive printers are used for higher-resolution color printing. Personal computer printers can be distinguished as impact or non-impact printers. Early impact printers worked something like an automatic typewriter, with a key striking an inked impression on paper for each printed character. The dot-matrix printer was a popular low-cost personal computer printer. It's an impact printer that strikes the paper a line at a time. The best-known nonimpact printers are the inkjet printer, of which several makes of low-cost color printers are an example, and the laser printer. The inkjet sprays ink from an ink cartridge at very close range to the paper as it rolls by. The laser printer uses a laser beam reflected from a mirror to attract ink (called toner) to selected paper areas as a sheet rolls over a drum.


Laser Jet

Dot Matrix

Printer Qualities:
The four printer qualities of most interest to most users are:  Color: Color is important for users who need to print pages for presentations or maps and other pages where color is part of the information. Color printers can also be set to print only in black-andwhite. Color printers are more expensive to operate since they use two ink cartridges (one color and one black ink) that need to be replaced after a certain number of pages. Users who don't have a specific need for color and who print a lot of pages will find a black-and-white printer cheaper to operate.  Resolution: Printer resolution (the sharpness of text and images on paper) is usually measured in dots per inch (dpi). Most inexpensive printers provide sufficient resolution for most purposes at 600 dpi.  Speed: If you do much printing, the speed of the printer becomes important. Inexpensive printers print only about 3 to 6 sheets per minute. Color printing is slower. More expensive printers are much faster.  Memory: Most printers come with a small amount of memory (for example, one megabyte) that can be expanded by the user. Having more than the minimum amount of memory is helpful and faster when printing out pages with large images or tables with lines around them (which the printer treats as a large image).

Printer I/O Interfaces:
The most common I/O interface for printers are described below. parallel In the context of the Internet and computing, parallel means more than one event happening at a time. It is usually contrasted with serial, meaning only one event happening at a time. In data transmission, the techniques of time division and space division are used, where time separates the transmission of individual bits of information sent serially and space (in multiple lines or paths) can be used to have multiple bits sent in parallel. In the context of computer hardware and data transmission, serial connection, operation, and media usually indicate a simpler, slower operation (think of your

serial mouse attachment). Parallel connection and operation (think of multiple characters being sent to your printer) indicates faster operation. This indication doesn't always hold since a serial medium (for example, fiber optic cable) can be much faster than a slower medium that carries multiple signals in parallel. A conventional phone connection is generally thought of as a serial line since its usual transmission protocol is serial. Conventional computers and their programs operate in a serial manner, with the computer reading a program and performing its instructions one after the other. However, some of today's computers have multiple processors that divide up the instructions and perform them in parallel.

Parallel Interfaces Universal Serial Bus USB (Universal Serial Bus) is a plug-and-play interface between a computer and add-on devices (such as audio players, joysticks, keyboards, telephones, scanners, and printers). With USB, a new device can be added to your computer without having to add an adapter card or even having to turn the computer off. The USB peripheral bus standard was developed by Compaq, IBM, DEC, Intel, Microsoft, NEC, and Northern Telecom and the technology is available without charge for all computer and device vendors. USB supports a data speed of 12 megabits per second. This speed will accommodate a wide range of devices, including MPEG video devices, data gloves, and digitizers. It is anticipated that USB will easily accommodate plug-in telephones that use ISDN and digital PBX. Since October, 1996, the Windows operating systems have been equipped with USB drivers or special software designed to work with specific I/O device types. USB is integrated into Windows 98 and later versions. Today, most new computers and peripheral devices are equipped with USB. FireWire FireWire is Apple Computer's version of a standard, IEEE 1394, High Performance Serial Bus, for connecting devices to your personal computer. FireWire provides a single plug-and-socket connection on which up to 63 devices can be attached with data transfer speeds up to 400 Mbps (megabits per second). The standard describes a serial bus or pathway between one or more peripheral devices and your computer's microprocessor. Many peripheral devices now come equipped to meet IEEE 1394. Infrared Printers can also be attached with the help of infrared adapter. A simple diagram of a printer with an infrared adapter is shown below.

Printer Languages:
Printer languages are commands from the computer to the printer to tell the printer how to format the document being printed. These commands manage font size, graphics, compression of data sent to the printer, color, etc. The two most popular printer languages are Postscript and Printer Control Language. Postscript is a printer language that uses English phrases and programmatic constructions to describe the appearance of a printed page to the printer. This printer language was developed by Adobe in 1985. It introduced new features such as outline fonts and vector graphics. Printers now come from the factory with or can be loaded with Postscript support. Postscript is not restricted to printers. It can be used with any device that creates an image using dots such as screen displays, slide recorders, and image setters. PCL (Printer Command Language) is an escape code language used to send commands to the printer for printing documents. Escape code language is socalled because the escape key begins the command sequence followed by a series of code numbers. Hewlett Packard originally devised PCL for dot matrix and inkjet printers. Since its introduction, it has become an industry standard. Other manufacturers who sell HP clones have copied it. Some of these clones are very good, but there are small differences in the way they print a page compared to real HP printers. In 1984, the original HP Laserjet printer was introduced using PCL. PCL helped change the appearance of low-cost printer documents from poor to exceptional quality.

A font is a set of characters of a specific style and size within an overall typeface design. Printers use resident fonts and soft fonts to print documents. Resident fonts are built into the hardware of a printer. They are also called internal fonts or built-in fonts. All printers come with one or more resident fonts. Additional fonts can be added by inserting a font cartridge into the printer or installing soft fonts to the hard drive. Resident fonts cannot be erased unlike soft fonts. Soft fonts are installed onto the hard drive and then sent to the computer's memory when a document is printed that uses the particular soft font. Soft fonts can be purchased in stores or downloaded from the Internet. There are two types of fonts used by the printer and screen display, bitmap fonts and outline fonts. Bitmap fonts are digital representations of fonts that are not scalable. This means they have a set size or a limited set of sizes. For example, if a document using a bitmap font sized to 24 point is sent to the printer and there is not a bitmap font of that size, the computer will try to guess the right size. This results in the text looking stretched-out or squashed. Jagged edges are also a problem with bitmap fonts. Outline fonts are mathematical descriptions of the font that are sent to the printer. The printer then rasterizes

or converts them to the dots that are printed on the paper. Because they are mathematical, they are scalable. This means the size of the font can be changed without losing the sharpness or resolution of the printed text. TrueType and Type 1 fonts are outline fonts. Outline fonts are used with Postscript and PCL printer languages.

Troubleshooting general deskjet printing problems:
Cannot turn on printer  Check that the power cord is connected.  Try connecting the power cord to a different wall outlet.  Remove and reinstall the panel on the back of the printer. Make sure that the removable panel is tightly pushed into the slot and that the Panel Knob is in the Lock position Nothing prints  Check the power. Make sure the power cord is firmly connected to the printer and to a working outlet, and that the printer is turned on. The Power light on the front panel of the printer should be lit.  Be patient. Complex documents containing many fonts, graphics, and/or color photos take longer to begin printing. If the printer's Power light is blinking, the printer is processing information.  Check the paper. Make sure the paper is loaded correctly and that there is no paper jammed in the printer.  Check the print cartridges. Make sure that both the black and color print cartridges are properly installed and that the printer's access cover is closed. The Cartridge light will flash if the print cartridges are not installed correctly.  Try printing a sample page. Turn the printer off, and then on. Press and hold down the RESUME button. Release it when the Resume light starts to blink. If the sample page prints, the printer hardware is working properly. A blank page is ejected  Check that there is no tape covering the ink nozzles on the print cartridges.  Check that the media being used is wide enough. The media width in the page settings and print settings must match.  Check for an empty print cartridge. When trying to print black text and a blank page is ejected from the printer, the black print cartridge may be empty. Replace the black print cartridge. When trying to print using color, and one or more colors do not print properly (or at all), the color cartridge may need to be replaced.  Check the printer setup. Make sure the correct printer is selected as the current or default printer.  Check the parallel port on the computer. If a parallel cable is being used, make sure the printer is connected directly to the computer's parallel port. Do not share the port with other devices such as a zip drive. Placement of the text or graphics is wrong

 The paper size or orientation settings may be incorrect. Make sure the paper size and page orientation selected in the software program match the settings in the HP print settings dialog box.  The paper may not be loaded correctly. If everything on the page is slanted or skewed, make sure the paper width and length guides fit snugly against the left and bottom edges of the paper stack. Also, there should be no more than 150 sheets of paper loaded into the Main Paper Tray or 10 sheets of paper loaded into the Alternative Top Media Feed.  The margin settings may be wrong. If text or graphics are cut off at the edges of the page, make sure the margin settings for the document do not exceed the printable area of the printer. Paper is jammed in the printer NOTE: To clear jammed paper from the printer, open the Access Cover and pull the paper towards you. If you cannot reach the jammed paper, turn the Panel Knob on the back of the printer, remove the panel, pull out the jammed paper, and then replace the panel. If you still cannot reach the paper, raise the Output Tray and remove the jammed paper from the Main Paper Tray. To avoid paper jams, follow the suggestions below:  Make sure nothing is blocking the paper path.  Do not overload the Alternative Top Media Feed. The Alternative Top Media Feed holds up to 10 sheets of plain paper (or other print media that has the same thickness). The Main Paper Tray holds up to 150 sheets of plain paper.  Load paper properly.  Do not use paper that is curled or crumpled.  Always use paper that conforms with those listed in the Printer Specifications section of the User's Guide. Printing a sample page Print a sample page without being connected to a computer. This allows you to see that your printer is set up correctly.

1.Turn the printer off. 2.Disconnect the parallel or USB cable from the back of the printer. 3.Turn the printer on. 4.Press and hold down the RESUME button on the printer. Release the
Cleaning the print cartridges Clean the print cartridges when lines or dots are missing from printed text or graphics. NOTE: Do not clean the print cartridge unnecessarily because this wastes ink and shortens the life of the print cartridges. RESUME button when the Resume light starts to blink. The printer should

Memory Study Notes

RAM (Random Access Memory) [1970-Intel] A group of Memory chips, typically of the dynamic RAM (DRAM) type, which functions as the computer's primary workspace. The "random" in RAM means the contents of each byte can be directly accessed without regard to the bytes before or after it. Also true of other Types of Memory chips, including ROMs (Read Only Memory) and PROMs(Programable ROM). However, unlike ROMs (Read Only Memory) and PROMs(Programable ROM), RAM chips require power to maintain their content, which is why you must save your data onto disk before you turn the computer off.

DRAM (Dynamic RAM) [1970-Intel] Burst Timing: 5-5-5-5 Dynamic random access Memory (DRAM) is the most common kind of random access Memory (RAM) for personal computers and workstations. Memory is the network of electrically-charged points in which a computer stores quickly accessible data in the form of 0s and 1s. Random access means the PC processor can access any part of the Memory or data storage space directly rather than having to proceed sequentially from some starting place. DRAM is dynamic in that, unlike static RAM (SRAM), it needs to have its storage cells refreshed or given a new electronic charge every few milliseconds. Static RAM does not need refreshing because it operates on the principle of moving current which is switched in one of two directions rather than a storage cell which holds a charge in place. Static RAM is generally used for cache Memory, which can be accessed more quickly than DRAM.

ROM (read-only Memory) [1971-Intel] Semiconductor-based Memory which contains instructions or data which can be read but not modified. (Generally, the term ROM often means any read-only device, as in CD-ROM for Compact Disk, Read Only Memory.) Once data has been written onto a ROM chip, it cannot be removed and can only be read. Unlike main Memory (RAM), ROM retains its contents even when the computer is turned off. ROM is referred to as being nonvolatile, whereas RAM is volatile. Most personal computers contain a small amount of ROM which stores critical programs such as the program which boots the computer. In addition, ROMs are used extensively in calculators and peripheral devices such as laser printers, whose fonts are often stored in ROMs. Electrically Erasable Programmable Read-Only Memory (EEPROM) Machines with flash BIOS capability use a special type of BIOS ROM called an EEPROM; which stands for "Electrically Erasable Programmable Read-Only Memory". As you can probably tell by the name, is a ROM which can be erased and re-written using a special program. Procedure is called flashing the BIOS and a BIOS that can do this is called a flash BIOS. The advantages of this capability are obvious; no need to open the case to pull the chip, and much

lower cost. EEPROM is similar to flash mem. (sometimes called flash EEPROM). The principal difference is EEPROM requires data to be written or erased one byte at a time whereas flash mem. allows data to be written or erased in blocks. This makes flash mem. faster. Flash mem. works much faster than traditional EEPROMs because it writes data in chunks, usually 512 bytes in size, instead of a byte at a time.

SIMMs (Single In-line Memory Modules) As the first mass-produced Memory packages, these were 30 pin modules ~3.50" X 0.75", and were used primarily in 386, early 486, and Apple® computers. Designed as Fast-Page Mode non-Parity (2 or 8 chips per SIMM), or Parity (3 or 9 chips per SIMM), these were in 1Mb, 4Mb and 16Mb denominations. Installation must be in either 1 or 2 "banks" of either 2 or 4 matching SIMMs. This design was soon replaced by 72 pin modules ~4.25" X 1.0", used primarily in later 486, 586 (Pentium®), and later Apple® models. Designed as Fast-Page Mode or EDO (explained later), these came as non-Parity or Parity with capacities of 4Mb, 8Mb, 16Mb, 32Mb, 64Mb and 128Mb. Most 486 and several Apple® machines only needed one SIMM per available socket, whereas Pentium® and PowerMacs® required matching pairs. Most machines required specific sizes and upgrade configurations.

DIMMs (Dual In-line Memory Modules) As operating system Memory demands increased, larger Memory modules were required; yet the motherboard space was even more at a premium. To solve this problem the 168 pin DIMM module ~5.375" X 1" was developed.These are installed singly in later Pentium®s, Pentium® Pro's, and PowerMacs®, and are offered as non-Parity Fast-Page, EDO, ECC, or SDRAM modes, 3.3v or 5v. buffered or unbuffered, and 2-clock or 4-clock. Their capacities are 8Mb, 16Mb, 32Mb, 64Mb and 128Mb. Choosing the right module is very critical, as most machines require specific Types, sizes and upgrade configurations. The number of black components on a 184-pin DIMM may vary, but they always have 92 pins on the front and 92 pins on the back for a total of 184. 184-pin DIMMs are approximately 5.375" long and 1.375" high, though the heights may vary. While 184-pin DIMMs and 168-pin DIMMs are approximately the same size, 184-pin DIMMs have only one notch within the row of pins. SODIMM (Small Outline DIMM Modules) Many brands of notebook computers use proprietary mem. modules, but several manufacturers use RAM based on the small outline dual in-line mem. module (SODIMM) configuration. SODIMM cards are small, about 2 inches by 1 inch (5 centimeters by 2.5 centimeters), and have 144 pins. Capacity ranges from 16MB to 256MB per module. An interesting fact about the Apple iMac desktop computer is it uses SODIMMs instead of the traditional DIMMs. Memory Cards

This style of Memory is primarily used in notebooks, and comes in two primary styles. "Credit cards" are proprietary designed modules which are often installed under the notebook keyboard. Most commonly, these are Non-Parity, however, choosing the right module is very critical, as most machines require specific Types, sizes and upgrade configurations. PCMCIA cards are a design standardized by industry OEMs. These come in three different Types, but Type I are used for Memory expansion. PCMCIA PCMCIA (Personal Computer Memory Card International Association) is an international standards body and trade association with over 300 member companies which was founded in 1989 to establish standards for Integrated Circuit cards and to promote interchangeability among mobile computers where ruggedness, low power, and small size were critical. As the needs of mobile computer users has changed, so has the PC Card Standard. By 1991, PCMCIA had defined an I/O interface for the same 68 pin connector initially used by Memory cards. At the same time, the Socket Services Specification was added and was soon followed by the Card Services Specifcation as developers realized common software would be needed to enhance compatibility. Non-Parity vs. Parity Parity As data moves through your computer (e.g. from the CPU to the main Memory), the possibility of errors can occur . . . particularly in older 386 & 486 machines. Parity error detection was developed to notify the user of any data errors. By adding a single bit to each byte of data, this bit is responsible for checking the integrity of the other 8 bits while the byte is moved or stored. Once a single-bit error is detected, the user receives an error notification; however, parity checking only notifies, and does not correct a failed data bit. If your SIMM module has 3, 6, 9, 12, 18, or 36 chips then it is more than likely Parity. Logic Parity Also known as Parity Generators, or Fake Parity, these modules were produced by some manufacturers as a less expensive alternative to True Parity. Fake parity modules "fool" your system into thinking parity checking is being done. This is accomplished by sending the parity signal the machine looks for, rather than using an actual parity bit. In a module using Fake Parity, you will NOT be notified of a Memory error, because it is really not being checked. The result of these undetected errors can be corrupted files, wrong calculations, and even corruption of your hard disk. If you need Parity modules be cautious of suppliers with bargain prices; they may be substituting useless Fake Parity. Non-Parity These modules are just like Parity modules without the extra chips. There are no Parity chips in Apple® Computers, later 486, and most Pentium® class systems. The reason for this is simply because Memory errors are rare, and a single bit error will most likely be harmless.If your SIMM module has 2, 4, 8, 16, or 32 chips, then it is more than likely Non-Parity. Always match the new Memory with what is already in your system. To determine if your system

requires parity, count the number of small, black, IC chips on one of your modules. ECC (Error Correction Code) Error Correction Code modules are an advanced form of Parity detection often used in servers and critical data applications. ECC modules use multiple Parity bits per byte (usually 3) to detect double-bit errors. They also will correct single-bit errors without creating an error message. Some systems which support ECC can use a regular Parity module by using the Parity bits to make up the ECC code. However, a Parity system cannot use a true ECC module. FPM (Fast Page Mode) 1987 50ns Burst Timing: 5-3-3-3 FPM: Fast Page Mode has traditionally been the most common DRAM. A "page" is the section of Memory available within a row address. Accessing Memory is like looking up information in a book. You choose the page, then FPM gets information from that page. FPM DRAMs need only to specify the row address once for accesses within the same page addresses. Successive accesses to the same page of Memory only require a column address to be selected, which saves time in accessing the Memory.

EDO (Extended Data Output) 1995 50ns Burst Timing: 5-2-2-2 Extended Data Output DRAM is an improvement over FPM design, and used in Non-Parity configurations in Pentium® machines or higher. If supported by your motherboard, EDO shortens the Read cycle between the main Memory and the CPU, thereby dramatically increasing throughput. EDO chips allow the CPU to access Memory 10 to 20 percent faster. EDO DRAMs hold the data valid even after the signal which "strobes" the column address goes inactive. This allows faster CPU's to manage time more efficiently; i.e., while the EDO DRAM is retrieving an instruction for the microprocessor, the CPU can perform other tasks without concern that the data will become invalid. Do not use EDO in systems don't support it, or mix EDO with FPM as serious problems will result.

PC66 SDRAM (Synchronous DRAM) 1997 66 MHz Burst Timing: 5-1-1-1 SDRAM is the fastest DRAM technology available. It uses a clock to synchronize the signal input and output. The clock coordinates with the CPU clock so both are in synch. The CPU "knows" when operations are to be completed and data will become available, freeing the processor for other operations. The use of a clock allows for extremely fast consecutive read and write capability over FPM and EDO DRAMs.The clock is the main speed consideration with SDRAMs; therefore, SDRAMs are measured in megahertz (e.g. 66 MHz or 100 MHz). SDRAM increases the speed and performance of the system.

Burst EDO (BEDO) Burst Timing: 5-1-1-1 Burst Extended Data Out DRAM (Burst EDO, BEDO) A variant on EDO DRAM in which read or write cycles are batched in bursts of four. The bursts wrap around on a four byte boundary which means only the two least significant bits of the CAS address get modified internally to produce each address of the burst sequence. Consequently, Burst EDO bus speeds will range from 40MHz to 66 MHz, well above the 33MHz bus speeds can be accomplished using Fast Page Mode or EDO DRAM. Burst EDO was introduced sometime before May 1995.

SRAM (Static RAM) Burst Timing: 3-1-1-1 SRAM (Static RAM) stores its data in capacitors don't require constant recharging to retain their data; consequently, this type of RAM is faster than DRAM which results in a higher cost. Speed is approximately 8ns to 20ns - as opposed to 60ns to 80ns for DRAM. L2 Cache Level 2 or L2 cache, mem. is external to the microprocessor. In general, L2 cache mem. (SRAM), also called the secondary cache, resides on a separate chip from the microprocessor. Although, more and more microprocessors are including L2 caches into their architectures. Tag RAM The tag RAM used as part of the cache must normally be faster than the actual cache data store. This is because the tag RAM must be read first to check for a cache hit. We want to be able to check the tag and still have enough time to read the cache within a single clock cycle, if we have a hit. So for example, you may find that your system's main cache chips are 15 ns, while the tag may be 12 ns. Pipelined Burst Static RAM Pipelined Burst Static RAM (PB SRAM) has an access time in the range 4.5 to 8 nanoseconds (ns) and allows a transfer timing of 3-1-1-1 for bus speeds up to 133 MHz. These numbers refer to the number of clock cycles for each access of a burst mode mem. read. For example, 3-1-1-1 refers to three clock cycles for the first word and one cycle for each subsequent word.

PC100/PC133/PC150 SDRAM 1998-2000 100-150MHz Burst Timing: 41-1-1 PC100/PC133/PC150 SDRAM is synchronous DRAM (SDRAM) that states that it meets the PC100/PC133/PC150 specification from Intel®. Intel® created the specification to enable RAM manufacturers to make chips that would work with Intel®'s i440BX processor chipset. The i440BX was designed to achieve a 100 MHz/133 MHz system bus speed. Ideally, PC100/PC133/PC150 SDRAM would

work at the 100 MHz/133 MHz speed, using a 4-1-1-1 access cycle. It's reported that PC100/PC133/PC150 SDRAM will improve performance by 10-15% in an Intel® Socket 7 system (but not in a Pentium® II because its L2 cache speed runs at only half of processor speed). To develop this type of Memory, a set of specifications has been developed by Intel® and was endorsed by most of the Memory manufacturers. Intel® established a very precise set of specifications and guide lines to ensure compatibility between Memory modules of any brands. The Intel® PC100/PC133/PC150 compliance specifications are ensuring robust Memory operation from suppliers that meet these specifications and this is a great benefit to both the industry and the end users. In addition to Intel® providing specs for PC100/PC133/PC150 devices and DIMMs, Intel® has released module gerber (raw card) design files. Vendors using these raw card design files will have much more consistency than those using their own raw card design files

DDR SDRAM (Double Data Rate SDRAM) 2000 266 MHz Many other alternate methods of Memory access are in development. One of the most promising is Double Data Rate (DDR) SDRAM. Like SDRAM before it, DDR SDRAM will interleave Memory access so that several Memory accesses can be performed simultaneously. DDR SDRAM executes twice for each tick of the Memory bus, effectively doubling the system bus speed. Currently, DDR Memory is only used in high-end graphics cards, but it will almost certainly make its way down to the main Memory of the computer soon. Interleave: The process of taking data bits (singularly or in bursts) alternately from two or more mem. pages (on an SDRAM) or devices (on a mem. card or subsystem).

ESDRAM (Enhanced Synchronous DRAM) ESDRAM, made by Enhanced Memory Systems, includes a small static RAM (SRAM) in the SDRAM chip. This means that many accesses will be from the faster SRAM. In case the SRAM doesn't have the data, there is a wide bus between the SRAM and the SDRAM because they are on the same chip. ESDRAM is the synchronous version of Enhanced Memory System's EDRAM architecture. Both EDRAM and ESDRAM devices are in the category of cached DRAM and are used mainly for L2 cache Memory. ESDRAM is apparently competing with DDR SDRAM as a faster SDRAM chip for Socket 7 processors.

RDRAM (Rambus® DRAM) 1999 800 MHz System Memory bandwidth is more important now than ever before. With the increase in processor performance, multimedia and 3D graphics, high bandwidth Memory is essential to sustain system performance. The transition to Rambus® DRAM (RDRAM®) - with a Memory performance gain up to 300% over the current SDRAM technology is nothing short of revolutionary!

nDRAM, 2000 by: Rambus® & Intel, Supports data transfer speeds up to 1,600MHz! (More info when available)

SLDRAM (Synchronous Link DRAM) 1997 by: SyncLink Consortium (Synchronous Link DRAM) An enhanced version of the SDRAM Memory technology that uses a multiplexed bus to transfer data to and from the chips rather than fixed pin settings. SLDRAM is expected to support extremely fast transfer rates from 1.6 GBps up into the 3 GBps range. This is a protocol-based Memory technology like Rambus® DRAM, but is not a proprietary technology. The "SL" originally stood for SyncLink®, which was dropped because it was a proprietary trade name of a company. In 1999, the SLDRAM consortium turned into AMI2 (Advanced Memory International, Inc.)to support the DDR SDRAM market.

2 clock or 4 clock SDRAM comes in either 2 clock and 4 clock versions. The difference between them is only on the PCB design of the modules. Both of these designs can use the same SDRAM chips, but the control signals and layouts of the module are different, and thus these two modules are not compatible with each other. The 4 clock design is more popular version, and has a faster response time than a 2 clock module; each clock signal can control 4 DRAM chips. (4 lines control up to 16 chips in groups of 4).

Timing Speed The speed rating marked on each chip (10ns, 50ns, 60ns, 70ns, 80ns or 100ns) signifies how long it takes for the read/write to occur. A chip with a lower number is usually better because it is faster; however, early systems often need slower speeds. If you are upgrading Memory in a computer, always match the speed of modules within the same bank.

Refresh Rate Memory module is made up of electrical cells. The refresh process recharges these cells, which are arranged on the chips in rows. The refresh rate refers to the number of rows that must be refreshed. The common refresh rates are 1K, 2K, 4K and 8K. Some specialty designed DRAMs feature self refresh technology, which enables the components to refresh on their own - independent from the CPU or external consumption, and it is commonly used in notebook computers and laptop computer.

Gold vs. Tin/Lead Contacts

For best contact reliability, you should match the contact material of the SIMM sockets on your motherboard. Mixing metal Types may lead to contact corrosion, especially in high humidity environs. Visually inspect the sockets; if they are gold, buy SIMMs with gold contacts. If they are tin, buy SIMMs with tin/lead contacts. However, this is not always a critical issue, and either kind usually works. Most Pentium® boards have tin contacts, and almost all SIMMs manufactured today use a tin/lead alloy instead of gold.

Operating System Memory - Virtual Memory - Swap Files Virtual mem. provides applications with more mem. space than allocated in the computer. A technique which operating systems use to load more data into mem. than it can hold. Part of the data is kept on disk and is constantly swapped back and forth into system mem.. For instance, when your run a CD application. Whenever the operating system needs a part of mem. that is currently not in physical mem., a VIRTUAL MEMORY MANAGER picks a part of physical mem. that hasn't been used recently, writes it to a SWAP FILE on the hard disk and then reads the part of mem. that is needed from the swap file and stores it into real mem. in place of the old block. This is called SWAPPING. The blocks of mem. that are swapped around are called PAGES. Virtual mem. allows for the multitasking (opening more than one program) that we do. When the amount of virtual mem. in use greatly exceeds the amount of real mem., the operating system spends a lot of time swapping pages of mem. around, which greatly hampers performance. This called THRASHING and you can see it in your LED hard disk drive light. The hard disk is thousands of times slower than the system mem., if not more. A system that is thrashing can be perceived as either a very slow system or one that has come to a halt. Hard disk access time is measured in thousandths of a second; mem. access time is measured in billionth of a second.

How do I know if there is enough mem.? The amount of mem. you need is determined by several factors; the software, operating system and the number of programs you want to have open at the same time. When you determine mem. needs, you'll also want to consider what your needs will be six months down the road. If you think you may be upgrading your operating system or adding more software, it's a good idea to factor that into the equation now.

Year 1968 1970 1971 1974 1987 1995 1995 1996 1996 1997 1998 1999 1999 1999 2000 2000 2000 2001


Evolution of Memory Volts 5.0v +5v,-5v,+12v 3.3-5.0v 0.0v 5.0v 5.0v 5.0v 3.3v 3.3v 3.3v 3.3v 2.5v 3.3v 3.3v 3.3v 2.5v 3.3v 1.2v

Freq 4.77MHz 4.77-40MHz 16-66 MHz 33-75MHz 60-100MHz 60-133MHz 800MHz 66MHz 100MHz 800MHz 800MHz 133MHz 133MHz 266MHz 100MHz 450MHz

Timing 5-5-5-5 5-3-3-3 5-2-2-2 5-1-1-1 5-1-1-1 5-1-1-1 4-1-1-1 2-2-2 2-3-2 CL=2.5 2,3 15-35ns


Processors Study Notes
A microprocessor is an integrated circuit built on a tiny piece of silicon. It contains thousands, or even millions, of transistors, which are interconnected via superfine traces of aluminum. The transistors work together to store and manipulate data so that the microprocessor can perform a wide variety of useful functions. The particular functions a microprocessor performs are dictated by software. Intel's first microprocessor was the 4004. It was introduced in 1971, and contained 2,300 transistors. Today's Pentium® 4 processor, by contrast, contains 55 million transistors. One of the most common tasks microprocessors perform is to serve as the "brains" inside personal computers, but they deliver "intelligence" to countless other devices as well. For example, they may give your telephone speed-dial and redial options, automatically turn down your house's thermostat at night, and make your car safer and more energy efficient.

Complete Intel Family Processors Intel® Pentium® M Processor
Processor Intel® Pentium® M Processor Clock Speed(s) 1.60 GHz 1.50 GHz 1.40 GHz 1.30 GHz Intro Date(s) Mar. 12, 2003 Mfg. Process/ Transistors 0.13-micron 77 million Cache 1 MB Low Power L2 cache Bus Speed 400 MHz Core Voltage 1.48V in Max. Perf. Mode 0.96V in Battery Optimized Mode 1.39V in Max Perf. Mode 0.96V in Battery Optimized Mode (1.30 GHz version) Wattage <1 watt in Battery Optimized Mode Typical Use Full-size and thin & light mobile PCs

Low Voltage
Processor Clock Speed(s) 1.10 GHz Intro Date(s) Mfg. Process/ Transistors 0.13-micron 77 million Cache Bus Speed 400 MHz Core Voltage Wattage Typical Use

Intel® Pentium® M Processor

Mar. 12, 2003

1 MB Low Power L2 cache

1.18V in Max. Perf. Mode 0.96V in Battery Optimized Mode

<1 watt in Battery Optimized Mode

Full-size and thin & light mobile PCs

Ultra Low Voltage
Processor Clock Speed(s) 900 MHz Intro Date(s) Mfg. Process/ Transistors 0.13-micron Cache Bus Speed 400 MHz Core Voltage Wattage Typical Use

Intel® Pentium® M

Mar. 12, 2003

1 MB Low Power L2

1.00V in Max. Perf. Mode

<0.5 watt in Battery

Full-size and thin & light

Processor 77 million


0.84V in Battery Optimized Mode

Optimized Mode

mobile PCs

Intel® Itanium® Processor Family
Processor Intel® Itanium® 2 Processor Clock Speed(s) 1 GHz 900 MHz 800 MHz 733 MHz Intro Date(s) July 8, 2002 Mfg. Process/ Transistors 0.18-micron 220 million 0.18-micron 25 million Cache 3 MB and 1.5 MB L3 Cache Typical Use Demanding enterprise-class servers, workstations and high-performance applications

Intel® Itanium® Processor

May 2001

2 MB and 4 MB L3 Cache

Demanding enterprise-class servers, workstations and high-performance applications

Intel® Xeon™ Processor Family
Processor Clock Speed(s) 3.06 GHz Intro Date(s) Mfg. Process/ Transistors 0.13-micron 108 million 0.13-micron 108 million Nov. 4, 2002 0.13-micron 108 million 0.18-micron 108 million Sept. 11, 2002 2.80 GHz 2.60 GHz 0.13-micron 55 million 2 MB, 1 MB Integrated L3 Cache 256 KB Adv. Transfer L2 Cache 8 KB Execution Trace L1 Cache 512 KB Advanced Transfer L2 Cache 400 MHz Multi-processing mid-tier and back-end servers Cache Bus Speed 533 MHz Typical Use

Intel® Xeon™ Processor Intel® Xeon™ Processor

Mar. 10, 2003

512 KB L2 Cache

Workstations and servers

Intel® Xeon™ Processor MP Intel® Xeon™ Processor MP

2.80 GHz 2.60 GHz 2.40 GHz 2 GHz 2 GHz 1.90 GHz 1.50 GHz 1.60 GHz 1.50 GHz 1.40 GHz 2.80 GHz 2.60 GHz 2.40 GHz

Nov. 18, 2002

512 KB L2 Cache

533 MHz

Workstations and servers

Mar. 12, 2002

400 MHz

Multi-processing mid-tier and back-end servers

Intel® Xeon™ Processor

400 MHz

High-performance and mid-range dual processor enabled workstations and servers.

2.20 GHz 2 GHz 1.80 GHz

Apr. 3, 2002 2.40 GHz Feb, 25, 2002 Workstations and servers based on Intel® E7500 chipset and 3rd party chipsets Jan. 9, 2002 Workstations and servers based on the Intel® 860 chipset Sep. 25, 2001 2 GHz May 21, 2001 1.70 GHz 1.50 GHz 1.40 GHz

Intel® Xeon™ Processor

2 GHz 1.70 GHz 1.50 GHz 1.40 GHz

0.18-micron 42 million

256 KB Advanced Transfer L2 Cache

400 MHz

High-performance and mid-range dual processor enabled workstations and servers.

Intel® Pentium® 4 Processor
Processor Intel® Pentium® 4 Processor Clock Speed(s) 3 GHz Intro Date(s) Apr. 14, 2003 Mfg. Process/ Transistors 0.13-micron 55 million 0.13-micron 55 million 0.13-micron 55 million Cache 512 KB Advanced Transfer L2 cache Bus Speed 800 MHz Typical Use Desktops and entry-level workstations

Intel® Pentium® 4 Processor

3.06 GHz

Nov. 14, 2002

512 KB Advanced Transfer L2 cache

533 MHz

Desktops and entry-level workstations

Intel® Pentium® 4 Processor

2.80 GHz 2.66 GHz 2.53 GHz 2.40 GHz 2.26 GHz

Aug. 26, 2002 2.80 GHz 2.66 GHz May 6, 2002 2.53 GHz 2.40 GHz 2.26 GHz Aug. 26, 2002 2.60 GHz

512 KB Advanced Transfer L2 cache

533 MHz

Desktops and entry-level workstations

Intel® Pentium® 4 Processor

2.60 GHz 2.50 GHz


512 KB Advanced Transfer L2 cache

400 MHz

Desktops and entry-level workstations

2.40 GHz 2.20 GHz 2 GHz

2.50 GHz Apr. 2, 2002 2.40 GHz Jan. 7, 2002 2.2 GHz Aug. 27, 2001 2 GHz Aug. 27, 2001 2 GHz 1.90 GHz Jul. 2, 2001 1.80 GHz 1.60 GHz Apr. 23, 2001 1.70 GHz Nov. 20, 2000 1.50 GHz 1.40 GHz

55 million

Intel® Pentium® 4 Processor

2 GHz 1.90 GHz 1.80 GHz 1.70 GHz 1.60 GHz 1.50 GHz 1.40 GHz

0.18-micron 42 million

256 KB Advanced Transfer L2 cache

400 MHz

Desktops and entry-level workstations

Processor Clock Speed(s) 2.50 GHz 2.40 GHz 2.20 GHz 2 GHz 1.90 GHz 1.80 GHz 1.70 GHz 1.60 GHz 1.50 GHz 1.40 GHz Intro Date(s) Mfg. Process/ Transistors 0.13-micron 55 million Jan. 14, 2003 2.40 GHz Sept. 16, 2002 2.20 GHz June 24, 2002 2 GHz 1.90 GHz Cache Bus Speed 400 MHz Core Voltage Wattage Typical Use

Mobile Intel® Pentium® 4 Processor-M

Apr. 16, 2003 2.50 GHz

512 KB on-die L2 cache

1.3 volts in Max. Perf. Mode 1.2 volts in Battery Optimized Mode

<2 watts in Battery Optimized Mode

Full-size and thin & light mobile PCs

Apr. 23, 2002 1.80 GHz 1.50 GHz 1.40 GHz Mar. 4, 2002 1.70 GHz 1.60 GHz

Applied Computing
Processor Clock Speed(s) 2.40 GHz Intro Date(s) Mfg. Process/ Transistors 0.13-micron 55 million 0.13-micron 55 million Cache Bus Speed 400 MHz 533 MHz 400 MHz 533 MHz Typical Use

Intel® Pentium® 4 Processor for Applied Computing Mobile Intel® Pentium® 4 Processor-M for Applied Computing

June 25, 2002

512 KB on-die L2 cache 512 KB on-die L2 cache

Applied computing, communications, interactive client and industrial automation applications. Applied computing, communications, interactive client and industrial automation applications.

1.70 GHz

June 25, 2002

Intel® Pentium® III Processor
Processor Intel® Pentium® III Processor Clock Speed(s) 1 GHz 933 MHz 866 MHz 850 MHz Intro Date(s) Mar. 8, 2000 1 GHz Mar. 20, 2000 866 MHz 850 MHz May 24, 2000 933 MHz Oct. 25, 1999 Mfg. Process/ Transistors 0.18-micron 28 million Cache 256 KB Advanced Transfer cache Bus Speed 100 MHz 133 MHz Typical Use Business, consumer PCs; 1- and 2-way servers and workstations

Intel® Pentium® III

733 MHz 700 MHz


256 KB Advanced Transfer

100 MHz 133 MHz

Business, consumer PCs; 1- and 2-way servers and


Intel® Pentium® III Processor

667 MHz 650 MHz 600 MHz 550 MHz 533 MHz 500 MHz 600 MHz 550 MHz 500 MHz 450 MHz

28 million



Aug. 2, 1999 600 MHz May 17, 1999 550 MHz Feb. 26, 1999 500 MHz 450 Mhz

0.25-micron 9.5 million

512 KB

100 MHz

Business, consumer PCs; 1- and 2-way servers and workstations

Processor Intel® Pentium® III Processor for servers Clock Speed(s) 1.40 GHz Intro Date(s) Jan. 8, 2002 Mfg. Process/ Transistors 0.13-micron 44 million Cache 512 KB Advanced Transfer Cache Bus Speed 133 MHz Typical Use Rack-mounted and pedestal front-end application servers; ultra-dense servers

Ultra-Low Voltage
Processor Ultra Low Voltage Mobile Intel® Pentium® III Processor-M Ultra Low Voltage Mobile Intel® Pentium® III Processor-M Clock Speed(s) 933 MHz / 400 MHz Battery Optimized 900 MHz / 400 MHz Battery Optimized Intro Date(s) Jan. 14, 2003 Mfg. Process/ Transistors 0.13-micron 55 million Jan. 14, 2003 0.13-micron 55 million 512 KB Advanced Transfer cache 100 MHz 1.1V Max. Performance 0.95V Battery Optimized <0.5 Battery Optimized Cache 512 KB Advanced Transfer cache Bus Speed 133 MHz Core Voltage 1.1V Max. Performance 0.95V Battery Optimized Wattage <0.5 Battery Optimized Typical Use

Mini- and Subnotebooks, Ultra-d blade servers

Mini- and Subnotebooks, Ultra-d blade servers

Ultra Low Voltage Mobile Intel® Pentium® III Processor-M Ultra Low Voltage Mobile Intel® Pentium® III Processor-M Ultra Low Voltage Mobile Intel® Pentium® III Processor Ultra Low Voltage Mobile Intel® Pentium® III Processor-M Ultra Low Voltage Mobile Intel® Pentium® III Processor 512K Ultra Low Voltage Mobile Intel® Pentium® III Processor Featuring Intel® SpeedStep™ Technology Ultra Low Voltage Mobile Intel® Pentium® III Processor Featuring Intel® SpeedStep™ Technology

866 MHz / 400 MHz Battery Optimized 850 MHz / 400 MHz Battery Optimized 800 MHz / 400 MHz Battery Optimized 800 MHz / 400 MHz Battery Optimized 700 MHz

Sept. 16, 2002

0.13-micron 55 million

512 KB Advanced Transfer cache

133 MHz

1.1V Max. Performance 0.95V Battery Optimized

<0.5 Battery Optimized

Mini- and Subnotebooks, Ultra-d blade servers

Sept. 16, 2002

0.13-micron 44 million

512 KB Advanced Transfer cache

100 MHz

1.1V Max. Performance 0.95V Battery Optimized

<0.5 Battery Optimized

Mini- and Subnotebooks, Ultra-d blade servers Mini- and Subnotebooks

Apr. 17, 2002

0.13-micron 44 million

512 KB Advanced Transfer cache

133 MHz

1.5V in Max. Perf. Mode 1.05V in Battery Optimized Mode 1.5V in Max. Perf. Mode 1.05V in Battery Optimized Mode 1.1V

<0.5 watts in Battery Optimized Mode

Apr. 17, 2002

0.13-micron 44 million

512 KB Advanced Transfer cache

100 MHz

<0.5 watts in Battery Optimized Mode

Mini- and Subnotebooks, Ultra-d blade servers

Nov. 13, 2001

0.13-micron 44 million 0.13-micron 44 million

512 KB on-die L2 cache 512 KB Advanced Transfer cache

100 MHz

Ultra-dense server

750 MHz / 350 MHz Battery Optimized 750 MHz 500 MHz

Jan. 21, 2002

133 MHz

May. 21, 2002 600 MHz Jan. 30, 2001 500 MHz

0.13-micron 44 million

256 KB Advanced Transfer cache

100 MHz

1.1V / <0.95V Battery Optimized 1.1V at 600, 500 MHz <1V Battery Optimized

<0.5 watt Battery Optimized <1 watt at 600, 500 MHz < 0.5 watt at 300 MHz

Business and cons mobile PCs

Business and cons mobile PCs

Low Voltage
Processor Low Voltage Mobile Intel® Pentium® III Processor-M Featuring Intel® SpeedStep™ Technology Clock Speed(s) 1 GHz / 533 MHz Battery Optimized 933 MHz / 533 MHz Battery Optimized Intro Date(s) Sept. 16, 2002 1 GHz Apr. 17, 2002 933 MHz Jan. 21, 2002 866 MHz 850 MHz Mfg. Process/ Transistors 0.13-micron 44 million Cache 512 KB Advanced Transfer cache Bus Speed 133 MHz Core Voltage 1.15V / 1.05V Battery Optimized Wattage <1 watt Battery Optimized Typical Use Business and Consumer Mobile PCs

866 MHz / 533 MHz Battery Optimized 850 MHz / 500 MHz Battery Optimized 750 MHz / 500 MHz Battery Optimized 700 MHz / 500 MHz Battery Optimized 600 MHz / 500 MHz Battery Optimized

Low Voltage Mobile Intel® Pentium® III Processor Featuring Intel® SpeedStep™ Technology

May 21, 2001 750 MHz Feb. 27, 2001 700 MHz Jun. 19, 2000 600 MHz

0.18-micron 28 million

256 KB Advanced Transfer cache

100 MHz

1.1V Battery Optimized

<1 watt Battery Optimized

Business and Consumer Mobile PCs

Processor Mobile Intel® Pentium® III Processor-M Clock Speed(s) 1.33 GHz 1.26 GHz Intro Date(s) Sept. 16, 2002 Mfg. Process/ Transistors 0.13-micron 44 million Mobile Intel® Pentium® III Processor-M 1.20 GHz 1.13 GHz 1.06 GHz 1 GHz Oct. 1, 2001 1.20 GHz Jul. 30, 2001 1.13 GHz 1.06 GHz 1 GHz Jul. 30, 2001 0.13-micron 44 million 512 KB on-die L2 cache 133 MHz Cache 512 KB on-die L2 cache Bus Speed 133 MHz Core Voltage 1.4V / 1.15V Battery Optimized 1.4V / 1.15V Battery Optimized Wattage <1.5 watts Battery Optimized <2 watts Battery Optimized Typical Use Full-size and thin & light mobile PCs

Full-size and thin & light mobile PCs

Mobile Intel® Pentium® III Processor-M

933 MHz 866 MHz

0.13-micron 28 million

512 KB on-die L2 cache

133 MHz

1.15V / 1.05V Battery Optimized

<1 watt Battery Optimized

Full-size and thin & light mobile PCs

Mobile Intel® Pentium® III Processor Featuring Intel® SpeedStep™ Technology

1 GHz 900 MHz 850 MHz 800 MHz 750 MHz

Mar. 19, 2001 1 GHz 900 MHz Sep. 25, 2000 850 MHz 800 MHz Jun. 19, 2000 750 MHz Apr. 24, 2000 700 MHz Jan. 18, 2000 650 MHz 600 MHz

0.18-micron 28 million

256 KB Advanced Transfer cache

100 MHz

1.35V / 1.05V Battery Optimized

<2 watts Battery Optimized

Full-size and thin & light mobile PCs

Mobile Intel® Pentium® III Processor Featuring Intel® SpeedStep™ Technology

700 MHz / 550 MHz Battery Optimized 650 MHz / 500 MHz Battery Optimized 600 MHz / 500 MHz Battery Optimized 500 MHz 450 MHz 400 MHz

0.18-micron 28 million

256 KB Advanced Transfer cache

100 MHz


<2 watts Battery Optimized

Full-size and thin & light mobile PCs

Mobile Intel® Pentium® III Processor

Oct. 25, 1999

0.18-micron 28 million

256 KB Advanced Transfer cache

100 MHz

1.6V 500 MHz 450 MHz 1.35V 400 MHz


Full-size and thin & light mobile PCs

Applied Computing
Processor Low Voltage Intel® Pentium® III Processor for Applied Computing Clock Speed(s) 700 MHz Intro Date(s) Mar. 19, 2001 Mfg. Process/ Transistors 0.18-micron 28 million Cache 256 KB Advanced Transfer cache Bus Speed 100 MHz Core Voltage 1.35V Addressable Memory 64 GB Typical Use Small form factor boards, rack mount communications applications

Intel® Celeron® Processor
Processor Intel® Celeron® Processor Clock Speed(s) 2.40 GHz 2.30 GHz 2.20 GHz 2.10 GHz Intro Date(s) Mar. 31, 2003 2.40 GHz 2.30 GHz Nov. 20, 2002 2.20 GHz 2.10 GHz Sept. 18, 2002 June 12, 2002 1.80 GHz May 15, 2002 1.70 GHz May 15, 2002 1.40 GHz Jan. 3, 2002 1.30 GHz Oct. 2, 2001 1.20 GHz Aug. 31, 2001 1.10 GHz 1 GHz 950 MHz Jul. 2, 2001 900 MHz May 21, 2001 850 MHz Jan. 3, 2001 800 MHz Nov. 13, 2000 766 MHz Mfg. Process/ Transistors 0.13-micron Cache 128 KB Advanced Transfer L2 cache Bus Speed 400 MHz Typical Use Value PCs

Intel® Celeron® Processor Intel® Celeron® Processor

2 GHz 1.80 GHz 1.70 GHz

0.13-micron 0.18-micron

128 KB Advanced Transfer L2 cache 128 KB Advanced Transfer L2 cache

400 MHz 400 MHz

Value PCs Value PCs

Intel® Celeron® Processor

1.40 GHz 1.30 GHz 1.20 GHz


256 KB Advanced Transfer L2 cache

100 MHz

Value PCs

Intel® Celeron® Processor

1.10 GHz 1 GHz 950 MHz 990 MHz 850 MHz 800 MHz


128 KB Advanced Transfer L2 cache

100 MHz

Value PCs

Intel® Celeron® Processor

766 MHz 733 MHz


128 KB Advanced Transfer L2 cache

66 MHz

Value PCs

700 MHz 667 MHz 633 MHz 600 MHz 566 MHz

733 MHz June 26, 2000 700 MHz 667 MHz 633 MHz March 29, 2000 600 MHz 566 MHz Jan. 4, 2000 533 MHz Aug. 2, 1999 500 MHz Apr. 26, 1999 466 MHz Mar. 22, 1999 433 MHz Jan. 4, 1999 400 MHz 366 MHz Aug. 24, 1998 333 MHz Aug. 24, 1998 300A MHz June 8, 1998 300 MHz Apr. 15, 1998 266 MHz

Intel® Celeron® Processor

533 MHz 500 MHz 466 MHz 433 MHz 400 MHz 366 MHz 333 MHz 300 MHz

0.25-micron 19 million

128 KB Advanced Transfer L2 cache

66 MHz

Value PCs

Intel® Celeron® Processor

300 MHz 266 MHz

0.25-micron 7.5 million


66 MHz

Value PCs

Ultra Low Voltage
Processor Ultra Low Voltage Mobile Intel® Celeron® Processor Clock Speed(s) 800 MHz 733 MHz Intro Date(s) Jan. 14, 2003 800 MHz Mfg. Process/ Transistors 0.13-micron Cache 256 KB on-die L2 cache Bus Speed 133 MHz Core Voltage 1.1 volts Wattage <1 watt Typical Use Business and consumer mobile PCs

700 MHz 650 MHz

Sept. 16, 2002 733 MHz 700 MHz Jan. 21, 2002 650 MHz May. 21, 2001 600 MHz Jan. 30, 2001 500 MHz

Ultra Low Voltage Intel® Mobile Celeron® Processor

600 MHz 500 MHz


128 KB on-die L2 cache

100 MHz

1.1 volts

<1 watt

Business and consumer mobile PCs

Low Voltage
Processor Low Voltage Mobile Intel® Celeron® Processor Clock Speed(s) 866 MHz 733 MHz Intro Date(s) Jan. 14, 2003 866 MHz Apr. 17, 2002 733 MHz May 21, 2001 Mfg. Process/ Transistors 0.13-micron Cache 256 KB on-die L2 cache Bus Speed 100 MHz Core Voltage 1.15 volts Wattage <2 watts Typical Use Value ultra-portable mobile PCs

Low Voltage Mobile Intel® Celeron® Processor

600 MHz


256 KB on-die L2 cache

100 MHz

1.35 volts

<2 watts

Value ultra-portable mobile PCs

Processor Mobile Intel® Celeron® Processor Clock Speed(s) 2.20 GHz 2 GHz 1.80 GHz 1.70 GHz 1.60 GHz 1.26 GHz Intro Date(s) Apr. 16, 2003 2.20 GHz 1.26 GHz Jan. 14, 2003 2 GHz Sept. 16, 2002 1.80 GHz 1.70 GHz 1.60 GHz Mfg. Process/ Transistors 0.13-micron Cache 256 KB on-die L2 cache Bus Speed 400 MHz Core Voltage 1.3 volts Wattage NA Typical Use Value mobile PCs

Mobile Intel® Celeron® Processor Mobile Intel® Celeron® Processor Mobile Intel® Celeron® Processor Mobile Intel® Celeron® Processor

1.50 GHz 1.40 GHz 1.33 GHz 1 GHz 1.20 GHz 1.13 GHz 1.06 GHz 850 MHz 800 MHz 750 MHz 700 MHz 650 MHz 600 MHz 550 MHz 500 MHz 450 MHz

June 24, 2002


256 KB and 128 KB on-die L2 cache 256 KB on-die L2 cache 256 KB on-die L2 cache 128 KB on-die L2 cache

400 MHz and 133 MHz 133 MHz 133 MHz

1.4 volts


Value mobile PCs

Apr. 17, 2002 Jan. 21, 2002

0.13-micron 0.13-micron

1.4 volts 1.45 volts


Value mobile PCs Value mobile PCs

July 2, 2001 850 MHz May 21, 2001 800 MHz Mar. 19, 2001 750 MHz Sept. 25, 2000 700 MHz June 19, 2000 650 MHz 600 MHz Apr. 24, 2000 550 MHz Feb. 14, 2000 500 MHz 450 MHz Sept. 15, 1999


100 MHz

1.6 volts


Value mobile PCs

Mobile Intel® Celeron® Processor Mobile Intel® Celeron® Processor Mobile Intel® Celeron® Processor Mobile Intel® Celeron® Processor Mobile Intel® Celeron® Processor

466 MHz 433 MHz 400 MHz

0.25-micron 18.9 million 0.25-micron 18.9 million 0.25-micron 18.9 million 0.25-micron 18.9 million 0.25-micron

128 KB on-die L2 cache 128 KB on-die L2 cache 128 KB on-die L2 cache 128 KB on-die L2 cache 128 KB on-die L2 cache

1.9 volts


Value mobile PCs

June 14, 1999

1.6 volts


Value mobile PCs

366 MHz

May 17, 1999

1.6 volts


Value mobile PCs

333 MHz

Apr. 5, 1999

1.6 volts


Value mobile PCs

266 MHz 333 MHz

Jan. 25, 1999 18.9 million

1.6 volts


Value mobile PCs

Intel® Pentium® III Xeon™ Processor
Processor Intel® Pentium® III Xeon™ Processor Intel® Pentium® III Xeon™ Processor Intel® Pentium® III Xeon™ Processor Intel® Pentium® III Xeon™ Processor Clock Speed(s) 900 MHz Intro Date(s) Mar. 21, 2001 Mfg. Process/ Transistors 0.18-micron 28 million 0.18-micron 28 million 0.18-micron 28 million 0.18-micron 28 million Jan. 12, 2000 800 MHz Oct. 25, 1999 733 MHz 667 MHz 600 MHz Mar. 17, 1999 Cache 2 MB Advanced Transfer L2 cache 256 KB Advanced Transfer L2 cache 1 MB and 2 MB Advanced Transfer L2 cache 256 KB Advanced Transfer L2 cache Addressable Memory 64 GB Bus Speed 100 MHz Typical Use High-end servers, 4- and 8-way multiprocessing systems Business and consumer PCs, 1and 2-way servers and workstations 4- and 8-way servers

933 MHz

May 24, 2000

64 GB

133 MHz

700 MHz

May 22, 2000

64 GB

100 MHz

866 MHz 800 MHz 733 MHz 667 MHz 600 MHz

Apr. 10, 2000 866 MHz

64 GB

133 MHz

2-way servers and workstations

Intel® Pentium® III Xeon™ Processor

550 MHz 500 MHz

0.25-micron 9.5 million

512 KB, 1 MB and 2 MB Advanced Transfer L2 cache

64 GB

100 MHz

Business PCs, 2-, 4- and 8-way (and higher) servers and workstations

Intel® Pentium® II Xeon™ Processor
Processor Intel® Pentium® II Xeon™ Processor Intel® Pentium® II Xeon™ Processor Clock Speed(s) 450 MHz Intro Date(s) Jan. 5, 1999 Mfg. Process/ Transistors 0.25-micron 7.5 million 0.25-micron 7.5 million Cache 512 KB 1 MB 2 MB 512 KB Addressable Memory 64 GB Bus Speed 100 MHz Typical Use 4-way servers and workstations Dual-processor servers and workstations

450 MHz

Oct. 6, 1998

64 GB

100 MHz

Intel® Pentium® II Xeon™ Processor

400 MHz

June 29, 1998

0.25-micron 7.5 million

512 KB 1 MB

64 GB

100 MHz

Midrange and higher servers and workstations

Intel® Pentium® II Processor
Processor Intel® Pentium® II Processor Clock Speed(s) 450 MHz Intro Date(s) Aug. 24, 1998 Mfg. Process/ Transistors 0.25-micron 7.5 million 0.25-micron 7.5 million 0.25-micron 7.5 million 0.35-micron 7.5 million Cache 512 KB on-die L2 cache 512 KB on-die L2 cache 512 KB on-die L2 cache 512 KB on-die L2 cache Bus Speed 100 MHz Typical Use Business and consumer PCs; 1- and 2-way servers and workstations. Business and consumer PCs; 1- and 2-way servers and workstations. Business and consumer PCs; 1- and 2-way servers and workstations. High-end business desktops, workstations and servers.

Intel® Pentium® II Processor

400 MHz 350 MHz 333 MHz

Apr. 15, 1998

100 MHz

Intel® Pentium® II Processor

Jan. 26, 1998

66 MHz

Intel® Pentium® II Processor

300 MHz 266 MHz 233 MHz

May 7, 1997

Processor Intel® Mobile Pentium® II Processor Intel® Mobile Pentium® II Processor Intel® Mobile Pentium® II Processor Clock Speed(s) 400 MHz Intro Date(s) June 14, 1999 Mfg. Process/ Transistors 0.18-micron 27.4 million 0.25-micron 27.4 million 0.25-micron 27.4 million Cache 256 KB on-die L2 cache 256 KB on-die L2 cache 256 KB on-die L2 cache Bus Speed Core Voltage 1.5 volts Wattage 7.5 watts Typical Use Mobile PCs

400 MHz

June 14, 1999

1.55 volts

8.7 watts

Mobile PCs

366 MHz 333 MHz 300 MHz 266 MHz

Jan. 25, 1999

1.6 volts

9.5 watts

Mobile PCs

Intel® Mobile Pentium® II Processor Intel® Mobile Pentium® II Processor

300 MHz

Sept. 9, 1998

0.25-micron 7.5 million 0.25-micron 7.5 million

512 KB on-die L2 cache 512 KB on-die L2 cache

1.6 volts

9.0 watts

Mobile PCs

266 MHz 233 MHz

Apr. 2, 1998

1.7 volts

8.6 and 7.5 watts

Mobile PCs

Intel® Pentium® Pro Processor
Processor Intel® Pentium® Pro Processor Clock Speed(s) 200 MHz Intro Date(s) Aug. 18, 1997 Mfg. Process/ Transistors 0.35-micron 5.5 million 0.35-micron 5.5 million 0.6-micron Cache 1 MB on-die L2 cache 256 KB 512 KB on-die L2 cache Bus Speed Typical Use High-end desktops, workstations and servers. High-end desktops, workstations and servers.

Intel® Pentium® Pro Processor

200 MHz 180 MHz 166 MHz 150 MHz

Nov. 1, 1995

Intel® Pentium® Processor Family
Processor Intel® Pentium® Processor with MMX™ Technology Clock Speed(s) 233 MHz Intro Date(s) June 2, 1997 Mfg. Process/ Transistors 0.35-micron 4.5 million 0.35-micron 4.5 million 0.35-micron 3.3 million 0.35-micron Typical Use High-performance desktops and servers

Intel® Pentium® Processor with MMX™ Technology

200 MHz 166 MHz 200 MHz 166 MHz 166 MHz 150 MHz

Jan. 8, 1997

High-performance desktops and servers

Intel® Pentium® Processor

June 10, 1996

High-performance desktops and servers

Intel® Pentium® Processor

Jan. 4, 1996

High-performance desktops and servers

Intel® Pentium® Processor

133 MHz

June 1995

3.3 million 0.35-micron 3.3 million 0.6-micron 0.35-micron 3.2 million 0.6-micron 3.2 million 0.6-micron 3.2 million 0.8-micron 3.1 million

High-performance desktops and servers

Intel® Pentium® Processor

120 MHz

Mar. 27, 1995

Desktops and notebooks

Intel® Pentium® Processor

100 MHz 90 MHz 75 MHz

Mar. 7, 1994


Intel® Pentium® Processor

Oct. 10, 1994

Desktops and notebooks

Intel® Pentium® Processor

66 MHz 60 MHz

Mar. 22, 1993


Processor Intel® Pentium® Processor with MMX™ Technology Clock Speed(s) 300 MHz Intro Date(s) Jan. 7, 1999 Mfg. Process/ Transistors 0.25-micron 4.5 million 0.25-micron 4.5 million 0.25-micron 4.5 million Typical Use Mobile PCs and mini-notebooks

Intel® Pentium® Processor with MMX™ Technology

266 MHz

Jan. 12, 1998

Mobile PCs and mini-notebooks

Intel® Pentium® Processor with MMX™ Technology

233 MHz 200 MHz

Sept. 9, 1997

Mobile PCs and mini-notebooks

Intel486™ Processors and Earlier
Processor Intel486™ SL Processor Clock Speed(s) 33 MHz Intro Date(s) Nov. 9, 1992 Mfg. Process/ Transistors 0.8-micron Transistors 1.4 million Addressable Memory 64 MB Typical Use First CPU specifically designed

IntelDX4™ Processor

IntelDX2™ Processor

25 MHz 20 MHz 100 MHz 75 MHz (256 KB L2 cache) 66 MHz 50 MHz (256 KB L2 cache)

for Notebook PCs Mar. 7, 1994 0.6-micron 1.6 million 4 GB High-performance, entry-level desktops and value notebooks

Aug. 10, 1992 66 Mhz (256 KB L2 cache) Mar. 3, 1992 50 Mhz Sept. 21, 1992 33 MHz Sept. 16, 1991 25 MHz 20 MHz 16 MHz September 30, 1991 25 MHz Oct. 15, 1990 20 MHz June 24, 1991 50 MHz May 7, 1990 33 MHz Apr. 10, 1989 25 MHz Oct. 26, 1992 33 MHz 25 MHz Jan. 25, 1989 20 MHz June 16, 1998 16 MHz Apr. 10, 1989 33 MHz Apr. 4, 1988


1.2 million

4 GB

High-performance, low-cost desktops

Intel486™ SX Processor

33 MHz 25 MHz 20 MHz 16 MHz

0.8 and 1-micron

1-micron 1,185,000 0.8-micron 900,000

4 GB

Low-cost, entry-level desktops

Intel386™ SL Processor

25 MHz 20 MHz



4 GB

First CPU designed specifically for portables

Intel486™ DX Processor

50 MHz 33 MHz 25 MHz

1-micron 50 MHz 0.8-micron 33 MHz 25 MHz

1.2 million

4 GB

Desktops and servers.

Intel386™ SX Processor

33 MHz 25 MHz 20 MHz 16 MHz

1.5- and 1-micron


16 MB

Entry-level desktop and portable computing

Intel386™ DX Processor

33 MHz 25 MHz 20 MHz 16 MHz

1.5- and 1-micron


4 GB


25 MHz Feb. 16, 1987 20 MHz Oct. 17, 1985 16 MHz February 1982


80186 8088

12 MHz 10 MHz 6 MHz 12 MHz 10 MHz 8 MHz 5 MHz 10 MHz 8 MHz 5 MHz 5 MHz



16 MB

Desktops (standard CPU for all IBM PCs clones at the time) Used mostly in controller applications Desktops (standard CPU for all IBM PCs and PC clones at the time) Portable computing

1982 June 1979 3-micron 29,000


June 8, 1978



1 MB


March 1976



8080 8008

2 MHz 200 KHz

April 1974 April 1972

6-micron 10-micron

4,500 3,500

64 KB 16 KB


108 KHz

Nov. 1971



640 Bytes

Toledo scale. Computed cost from weight and price. High level of integration, operating for first time on a single 5-volt power supply (down from 12 volts). Traffic light controller, Altair computer (first PC). Dumb terminals, general calculators, bottling machines, data/character manipulation Busicom calculator, arithmetic manipulation


CMOS Study Notes

CMOS: CMOS stands for Complementary Metal Oxide Semiconductor, a small portion of battery powered memory on the motherboard that contains system settings like types of drives, device types in the system, which drive to start up from etc. CMOS and BIOS are often interchanged although they are different things. Think of the BIOS as the skeleton frame upon which the CMOS settings hang. All computer memory forgets everything it holds when power to it is shut off. If the power was totally shut off to your CMOS, your computer would forget its start up settings, and you’d have to re-enter these settings every time you started your computer! Fortunately this is not the case as your CMOS always receives enough power to remember its settings, even when your computer is off. How? It is powered by a small lithium battery on your motherboard. Lithium batteries are designed to last years, and often outlive the usefulness of the computer they reside in. If you keep a computer long enough, you will have to replace the battery. This is usually an easy task. Just lift the retaining clip, pop out the old battery and put in a new one. Make sure your computer is off though, and beware of static discharge! After you replace the battery, you WILL HAVE TO re-enter all startup settings into CMOS setup. It is a good idea to enter the CMOS setup and write down the information it contains. Unless you are fairly knowledgeable in computer support, have original manuals or like frustrating experiences, it is a good idea to keep the CMOS information on paper in case it gets erased. HOW TO GET INTO THE CMOS? Computers differ on how to enter setup. Normally when you start your computer, it will say something like "Hit <DEL> to enter setup." Take note of what key (or combinations of keys to hit. You can safely look around the setup program. If you accidentally change something, just exit without saving What is CMOS Setup? Various devices are attached to a computer. These devices have got various parameters such as IRQ settings, DMA channel settings, etc. Thus this information about the devices or peripherals attached to the computer must be known at the time of startup. These parameters are manually set if the devices are of older types that are non-plug-n-play. But if these devices are plug-n-play then the parameters are detected automatically. This information about the devices is to be stored or else it has to be set every time the machine is started. So this information is set and stored in the CMOS setup. The CMOS has got a jumper. This jumper is used only for clearing the data stored in the CMOS. Setting up CMOS setup.

The listing below is showing all the informations stored into the BIOS;                   Time and Date Number of Floppy Disk Drives Floppy Disk Drives informations (size, number of track, sectors, head, ect) Number of Hard Disk Drives Hard Disk Drives informations (size, number of track, sectors, head, mode, ect) Number of CD-ROM Drives CD-ROM Drives informations (operating mode, ect) Boot sequence ( Enable the user to decide what disk will be checked first when booting) Cache Memory informations (size, type, timing, ect) Main Memory Informations (size, type, timing, ect) ROM Shadowing informations (Enabling or disabling of Video and System ROM shadow) Basic Video mode informations (EGA, VGA, ect) Setting of PCI and ISA slots AGP Port Settings (aperture size, ect) Viirus Protection Warning Setting of COM Ports (Enabling or disabling of Com port 2 for instance) Password Protection (enable the user to set his password) Energy saving informations (snooze modes for the HDD and monitor)

Depending on your BIOS type there could be many alot of other information not listed above that can possibly be stored in the BIOS memory. Note that some of the information in the above list may not be a part of the BIOS installed on your computer.

Basic Networking Terms and Definitions
Numeric 10BASE2 10BASE5 10BASE-T Ethernet running on thin coax network cable at 10 Mbps. Ethernet running on thick wire network cable at 10 Mbps. Ethernet running on unshielded twisted pair (UTP) cable at 10 Mbps. Point-to-point network media, with one end of cable typically going to repeater/hub and other to network device. Ethernet running on unshielded twisted pair (UTP) cable at 100 Mbps. Point-to-point network media, with one end of cable typically going to repeater/hub and other to network device.


A AAL (ATM Adaptation Layer) A collection of standard Asynchronous Transfer Mode (ATM) protocols that adapt user traffic to the cell format. AAL is subdivided into the convergence sub-layer (CS), and the Segmentation And

AAL0 (AAL Type 0) AAL1 (AAL Type 1)

AAL2 (AAL Type 2)

AAL 3/4 (AAL Type 3 and 4)

AAL5 (AAL Type 5)

ABR (Available Bit Rate)

Reassembly (SAR) sub-layer. There are several types of AALs -- AAL0, AAL1, AAL2, AAL3/4 and AAL5 -- to support the various AAL service classes. Null protocol. No cell adaptation occurs. Used for transporting time-dependent Constant Bit Rate (CBR) traffic, such as audio and video, and emulating Time Division Multiplexer (TDM)-based circuits, such as digital signal level 1 (DS1) and E1. Timing information must be exchanged between the source and the destination. AAL1 supports QoS Class A (defined under QoS in this glossary). Used for supporting time-dependent slow or Variable Bit Rate Real Time (VBR-RT) connection-oriented traffic (e.g., packetized and compressed audio and video). Timing information must be exchanged between the source and the destination. AAL2 supports QoS Class B (defined under QoS in this glossary). Used for supporting both connectionless and connection-oriented Variable Bit Rate NonReal Time (VBR-NRT) traffic. AAL3 supports quality of service (QoS) class C while AAL4 supports QoS class D. AAL3 and AAL4 are combined into one type. AAL3/4 also performs re-sequencing and cell identification operations. AAL3/4 services are suitable for supporting interworking with frame relay, SMDS and X.25. Used for supporting connection-oriented variable bit rate VBR-NRT data traffic and signaling messages. AAL5 supports quality of service (QoS) Class X. AAL5 services are suitable for supporting interworking with most data networking protocols, such as frame relay, SMDS, Ethernet and Internet Protocol (IP). AAL5 is more popular and easier to implement than AAL3/4. One of five Asynchronous Transfer Mode (ATM) service categories. In this service type, the network attempts to pass the maximum number of cells but does not guarantee cell delivery. ABR supports Variable Bit Rate (VBR) data traffic with flow control, a minimum guaranteed data transmission rate, and specified performance parameters. In exchange for regulating user traffic flow, the network offers minimal cell loss of accepted traffic. Traffic parameters are Peak Cell Rate (PCR) and Maximum Cell Rate (MCR). Quality of Service (QoS) parameters are Cell Loss Ratio (CLR) and Cell Error Rate (CER).

Access Network

Portion of public switched network that connects access nodes to individual subscribers. Predominantly passive twisted pair copper wiring. Access Nodes Points on edge of the Access Network that concentrate individual access lines into smaller number of feeder lines. May also perform various forms of protocol conversion. Examples are Digital Loop Carrier systems concentrating individual voice lines to T1 lines, cellular antenna sites, PBXs, and Optical Network Units (ONUs). ACK Acknowledgement. Address Prefix String of 0 or more bits up to maximum of 152 bits that is lead portion of one or more ATM addresses. Address Resolution Procedure by which client associates LAN destination with ATM address of another client or the BUS. Administrative Domain Collection of managed entities grouped for administrative reasons. ADPCM (Adaptive (1) Reduced bit rate variant of PCM audio Differential Pulse Code encoding. (See also PCM.) This algorithm Modulation) encodes difference between actual audio sample amplitude and predicted amplitude and adapts resolution based on recent differential values. (2) Coding scheme standardized by CCITT (See CCITT) that allows analog voice to be carried on 32 kbps digital channel instead of standard 64 kbps PCM channel. ADSI (Analog Display Protocol that simplifies use of advanced Services Interface) features by displaying text messages, generated by a remote computer or central office switch, on a user's telephone display or television set. ADSL (Asymmetric Modems attached to twisted pair copper Digital Subscriber wiring that transmit from 1.5 to 9 Mbps Line) downstream (to subscriber) and from 16 to 800 kbps upstream, depending on line distance. AIN (Advanced Bellcore's switching concept that centralizes Intelligent Network) significant amount of intelligence rather than constantly placing more information in central office switch. AMI (Alternate Mark Line coding format used on T1 facilities that Inversion) transmits ones by alternate positive and negative pulses. AMPS Advanced Mobile Phone Service (US), the name applied to the original analog cellular system. Still the predominant cellular transmission scheme. ANSI (American U.S. body and standards-setting National Standards organization, not arm of the government. Institute) Accredits various other standards setting committees.

API (Application Programming Interface) AppleTalk

Application Layer

Application-Level Firewall

APPN (Advanced Peer to Peer Network)

ARP (Address Resolution Protocol)

ASCII (American Standard Code for Information Interchange) ASP (Abstract Service Primitive)

A set of calling conventions that define how a service is invoked through a software package. Communications protocol developed by Apple Computer to allow networking between Macintoshes. All Macintosh computers have LocalTalk port, running AppleTalk over 230K bps serial line. Also runs over Ethernet (EtherTalk) and Token Ring (TokenTalk) network media. The top layer of the network protocol stack. The application layer is concerned with the semantics of work, such as formatting electronic mail messages. (The lower layers of the network address how to represent that data and how to reach the foreign node.) Firewall system providing service by processes that maintain complete TCP connection state and sequencing. Often readdresses traffic so outgoing traffic appears to have originated from firewall, rather than internal host. IBM network architecture for building dynamic routing across arbitrary network topologies. Intended as an eventual replacement for SNA, IBM's static routed, hierarchical network architecture. Used to dynamically discover the low-level physical network hardware address that corresponds to the high-level Internet Protocol (IP) address for a given host. ARP is limited to physical network systems that support broadcast packets that can be heard by all hosts on the network. ARP is defined in Request for Comments (RFC) 826. A seven-level code (128 possible characters) used for data transfer.

Asynchronous Time Division Multiplexing

Asynchronous Transmission

ATM (Asynchronous

Implementation-independent description of interaction between service-user and service-provider at particular service boundary, as defined by Open Systems Interconnection (OSI). Multiplexing technique in which transmission capability is organized in unassigned time slots that are assined to cells upon request of each application's instantaneous real need. A transmission method that sends units of data one character at a time. Characters are preceded by start bits and followed by stop bits, which provide synchronization at the receive terminal. A standard implementation of cell relay, a

Transfer Mode)

ATM Address

ATM-ARP (ATM Address Resolution Protocol)

ATM Layer Link

ATM Link ATM Peer-to-Peer Connection ATM Traffic Descriptor

ATM User-User Connection


ATU-C and ATU-R (ADSL Transmission Unit, Central or Remote) AUI (Attachment Unit Interface) Authentication Authentication token



packet switching technique using packets of a fixed length, called cells. It is asynchronous because the recurrence of cells containing information from an individual user is not periodic. Defined in UNI Specification as 3 formats, each having 20 bytes in length, including country, area and end-system identifiers. An address resolution protocol for mapping Asynchronous Transfer Mode (ATM) and Internet Protocol (IP) addresses. (Each host is assigned a unique IP address.) ATM-ARP can be used for discovering local area network (LAN) hosts attached to an ATM network or in classical IP over ATM. Section of an ATM Layer connection between two adjacent active ATM Layer entities (ATM-entities). Virtual path link (VPL) or virtual channel link (VCL). Virtual channel connection (VCC) or virtual path connection (VPC). Generic list of traffic parameters that can be used to capture the intrinsic traffic characteristics of requested ATM connection. Association established by ATM Layer to support communication between two or more ATM service users (i.e., between two or more next higher entities or between two or more ATM-entities). Communications over an ATM Layer connection may be either bidirectional or unidirectional. Same Virtual Channel Identifier (VCI) issued for both directions of connection at interface. ATM Forum-defined 25.6Mbit/s cell-based user interface based on IBM token ring network. Device at end of ADSL line that stands between line and first item of equipment in subscriber premises or telephone switch. May be integrated within access node. 15-pin shielded, twisted pair Ethernet cable used (optionally) to connect between network devices and MAU. Process of determining identity of user attempting to access system. Portable device used for authenticating user. Operates by challenge/response, time-based code sequences or other techniques. May include paper-based lists of one-time passwords. Process of determining what types of activities are permitted. Usually, authorization in context of authentication. Automatic determination and matching of transmission speed.



AWG (American Wire Gauge) B

Clause 28 of the IEEE 802.3u standard specifies MAC sublayer for identification of speed and duplex mode of connection being supported by device. Support optional for individual vendors. Auto-Negotiation in Clause 28 of IEEE 802.3u standard. Ability of 10/100 Ethernet device to interpret speed or duplex mode of attached device and adjust to that rate. System that specifies wire size. Gauge varies inversely with wire diameter size.

Backbone Main cable in network. Bandwidth on Demand Feature that allows remote access device to initiate second connection to particular site. Used to increase amount of data transferred to that site to increase desired threshold. Network manager configuring remote access server will specify number of bits or percentage of connection bandwidth threshold to trigger the secondary connection. Multilink PPP is emerging standard to allow this feature to be interoperable. Currently, the only way to ensure correct operation is to use devices on both end from same vendor. Baseband LAN Local Area Network that uses single carrier frequency over single channel. Ethernet, Token Ring and Arcnet LANs use baseband transmission. Bastion host System hardened to resist attack. Installed on network to potentially come under attack. Often component of firewalls or may be outside Web server or public access system. Generally runs some form of general purpose operating system (e.g., UNIX, VMS, WNT, etc.) rather than ROM-based or firmware operating system. Baud Unit of signal frequency in signals per second. Not synonymous with bits per second as signals can represent more than one bit. Baud equals bits per second only when signal represents single bit. BBC (Broadband Bearer class field that is part of initial Bearer Capability) address message. BCD (Binary Coded Form of coding of each octet within cell, Decimal) where each bit has one of two allowable states, 1 or 0. BECN (Backward An indicator bit in the frame relay header to Explicit Congestion notify the source of traffic that the virtual Notification) circuit is passing through a congested switch. It is set on any traffic flowing from the destination back to the source that passes through the congested switch.

BER (Bit Error Rate)

Best Effort

BETRS (Basic Exchange Telecommunications Radio Service) BGP (Border Gateway Protocol) Big-Endian

(1) Measure of transmission quality generally shown as negative exponent, (e.g., 10-7 or 1 in 107 bits in error or 1 in 10,000,000 bits in error). (2) Measure of transmission accuracy as ratio of bits received in error to bits sent (e.g., 10-9 or 1 error in 1,000,000,000 bits) is common in voice and data transmission systems. A Quality of Service (QoS) class in which no specific traffic parameters and no absolute guarantees are provided. Best effort includes Undefined Bit Rate (UBR) and Available Bit Rate (ABR). Simplest form is "fixed cellular." Form of wireless local exchange service where handoff is not required. An exterior gateway protocol defined in Request for Comments (RFC) 1267 and 1268. A format for storage or transmission of binary data in which the most significant bit (or byte) comes first. Binary, machine-readable forms of programs that are compiled or assembled, as opposed to source language forms of programs. Characteristic of having only two states, such as current on and current off. Binary number system uses only ones and zeros. Method used at PHY layer to monitor error performance of link. Check bit or word is sent in link overhead covering previous block or frame. Bit errors in payload will be detected and may be reported as maintenance information. Digital network with ATM switching operating at data rates in excess of 1.5 Mbps. ATM enables transport and switching of voice, data, image, and video over same infrastructure. SS7 protocol that defines signaling messages to control connections and services. Smallest unit of data processing information. Assumes value of 1 or 0. Standardized connector used with Thinnet and coaxial cable. Any of 22 regulated telephone companies organized into seven Regional Bell holding companies. See RBOC and RHC. Used for booting diskless nodes. Described in Request for Comments (RFC) 951 and 1084. Logical node in a specified peer group, with at least one link that crosses peer group boundary.



BIP (Bit Interleaved Parity)

B-ISDN (Broadband Integrated Digital Network)

BISUP (Broadband ISDN User's Part) Bit (binary digit) BNC BOC (Bell Operating Company) BOOTP (Bootstrap Protocol) Border Node

Bps (bits per second) BRI (Basic Rate Interface)



Broadband Access Broadband Network

Broadcast Brouter


BUS (Broadcast and Unknown Server)

BW (bandwidth) Byte C CAC (Carrier Access Code)

Units of transmission speed. ISDN scheme identified as 2B1D that permits two “bearer” channels, each operating at 64 kbps, and one “data” channel, operating at 16 kbps, to be carried over single twisted pair. A device interconnecting Local Area Networks (LANs) at the Open Systems Interconnection (OSI) data link layer, and filtering and forwarding frames according to Media Access Control (MAC) addresses. Wide-band technology capable of supporting voice, video and data, possibly using multiple channels. Access capable of supporting one or more broadband services. Network that uses multiple carrier frequencies to transmit multiplexed signals on single cable. Several networks may coexist on single cable without interfering with one another. Data transmission to all addresses or functions. Device that routes specific protocols, such as TCP/IP and IPX, and bridges other protocols, thereby combining functions of both routers and bridges. LAN topology in which all nodes are connected to single cable, considered equal, and receive all transmissions on the medium. Server that handles data sent by LE Client to broadcast MAC address (FFFFFFFFFFFF), all multicast traffic, and initial unicast frames sent by LAN Emulation Client. Numerical measurement of throughput of system or network. Data unit of eight bits.

CAC (Connection Admission Control)


Five to seven-digit number that identifies which interexchange carrier call uses. Subscribers dial these digits with each long distance call or pre-subscribe to particular carrier and let digital switch software add CAC. Set of actions taken by network during call setup phase (or during call re-negotiation) to determine whether connection request should be accepted or rejected (or whether request for re-allocation can be accommodated). Association between two or more users or between user and network entity that is established by use of network capabilities.

CAT-5 (Category 5 UTP)

CBR (Constant Bit Rate)

CC (Continuity Cell)

CCITT (Comité Consultatif Internationale de Telegraphique et Telephonique)

CCR (Current Cell Rate)

CDMA (Code Division Multiple Access)

CDPD CD-ROM (Compact Disk-Read Only Memory) CDV (Cell Delay Variation)

Association may have zero or more connections. Unshielded twisted pair (UTP) standard cabling, commonly used with fast Ethernet and asynchronous transfer mode (ATM) interfaces for higher-speed cell transmission (more than 50 Mbps). One of the five Asynchronous Transfer Mode (ATM) classes of service. CBR supports the transmission of a continuous bit-stream of information, such as voice and video traffic, which require a constant amount of bandwidth allocated to a connection during the transmission. A cell used periodically to check whether a connection is idle or has failed. Continuity checking is one of the Operation Administration And Maintenance (OAM) function types for fault management. International group operating under auspices of International Telecommunications Union (ITU) and charged with establishing telecommunications standards. Name recently changed to ITU-TSS (International Telecommunications UnionTelecommunications Standards Sector). The currently acceptable transmission rate for an end-system as defined by RM cells within Available Bit Rate (ABR). The field in the RM cell indicates the current complying cell rate (i.e., ACR) a user can transmit over a Virtual Channel (VC) connection. Digital transmission scheme claimed to be more efficient than other systems and to offer up to 20 times more call handling capacity than analog cellular systems. Cellular Digital Packet Data Used by computer to store large amounts of data. A Quality of Service (QoS) parameter that measures the difference between the transfer delay of a single cell transfer delay and the expected transfer delay. This parameter is important for time-sensitive virtual circuits such as Constant Bit Rate (CBR) and Variable Bit Rate Real Time (VBRRT). Used in Constant Bit Rate (CBR) traffic, it specifies the acceptable tolerance of the CDV (jitter). The 53-byte basic information unit within an Asynchronous Transfer Mode (ATM) network. The user traffic is segmented into cells at the source and reassembled at the

CDVT (Cell Delay Variation Tolerance) Cell

destination. An ATM cell consists of a 5-byte ATM header and a 48-byte ATM payload, which contains the user data. CER (Cell Error Rate) A Quality of Service (QoS) parameter that measures the number of transmitted cells that are erroneous over a specific period of time (i.e., those that contain errors when they arrive at the destination). CES (Circuit Emulation An Asynchronous Transfer Mode (ATM) Service) service in which Constant Bit Rate (CBR) virtual circuits use AAL1 to emulate an endto-end physical circuit by providing a time division multiplexer (TDM)-like virtual circuit between local access circuits. Challenge/response Authentication technique where server sends unpredictable challenge to user, who computes response using some form of authentication token. Channel Data path between two nodes. Channelized T1/E1 T1 or E1 service that is divided into individual 64 Kbps channels, as opposed to unchannelized service, which uses the entire bandwidth of the T1 (1.544 Mbps) or E1 (2.048 Mbps). Channelized T1 or E1 lines can consist of switched lines with either inband signaling or leased lines. CHAP (Challenge Authentication scheme for PPP where Handshake password is required to begin connection Authentication and during the connection. Failure to provide Protocol) correct password during login or challenge mode results in disconnect. Checksum A computed value which is dependent upon the contents of a packet. This value is sent along with the packet when it is transmitted. The receiving system computes a new checksum based upon the received data and compares this value to the value sent with the packet. If the two values are the same, the receiver has a high degree of confidence that the data was received correctly. CIR (Committed A term used in frame relay that defines the Information Rate) information rate the network is committed to providing the user. CLEC Competitive LEC CLID (Caller ID) Service that permits subscribers to see telephone number and/or name of calling party. Frequently, “call blocking” is offered, allowing calling parties to block display of their telephone numbers. CLP (Cell Loss Priority) A 1-bit field in the Asynchronous Transfer Mode (ATM) cell header specifying whether a cell is more or less likely to be discarded by an ATM network experiencing congestion. CLR (Cell Loss Ratio) A Quality of Service (QoS) parameter that gives the ratio of the lost cells to the total number of transmitted cells.

CMIP (Common ITU-TSS standard for message formats and Management Interface procedures used to exchange management Protocol) information to operate, administer, maintain, and provision a network. CO (Central Office) A telephone company office that connects to all local loops in a given area and where circuit switching of customer lines occurs. Coaxial Cable Electrical cable with solid wire conductor at its center, surrounded by insulating materials and an outer metal screen conductor with an axis of curvature coinciding with inner conductor. Examples are standard Ethernet cable and Thinwire Ethernet cable. COD (Connection Data requiring sequential delivery of its Oriented Data) component PDUs to assure correct functioning of its supported application (e.g., voice or video). CODEC Electronic circuit converts analog voice (Coder/Decoder) signals into digital signals for transmission and switching, and digital signal to analog voice signals so they can be used by telephone. Collision Result of two network nodes transmitting on same channel at same time. Transmitted data is not usable. Collision Detect Signal indicating one or more stations are contending with local station's transmission. Signal is sent by the Physical layer to the Data Link layer on Ethernet/IEEE 802.3 node. Communication Server Dedicated, standalone system that manages communications activities for other computers. Concentrator A wiring hub in a star-topology network. Sometimes refers to a device containing multiple modules of network equipment. Configuration Phase in which LE Client discovers LE Service. Connection (1) ATM connection consists of concatenation of ATM Layer links to provide end-to-end information transfer capability to access points. (2) In switched virtual connection environments, LAN Emulation Management entities set up connections between each other using UNI signaling. Connection-Oriented The data communication method in which communication proceeds through three welldefined phases: connection establishment, data transfer, and connection release. Transmission Control Protocol (TCP) is a connection-oriented protocol. Connectionless The data communication method in which communication occurs between hosts with no previous setup. Packets between two hosts may take different routes, as each is

independent of the other. User Datagram Protocol (UDP) is a connectionless protocol. Console Terminal used to configure network devices at boot (start-up) time. Core Network Combination of switching offices and transmission plant connecting switching offices together. Linked by several competing Interexchange networks in U.S. local exchange. Now extends to national boundaries in rest of world. CPE (Customer Telecommunications equipment provided for Premise Equipment) and/or installed by a service provider at a home or enterprise. CRC (Cyclic A data transmission error-detection scheme. Redundancy Check) A polynomial algorithm is performed on the data, and the resultant checksum is appended at the end of the frame. The receiving equipment performs a similar algorithm. Crosstalk Noise passed between communications cables or device elements. CRS (Cell Relay A bearer service offered by an asynchronous Service) transfer mode (ATM) network to the end users delivers Asynchronous Transfer Mode (ATM) cells directly over the network. Cryptographic One-way function applied to file to produce Checksum unique “fingerprint” of file for later reference. Primary means of detecting file system tampering on UNIX. CS (Convergence (1) General procedures and functions that Sublayer) convert between ATM and non-ATM formats, describing functions of upper half of AAL layer. (2) Used to describe conversion functions between non-ATM protocols, such as frame relay or SMDS and ATM protocols above AAL layer. CSA (Canadian One of several bodies that develops Standards Association) telecommunications standards. CSMA/CD (Carrier A protocol in which stations listen to the bus Sense Multiple Access and only transmit when the bus is free. If a with Collision collision occurs, the packet is retransmitted Detection) after a random time-out. Ethernet uses CSMA/CD. CSPDN Circuit Switched Public Data Network CSTA Computer Supported Telephony Application (ECMA) CSU (Channel Service Equipment installed on customer premises Unit) to terminate a DDS or T1 circuit. CSUs provide network protection and diagnostic capabilities. CTD (Cell Transfer A quality of service (QoS) parameter that Delay) measures the average time for a cell to be transferred from its source to its destination over a virtual channel (VC) connection. CTD is the sum of any coding, decoding, segmentation, reassembly, propagation,

CTI CTIA Cut-through

processing, and queuing delays. Computer Telephony Integration Cellular Telecommunications Industry Association Technique for examining incoming packets where Ethernet switch looks only at first few bytes of packet before forwarding or filtering it. Faster than looking at whole packet but allows some bad packets to be forwarded.

D DA (Destination Address) DA (Destination MAC Address) DACS (Digital Access and Cross Connect System) Data Connections Information sent in forward direction indicating address of called station or customer. Six-octet value that uniquely identifies endpoint sent in IEEE LAN frame headers to indicate frame destination. A time-slot switch that allows T1 or E1 lines to be remapped electronically at the DS-0 (64 Kbps) level. Also called DCS or DXS. Data VCCs connect LECs to each other and to Broadcast and Unknown Server. Carry Ethernet/IEEE 802.3 or IEEE 802.5 data frames as well as flush messages. Attack is encoded in innocuous-seeming data that is executed by user or other software to implement attack. Concern it may get through firewall in data form and launch attack against system behind firewall. AKA denial of service attack. Transformation of data into unreadable, meaningless data through a cryptographic transformation using key. Decryption turns unintelligible data into meaningful data using a key. A packet or string of bytes carrying and routing data and sufficient information from source to destination. Layer 2 of the Open System Interconnection (OSI) model. Layer 2 is concerned with transmitting units of information or frames, and associated error-checking. It establishes, maintains, and releases datalink connections between elements in a network. Logarithmic unit describing ratio of two powers. Ratio of two power levels, in which the second is one milliwatt. Specifies country in which address is registered. Codes are given in ISO 3166. Field length is two octets. Digits are encoded in Binary Coded Decimal (BCD) syntax. Codes left justified and padded on right with

Data-driven attack

Data Encryption


Data Link Layer

dB (Decibel) dBm (Decibel Referenced to a Milliwatt) DCC (Data Country Code)

DCE (Data Communication Equipment) DDS (Digital Data Service) DECnetTM

hexadecimal value "F" to fill two octets. Generic definition of computing equipment that attaches to network via DTE. 56 or 64 kbps digital private line channel. Digital Equipment Corporation (DEC) proprietary network architecture running on point-to-point, X.25 and Ethernet networks. Used for encrypting message text and computing message integrity checks (signatures). A popular, standard encryption scheme. Automatic detection, based on network manager’s pre-defined parameters, of need to initiate dial-up connection to a remote network. Security feature that ensures people do not log into modems to which they should not have access. When connection is requested, system checks user name for validity, then “dials back” number associated with that user name. Package of information, digitally signed by trusted authority (usually referred to as a CA or Notary), that binds a public key to owner. Usually consists of identifier field, public key field, serial number (of certificate), activation and expiration date, and signature field. X.509 defines a standard format. Algorithm sometimes used to calculate routes given link and nodal state topology database. System in which each computer or node in network performs its own processing and manages some of its data while network facilitates communications between nodes. Digital transmission system designed for subscriber loop plant. Multiplexes many circuits onto very few wires or onto single fiber pair. A unique number assigned to a Permanent Virtual Connection (PVC) endpoint in a Frame Relay network. UNIX International Specification, Revision 2.0.0, OSI Work Group, August 1991. (1) System that combines number of digital circuits. (2) Prefix for Northern Telecom family of digital central office switches (DMS-10, DMS-100/200, DMS-250, DMS300, and DMS-500.) Assuming DNS name of another system by corrupting name service cache of victim system or compromising domain name

DEK (Data Encryption Key) DES (Data Encryption Standard) Dial on Demand


Digital Certificate

Dijkstra's Algorithm

Distributed Processing

DLC (Digital Loop Carrier)

DLCI (Data Link Connection Identifier) DLPI (Data Link Provider Interface) DMS (Digital Multiplex Systems)

DNS spoofing

server for valid domain. See Administrative Domain. Text name appended to host name to form unique host name across Internets. Download Transfer of a file or information from one network node to another. Generally refers to transferring a file from big node, such as server, to a small node, such as terminal or printer. DPN (Data Packet (1) Network in which “bundles” of Network) information are transmitted, one after another. Differs from circuit network, in which entire circuit is dedicated to particular user. (2) Prefix for Northern Telecom’s DPN data networking switches. DS0 (Digital A 64 Kbps unit of transmission bandwidth. A Subscriber Level Zero) worldwide standard speed for digitizing one voice conversation, and more recently, for data transmission. Twenty-four DS0s (24x64 Kbps) equal one Digital Signal Level 1 (DS1). DS1 (Digital Signal Framing specification used in transmitting Level 1) digital signals at 1.544 Mbps on a T1 facility or 2.048 Mbps on an E1 facility. DS2 Channel For a T1 line, a 6.312 Mbps channel that consists of four Digital Signal Level 1 (DS1) channels. For an E1 line, an 8.45 Mbps channel that consists of four DS1 channels. DS3 Channel A 44.736 Mbps line consisting of seven DS2 channels. Also called a T3 line. DS3 PLCP (Physical Alternate method used by older T carrier Layer Convergence equipment to locate ATM cell boundaries. Protocol) Recently been moved to informative appendix of the ATM DS3 specification and replaced by HEC method. DSL (Digital A modem technology for transmitting Subscriber Line) information at high speeds on existing copper telephone lines to homes and businesses. DSL requires runs of usually less than 20,000 feet to a central telephone office. Types of DSL include Asymmetric DSL (ADSL), Symmetric DSL (SDSL), and High Bit Rate DSL (HDSL). DSLAM (Digital Device that takes number of ADSL Subscriber Line Access subscriber lines and concentrates these to Multiplexer) single ATM line. DSS1 (Digital N-ISDN UNI Signaling. Subscriber Signaling System #1) DSS2 (Digital B-ISDN UNI Signaling. Subscriber Signaling System #2) DSU (Data Service (1) Equipment used to attach users' Unit) computing equipment to a public network. (2) Device located on the customer’s premises that converts a digital data signal Domain Domain Name

DSU (Digital Service Unit)

DTE (Data Terminal Equipment)

Dual homed gateway

DWS (Dialable Wideband Service)

to a digital transmission signal. A user device interfacing to a digital circuit, such as DDS or T1 when com-bined with a Channel Service Unit (CSU). The DSU converts the user’s data stream to bipolar format for transmission. (1) Generic definition of external networking interface equipment, such as modem. (2) Name applied to a piece of terminal equipment. System with two or more network interfaces, each of which is connected to different networks. With firewall, acts to block or filter some or all traffic trying to pass between networks. Alternative name for Multirate ISDN, providing dialed data connectivity at desired bandwidth on per call basis (from 128 kbps through 1.536 Mbps in 64 kbps increments).

E Public network addressing standard with maximum of 15 digits. ATM uses E.164 addressing for public network addressing. E1 The 2.048 Mbps digital carrier system common in Europe. E3 The European standard for high-speed digital transmission operating at 34 Mbps. ECMA Previously European Computer Manufacturers Association ECSA (Exchange Standards body sponsored by exchange Carrier Standard carriers and accredited by American National Association) Standards Institute (ANSI). Recently changed to Alliance for Telecommunications Industry Solutions (ATIS). ECTF Enterprise Computer Telephony Forum EGP (Exterior Gateway A protocol that distributes routing Protocol) information to the routers connecting autonomous systems. Today, the term “router” is commonly used in place of the term “gateway.” There is also a routing protocol called EGP, defined in STD 18, Request for Comments (RFC) 904. EIA Electronics Industry Association ELA (Emulated LAN) The Asynchronous Transfer Mode (ATM) segment of a virtual local area network (VLAN) based on the ATM forum Local Area Network Emulation (LANE) standard. A VLAN consists of an ELAN segment and traditional LAN segment. EMI (Electromagnetic Electromagnetic waves emitted by some Interference) electrical devices that distort or overwhelm other communications signals. Encapsulation Encapsulating data is a technique used by layered protocols in which a low level E.164

Encrypting router Enterprise Network

ESF (Extended Superframe Format) Ethernet

EtherTalk ETSI (European Telecommunications Standards Institute) F FCC FCS (Frame Check Sequence)

protocol accepts a message from a higherlevel protocol, then places it in the data portion of the lower-level frame. The logistics of encapsulation require that packets traveling over a physical network contain a sequence of headers. See tunneling router and virtual private network. An information infrastructure that often combines private and public facilities to cover all of the locations operated by a single company or corporate enterprise with a single communications fabric. A T1 framing format that uses the framing bit to provide mainte-nance and diagnostic functions. Most popular LAN technology in use today, with configuration rules defined by IEEE standard 802.3. 10 Mbps, CSMA/CD baseband network that runs over thin coax, thick coax, twisted pair or fiber optic cable. Apple Computer's protocol for Ethernet transmissions. Primary telecommunications standards organization.

Federal Communications Commission Any mathematical formula that derives numeric value based on bit pattern of transmitted block of information and uses that value at receiving end to determine existence of any transmission errors. FDDI (Fiber An American National Standards Institute Distributed Data (ANSI) standard for fiber-optic links with Interface) data rates up to 100 Mbps. FEC (Forward Error Technique for detection and correction of Correction) errors in digital data stream. Frequently used in data transmission systems. Redundant bits are transmitted along with payload. Location and value of these bits in message allows receiving station to detect and correct errors. FECN (Forward Explicit A bit set by a frame relay network to notify Congestion an interface (DTE) that congestion avoidance Notification) procedures should be initiated by the receiving device. Fiber Optics A transmission medium consisting of thin glass filaments. Light beams travel through the fiber-optic line, carrying large amounts of data over long distances. File Server Computer that stores data for network users and provides network access to that data. Filtering Process where an Ethernet switch or bridge



Flash ROM Flow Control

FOTS (Fiber Optic Transmission System) Fractional T1

FRAD (Frame Relay Access Device)



Frame Relay

Frame Relay Frame


reads contents of packet, finds that packet does not need to be forwarded, and drops it. Filtering rate is rate at which device can receive packets and drop them without any loss of incoming packets or delay in processing. System or combination of systems that enforces boundary between two or more networks, controlling access from one to the other. Alterable programs in semipermanent storage, such as some type of read-only or flash reprogrammable memory. See ROM. A congestion control mechanism in which an Asynchronous Transfer Mode (ATM) system implements flow control. Generic term applied to any fiber optic transmission system. A service provided by carriers in which a full T1 link is leased to the customer, but the service charge is calculated based only on the number of timeslots used. A device responsible for framing data with header and trailer infor-mation (control information) before presenting the frame to the frame relay switch. A piece of a packet. When a router is forwarding an Internet Protocol (IP) packet to a network that has a maximum packet size smaller than the forwarded packet size, it is forced to break up that packet into multiple fragments. These fragments will be reassembled by the IP layer at the destination host. A data link layer “packet” that contains the header and trailer information required by the physical medium. Network layer packets are encapsulated to become frames. The terms packet, datagram, segment, and message are also used to describe logical information groupings. A network interface providing high-speed frame or packet transmission with minimum delay and an efficient use of bandwidth. A variable-length unit of data in frame relay format that is transmitted as pure data through a frame relay network. At the physical and data link layers of the Open System Interconnection (OSI) model, bits are fit into units called frames. Frames contain source and destination information, flags to designate the start and end of the frame, plus information about the integrity of the frame. All other information, such as network protocols and the actual payload of

FRS (Frame-Relay Service) FTP (File Transfer Protocol)

FTTC (Fiber to the Curb)

FTTH (Fibre to the Home) FTTK (Fiber to the Kerb) Full Duplex FUNI (Frame User Network Interface)

data, is encapsulated in a packet, which is encapsulated in the frame. Connection oriented service capable of carrying up to 4096 bytes per frame. A protocol that allows a user on one host to access and transfer files to and from another host over a network. FTP is usually the name of the program the user invokes to execute the protocol. The Internet Protocol (IP) version is defined in STD 9, Request for Comments (RFC) 959. Fiber placed in long distance network, feeder plant, and distribution plant. Fiber then proceeds to curb, with copper going from curb to home. Network where optical fibre runs from telephone switch to subscriber's location or home. See Fiber to the Curb. A circuit or device permitting transmission in two directions at the same time. A frame-based interface which supports signaling and Quality of Service (QoS) to an Asynchronous Transfer Mode (ATM). To inter-operate with a frame relay end system, the ATM switch should support FRF.8, which is the frame relay/ATM service Internetworking specification.

G G.703 ITU-T Recommendation, “Physical/Electrical Characteristics of Hierarchical Digital Interfaces.” ITU-T Recommendation, “Synchronous Frame Structures Used at Primary and Secondary Hierarchy Levels.” Voice compression algorithm used in H.324 . ITU-T Recommendation, “ATM Cell Mapping into Plesiochronous Digital Hierarchy (PDH).” One of the versions of DSL (Please see DSL). Generic Address Resolution Protocol Today, the term “router” is used in place of the original term “gateway,” a communications device/program that passes data between networks with similar functions but dissimilar implementations. A router or gateway should not be confused with a protocol converter, in which a router is a Layer 3 (network layer) gateway, and a mail gateway is a Layer 7 (application layer) gateway. Giga is the prefix representing 109, or one billion. For example, 8 gbps is 8 billion data bits per second.


G.723 G.804 G.SHDSL GARP Gateway

Gbps (Giga Bits per Second)

GFC (Generic Flow Control)

GMRP GSM (Global System for Mobile Communications)


A 4-bit field within the Asynchronous Transfer Mode (ATM) cell header that may be used to identify whether or not an ATM system implements congestion control. Generic Multicast Resolution Protocol Comprehensive network specification that includes transmission scheme, network architecture, and network services. Current standard in Europe and many countries in Asia and proposed standard for personal communication services in North America. Generic VLAN Resolution Protocol

Multiplexing and control protocol for H.324. Video compression algorithm used in H.324. A set of International Telecommunication Union (ITU) standards that define a framework for the transmission of real-time voice communications through Internet protocol (IP)-based packet-switched networks. The H.323 standards define a gateway and a gatekeeper for customers who need their existing IP networks to support voice communications. H.324 New communications standard for sharing video, voice, and data over single analog telephone line. H0 Channel 384 kbps channel that consists of six contiguous DS0s (64 kbps) of T1 line. H10 Channel North American 1472 kbps channel from T1 or primary rate carrier. Equivalent to 23 64 kbps channels. H11 Channel North American primary rate used as single 1536 kbps channel. Uses 24 contiguous DS0s or entire T1 line, except for 8 kbps framing pattern. H12 European primary rate used as single 1920 kbps channel (30 64 kbps channels or entire E1 line, except for 64 kbps framing and maintenance channel. Half Duplex A circuit or device capable of transmitting in two directions, but not at the same time. Hardware Address See Network Address. H-Channel ISDN bearer services with pre-defined speeds and starting and stopping locations on PRI that are contiguously transported from one PRI site through networks to another PRI site. HDLC (High-level Data A synchronous, bit-oriented link layer Link Control) protocol for data transmission. Frame relay is an example of an HDLC-based packet protocol. HDSL (High Bit-Rate A high-performance twisted pair

H.223/H.245 H.263 H.323

Digital Subscriber Line)


Heartbeat HEC (Header Error Control)

Hello Packet Heterogeneous network Hop

Host Table

transmission technology, best known as an enhanced transport mechanism for T1 or E1 service. It is designed for the local loop between a customer’s premises and an area exchange central office. The portion of a packet that precedes the actual data and contains source and destination addresses, error checking, and other fields. Ethernet-defined SQE signal quality test function. Using fifth octet in ATM cell header, ATM equipment may check for error and correct contents of header. Check character is calculated using CRC algorithm allowing single bit error in header to be corrected or multiple errors to be detected. Type of PNNI Routing packet exchanged between neighboring logical nodes. A network running multiple network layer protocols. A term used in routing. A path to a destination on a network is a series of hops, through routers, away from the origin. List of TCP/IP hosts on network along with their IP addresses.

I ITU-T Specifications for Traffic Measurement. B-ISDN ATM Layer Specification. B-ISDN ATM Layer (AAL) Functional Description. I.363 B-ISDN ATM Layer (AAL) Specification. I.432 ITU-T Recommendation for B-ISDN Usernetwork Interface. IASG (Internetwork Range of internetwork layer addresses Address Sub-Group) summarized in internetwork layer routing protocol. ICMP (Internet Control An extension to the Internet Protocol (IP). Message Protocol) ICMP enables the generation of error messages, test packets and informational messages related to Internet protocol. It is defined in STD 5, Request for Comments (RFC) 792. IEC (Inter-exchange Long distance telephone company. See IXC. Carrier) IEEE (Institute of An international professional society issuing Electrical and its own standards. The IEEE is a member of Electronic Engineers) the American National Standards Institute (ANSI) and International Standards Organization (ISOs). IEEE 802.3 Local Area Network protocol suite with 10 Mbps or 100 Mbps throughput. Uses Carrier Sense Multiple Access bus with Collision I.356 I.361 I.362

Detection CSMA/CD media-access method and physical and data link layer specifications of local area network. Includes 10BASE2, 10BASE5, 10BASE-FL, and 10BASE-T Ethernet implementations. Allows users to share network cable, but only one station can use the cable at a time. Variety of physical medium-dependent protocols are supported. IEEE 802.5 Local Area Network protocol suite commonly known as Token Ring. Standard originated by IBM for token-passing ring network that can be configured in star topology. Supports versions 4 Mbps and 16 Mbps. IETF (Internet A group that was initially responsible for Engineering Task developing specifications required for the Force) interoperable implementation of Internet Protocol (IP). IGP (Interior Gateway A protocol that distributes routing Protocol) information to the routers within an autonomous system. (Today the term “router” is used in place of “gateway.” IISP (Interim InterA protocol that uses user network interface switch Signaling (UNI)-based signaling (i.e., UNI 3.0/3.1) and Protocol) pre-fix routing for switch-to-switch communication. IISP is formally known as Private Network-Network Interface (PNNI) Phase 0. ILMI (Interim Local A Simple Network Management Protocol Management (SNMP)-based network management Interface) interface between an end-system and an asynchronous transfer mode (ATM) switch for status and configuration reporting and registering/deregistering ATM addresses. IMA (Inverse A method to pass Asynchronous Transfer Multiplexing over ATM) Mode (ATM) traffic over multiple E1/T1 links while maintaining the ATM quality of service and optimizing bandwidth usage. Insider Attack Attack originating from inside protected network. Instance ID Subset of an object's attributes that serve to uniquely identify MIB instance. Internet Series of interconnected local, regional, national, and international networks, linked using TCP/IP. Links many government, university, and research sites. Provides email, remote login, and file transfer services. Internet Address Also known as an Internet Protocol (IP) address. This is a 32-bit hardwareindependent address assigned to hosts using the transmission control protocol/Internet protocol (TCP/IP) suite. Internet Datagram Unit of data exchanged between pair of internet modules that includes internet header. Internet Protocol Suite Official name of TCP/IP, as used in Internet

Internetwork Internetworking


Intrusion detection

IOP (Interoperability)

IP (Internet Protocol)

IP Address IPCP I-PNNI (Integrated Private NetworkNetwork Interface)

IP splicing /hijacking

IP spoofing

IP Telephony

IPX (Internetwork Packet Exchange)

standards documents. See TCP/IP. Process of connecting two networks together. Result is referred to as an internet. General term used to describe the industry composed of products and technologies used to link networks together. Closed network of computers that uses similar technology to the Internet, such as Web servers and browsers, to make information available to controlled group of users. May have connection to Internet or may exist on Internet, achieving controlled access through passwords or other means. Detection of break-ins or break-in attempts, manually or via software expert systems that operate on logs or other information available on network. Ability of equipment from different manufacturers (or different implementations) to operate together. The network layer protocol of the transmission control protocol/Internet protocol (TCP/IP) suite. Defined in STD 5, Request for Comments (RFC) 791. It is a connectionless, best-effort packet switching protocol. See Network Address. IP Control Protocol. PNNI-compatible protocol used to exchange information between routers that augment or replace protocols such as Open ShortestPath First (OSPF) and Internetwork Packet Exchange (IPX). This enables the integration of existing router-based connectionless networks and Asynchronous Transfer Mode (ATM) networks. Attack where active, established, session is intercepted and co-opted by attacker. May occur after authentication has been made, permitting attacker to assume role of authorized user. Primary protections rely on encryption at session or network layer. Attack where system attempts to illicitly impersonate another system by using the IP network address. The transmission of voice over an Internet Protocol (IP) network. Also called Voiceover IP (VoIP), IP telephony enables users to make telephone calls over the Internet, intranets, or private Local Area Networks (LANs) and Wide Area Networks (WANs) that use the Transmission Control Protocol/Internet Protocol (TCP/IP). Netware network layer (Layer 3) protocol for transferring data from servers to workstations.


ISDN (Integrated Services Digital Network) ISO (International Standards Organization) ISO Layered Model

Uses ISDN transmission technology to deliver data at 128kbps into IDSL modem bank connected to router. A carrier-provided service that enables a variety of switched digital data and voice transmission to be accommodated simultaneously. An international organization involved in writing communi-cations standards. References that specify how dissimilar computing devices, such as Network Interface Cards (NICs), bridges and routers, exchange data over a network. Model has seven layers. Organization offering and providing Internet services to public, with own computer servers to provide services offered. A European-based, international advisory committee recommending worldwide standards for transmission. ITU-T Study Group 15 standard that addresses multiplexing of multimedia data on ATM network. B-ISDN Signaling ATM Adaptation Layer Overview. B-ISDN Adaptation Layer, Service Specific Connection Oriented Protocol. B-ISDN Adaptation Layer, Service Specific Connection Oriented Function for Support of Signaling at UNI. Signaling standard for ATM to support Switched Virtual Connections. Based on signaling standard for ISDN. Signaling standard for ISDN to support SVCs. Basis for signaling standard developed for Frame Relay and ATM. Signaling standard for Frame Relay to support SVCs. Based on the signaling standard for ISDN. International body of member countries that defines recommendations and standards relating to the international telecommunications industry. Defined and published fundamental standards for ATM. (Previously CCITT.)

ISP (Internet Service Provider) ITU (International Telecommunication Union) ITU H.222

ITU Q.2100 ITU Q.2110 ITU Q.2130

ITU Q.2931

ITU Q.931

ITU Q.933

ITU-T (International Telecommunications Union Telecommunications)

J Jitter The deviation of a transmission signal in time or phase. It can introduce errors and loss of synchro-nization in high-speed synchronous communications.


kbps (kilobits per second) Kermit

Represents 103 or 1000. For example, 64 kbps is 64,000 data bits per second. Popular file transfer and terminal emulation program.

L LAN (Local Area Network) A data transmission facility connecting a number of communicating devices (computers, terminals and printers) within a single room, building, campus or other limited geographical area. An Asynchronous Transfer Mode (ATM) forum standard that provides support for native Local Area Network (LAN) protocols across an ATM network by emulating the media access control (MAC) protocol. LANE defines a single Virtual Local Area Network (VLAN) consisting of traditional LAN segments and an Emulated Local Area Network (ELAN) segment across the ATM network. Routers will connect multiple VLANs. A flow control algorithm in which cells are monitored to check whether they comply with the established connection parameters. Non-conforming cells are either tagged or dropped from the network. The analogy is taken from a bucket with a hole in its bottom that allows the fluid to flow out at a certain rate. Maximum rate, expressed in bps, at which data can reliably be transmitted over line using given hardware. A format for storage or transmission of binary data in which the least significant byte (bit) comes first. The upper portion of the data link layer, as defined in Institute of Electrical and Electronic Engineers (IEEE) 802.2. The LLC sub-layer presents a uniform interface to the user of the data link service, which is usually the network layer. Beneath the LLC sublayer is the media access control (MAC) sublayer. A frame relay network management mechanism that uses Data Link Connection Identifiers (DLCIs) 0 and 1023 to pass management messages over the User-ToNetwork Interface (UNI). A technique that distributes network traffic along parallel paths to maximize the available network bandwidth while providing redundancy. Apple Computer's proprietary 230 Kbps baseband network protocol. Uses CSMA/CD

LANE (LAN Emulation)

Leaky Bucket

Line Speed


LLC (Logical Link Control)

LMI (Local Management Interface)

Load Balancing


access method over unshielded twisted pair wire. LSB (Least Significant Lowest order bit in binary representation of Bit) numerical value. LSSGR (LATA Multi-volume set of Bellcore technical Switching System references dealing with basic switching Generic Requirements) requirements used by switch manufacturers, procurement staffs, planners, and switch technicians. LTE (SONET Lite ATM equipment terminating communications Terminating facility using SONET Lite Transmission Equipment) Convergence (TC) layer. Usually reserved for end user or LAN equipment. Does not implement some maintenance functions used in long haul networks, such as termination of path, line, and section overhead. M MAC (Media Access Control) A protocol that defines the way workstations gain access to transmission media. MAC is most widely used in reference to Local Area Networks (LANs). For Institute of Electrical and Electronic Engineers (IEEE) LANs, the MAC layer is the lower sub-layer of the data link layer protocol. A network that provides regional connectivity within a metropolitan area (such as city). MANs are categorized between Local Area Networks (LANs) and Wide Area Networks (WANs). Device used to convert signals from one Ethernet medium to another. Measure of digital transmission speed used in computer and telephone networks. A traffic parameter that specifies the maximum number of Asynchronous Transfer Mode (ATM) cells in a burst that can be transmitted at the Peak Cell Rate (PCR). An Available Bit Rate (ABR) traffic parameter (in cells per second) that gives the slowest rate at which the network controls the flow of the source on an ABR Virtual Channel (VC) connection. A collection of objects that can be accessed via a network management protocol, such as Simple Network Management Protocol (SNMP). The objects represent values that can be read or changed. Single piece of configuration, management, or statistical information that pertains to specific part of PNNI protocol operation. Incarnation of MIB object that applies to specific part, piece, or aspect of PNNI protocol's operation.

MAN (Metropolitan Area Network)

MAU (Medium Attachment Unit) Mbps (Megabits per second or millions of bits per second) MBS (Maximum Burst Size)

MCR (Maximum Cell Rate)

MIB (Management Information Base)

MIB Attribute

MIB Instance

MII (Media Independent Interface)

MMF (Multimode Fiberoptic Cable)


MPOA (Multi-Protocol Over ATM)

MPOA Client

MPOA Server MPOA Service Area

MPOA Target

MSB (Most Significant Bit) MTBF (Mean Time Between Failures) MTP (Message Transfer Part) Multiplexer

Multiport Repeater

New standard developed for Fast Ethernet in IEEE 802.3u specification. Fast Ethernet equivalent to AUI in 10 Mbps Ethernet, allowing different types of Fast Ethernet media to be connected to Fast Ethernet device via common interface. Fiberoptic cable in which signal or light propagates in multiple modes or paths. Since these paths may have varying lengths, transmitted pulse of light may be received at different times and smeared so pulses may interfere with surrounding pulses. May cause signal to be difficult or impossible to receive, sometimes limiting distance over which MMF link can operate. Modulator-demodulator device for changing transmission signals from digital to analog for transmission over phone lines. Used in pairs, one at each end of line. Internet Engineering Task Force (IETF)defined specifications and procedures that enable network layer protocols to operate directly on top of an Asynchronous Transfer Mode (ATM) and provide end-to-end internetworking between hosts in an ATM and non-ATM environment. Edge Device Functional Group (EDFG) or Host Behavior Functional Group (HBFG). device that implements client side of one or more of MPOA protocols, (i.e., SCP client and/or RDP client). Any one of ICFG or RSFG. Collection of server functions and their clients. Collection of physical devices consisting of MPOA server plus its set of clients. Set of protocol address and path attributes (e.g., internetwork layer QoS, other information derivable from received packet) describing intended destination, which MPOA devices may use as lookup keys. Highest order bit in binary representation of numerical value. Average period of time equipment or component remains working before failure. Level 1 through 3 protocols of SS7 protocol stack. MTP 3 (Level 3) used to support BISUP. Device that allows several users to share single circuit. Funnels different data streams into single stream. At other end of communications link, another multiplexer reverses process by splitting data stream back into original streams. Repeater, either standalone or connected to standard Ethernet cable, for interconnecting

up to eight Thinwire Ethernet segments. N Name Server Software that runs on network hosts charged with translating (or resolving) text-style names into numeric IP addresses. Address that matches one of given node's summary addresses. Narrow Band PCS. Program that runs on VMS machines to configure local network hardware and remote network devices. Network Control Protocol. See 3COM/Microsoft, LAN Manager: Network Driver Interface Specification, October 8, 1990. System that supports at least Network Element Functions and may also support Operation System Functions/Mediation Functions. May be realized as either stand alone device or geographically distributed system. Cannot be further decomposed into managed elements in context of given management function. Microsoft's networking protocols for its LAN Manager and Windows NT products. Novell-developed Network Operating System (NOS). Provides file and printer sharing among networks of Personal Computers (PCs). Each network must have at least one file server, and access to other resources is dependent on connecting to and logging into file server. File server controls user logins and access to other network clients, such as user PCs, print servers, modem/fax servers, and disk/file servers. Interconnected system of computers that can communicate with each other and share files, data, and resources. Every node on network has one or more associated addresses, including at least one fixed hardware address, such as “ae-34-2c1d-69-f1” assigned by device's manufacturer. Most nodes also have protocol specific addresses assigned by network manager. A layer in the Open System Interconnection (OSI) reference model. The network layer provides address resolution and routing protocols. Address resolution enables the network layer to determine a unique network address for a node. Routing protocols allow data to flow between networks and reach their proper destination. Examples of network layer protocols include Internet

Native Address NB-PCS NCP (Network Control Program) NCP NDIS (Network Driver Interface Specification) NE (Network Element)



Network Address

Network Layer

Protocol (IP) and Address Resolution Protocol (ARP). Network Management Administrative services for managing a network, including configuring and tuning, maintaining network operation, monitoring network performance, and diagnosing network problems. Network-Level Firewall Firewall in which traffic is examined at network protocol packet level. NFS (Network File The recognized standard protocol for System) accessing files over a network as if they were on local disks. Defined in Request for Comments (RFC) 1094. NIC (Network Adapter card inserted into computer that Interface Card) contains necessary software and electronics to enable station to communicate over network. NII (National "Seamless web of communications networks, Information computers, databases, and consumer Infrastructure) electronics that puts vast amounts of information at users' fingertips." Al Gore N-ISDN (Narrowband Services include basic rate interface (2B+D Integrated Services or BRI) and primary rate interface (30B+D, Digital Network) Europe and 23B+D, North America or PRI). Supports narrowband speeds at/or below 1.5 Mbps. Same as ISDN. NNI (Network Node International Telecommunication Union (ITU) Interface or Network- standard interface between nodes within the to-Network Interface) same network. The Asynchronous Transfer Mode (ATM) forum distinguishes between two standards; one for private networks called Private Network-Network Interface (PNNI), and one for public networks known as Public NNI. NOS (Network Software for network that runs in file server Operating System) and controls access to files and other resources from multiple users. Provides security and administrative tools. Novell's NetWare, Banyan's VINES, and IBM's LAN Server are NOS examples. NRZ Non-Return to Zero bit encoding. NRZI Non-Return to Zero Inverted bit encoding. nx64K Circuit bandwidth or speed provided by aggregation of nx64 kbps channels (where n= integer > 1). 64K or DS0 channel is basic rate provided by T Carrier systems. O OAM (Operation Administration and Maintenance) A management framework defined by the International Telecommunication Union (ITU). OAM cells are special-purpose Asynchronous Transfer Mode (ATM) cells exchanged between two ATM entities for network fault and performance management, analysis and fault isolation.

OC (Optical Carrier)

Octet ODI (Open Data Link Interface) OSI (Open Systems Interconnection) OSPF (Open ShortestPath First)

A hierarchy of optical signals used to classify speeds or capacities of fiber lines, especially as related to the Synchronous Optical Network (SONET) standard. The basic speed is OC-1 (~52 Mbps). Term for eight (8) bits that is sometimes used interchangeably with byte. A standard interface specification developed by Novell to enable PC adapter cards to run multiple protocol stacks. A seven-layer model of network communications developed by the International Standards Organization (ISO). A link-state routing protocol defined in Request for Comments (RFC) 1247. OSPF supports packet authentication and up to 255 hops.

P Packet An ordered group of data and control signals transmitted through a network as a subset of a larger message. Device performing the interface between X.25 data network and asynchronous device such as personal computer. Assembles user data into packets with identifying information used to control routing. Authentication scheme for PPP links. Password can be specified for both devices on remote link. Failure to authenticate results in dropped connection prior to start of data transmission. An additional non-information bit added to a group of bits to ensure that the total number of bits in the character is even or odd. A private telephone exchange. Mechanism that given application protocol may employ to determine or control performance and health of application. For example, protocol liveness may require protocol control information be sent at some minimum rate. Some applications may become intolerable to users if they are unable to send at minimum rate. High-speed PC data bus. An Asynchronous Transfer Mode (ATM) traffic parameter (in cells per second) that characterizes the source and gives the maximum rate at which cells can be transmitted. It is calculated as the reciprocal of the minimum inter-cell interval (the time between two cells) over a given Virtual Channel (VC) connection.

PAD (Packet Assembler and Disassembler)

PAP (Password Authentication Protocol)

Parity Bit

PBX (Private Branch Exchange) PC (Protocol Control)

PCI (Protocol Control Information) PCR (Peak Cell Rate)

PDU (Protocol Data Unit)

Message of a given protocol comprising payload and protocol-specific control information, typically contained in header. Passes over protocol interfaces that exist between layers of protocols (per OSI model). PHY (Physical layer) Layer 1 of the Open System Interconnection (OSI) model. Layer 1 is concerned with electrical, mechanical and handshaking procedures over the interface connecting a device to the transmission medium. In Asynchronous Transfer Mode (ATM), Layer 1 is the bottom layer of the ATM protocol reference model and is subdivided into two sub-layers: Transmission Convergence (TC) and Physical Medium (PM). It provides ATM cell transmission over the physical interfaces that interconnect the ATM devices. Physical Address Address identifying a single node. Physical Layer See PHY. Physical Layer (PHY) Association established by PHY between two Connection or more ATM entities. Consists of concatenation of PHY links to provide endto-end transfer capability to PHY SAPs. PLCP (Physical Layer Defined by the IEEE 802.6 and used for DS3 Convergence Protocol) transmission of ATM. ATM cells are encapsulated in 125microsecond frame defined by PLCP, which is defined inside DS3 M-frame. PLL (Phase Lock Loop) Mechanism that transfers timing information within data stream and receiver derives signal element timing by locking its local clock source to received timing information. PM (Physical Medium) Actual physical interfaces, including STS-1, STS-3c, STS-12c, STM-1, STM-4, DS1, E1, DS2, E3, DS3, E4, FDDI-based, Fiber Channel-based, and STP. Range in speeds from 1.544 through 622.08 Mbps. PMD (Physical Media Sublayer that defines parameters at lowest Dependent) level, such as speed of bits on media. PNNI (Private The inter-switch interface within a private Network-Network Asynchronous Transfer Mode (ATM) domain. Interface) The PNNI trunking protocol provides hierarchical ATM-layer routing and Quality of Service (QoS) support. PNNI Protocol Entity Body of software in switching system that executes PNNI protocol and provides routing service. PNNI Routing Control VCCs used for exchange of PNNI routing Channel protocol messages. PNNI Routing Domain Group of topologically contiguous systems running one instance of PNNI routing. PNNI Routing Hierarchy of peer groups used for PNNI Hierarchy routing. PNNI Topology State Collection of PNNI information flooded Element among all logical nodes within peer group. PNNI Topology State Type of PNNI Routing packet used for

Packet POP (Point Of Presence)

POTS (Plain Old Telephone Service)

PPP (Point-to-Point Protocol)

Presentation Layer

PRI (Primary Rate Interface)


Protocol Control Information


Proxy ARP

PSTN (Public Switched Telephone Network)

PTI (Payload Type Identifier)

flooding PTSEs among logical nodes within peer group. A site where a collection of telecommunications equipment (usually digital leased lines and multi-protocol routers) exists. Only name recognized around world for basic analog telephone service. Takes lowest 4kHz of bandwidth on twisted pair wiring. Any service sharing line with POTS must use frequencies above POTS or convert POTS to digital and interleave with other data signals. Provides a standard means of encapsulating data packets sent over a single-channel Wide Area Network (WAN) link. PPP is the standard WAN encapsulation protocol for the interoperability of bridges and routers over synchronous or asynchronous circuits. The Open System Interconnection (OSI) layer that determines how application information is represented or encoded while in transit between two end systems. An ISDN interface providing 23 “B” channels, each operating at 64 kbps, and single “D” channel also operating at 64 kbps to customer’s premises. A formal set of conventions governing the formatting and relative timing of message exchange between two communicating systems. Information exchanged between corresponding entities, using lower layer connection, to coordinate their joint operation. Software agent that acts on behalf of user. Generally accepts connection from user, makes decision whether or not user or client IP address is permitted to use proxy, may perform additional authentication, and completes connection on behalf of user to remote destination. The technique in which one machine, usually a router, answers Address Resolution Protocol (ARP) requests intended for another machine. By “faking” its identity, the router accepts responsibility for routing packets to the “real” destination. Proxy ARP allows a site to use a single Internet Protocol (IP) address with two physical networks. The telecommunications network commonly accessed by standard telephones, key systems, Private Branch Exchange (PBX) trunks and data equipment. A 3-bit field within the Asynchronous Transfer Mode (ATM) cell header indicating:

PVC (Permanent Virtual Connection) PVP (Permanent Virtual Path) Q QoS (Quality of Service)

the ATM Adaptation Layer (AAL) used; whether a congestion has been experienced (EFCI); and whether or not the cell contains Operation Administration And Maintenance (OAM) information. When an AAL5 frame passes through Segmentation And Reassembly (SAR), the PTI within the last cell identifies the end of this AAL5 frame. A permanent, virtual connection established by the network management between an origin and a destination. A set of Permanent Virtual Channels (PVCs) that exist between two cross points.

QoS Class 0 QoS Class 1

QoS Class 2

QoS Class 3

QoS Class 4

QoS Class X

A group of service classes that define the performance of a given circuit. For an Asynchronous Transfer Mode (ATM), there are a number of different QoS parameters. Refers to the best-effort service Undefined Bit Rate (UBR). Specifies the parameters for circuit emulation and the transport of Constant Bit Rate (CBR) uncompressed video. ATM adaptation layer type 1 (AAL1) supports this kind of delay-sensitive connection-oriented service. Specifies the parameters for the transport of Variable Bit Rate (VBR) audio and video. ATM adaptation layer type 2 (AAL2) supports this kind of delay-sensitive connectionoriented service. Specifies the parameters for connection oriented data transfer. ATM adaptation layer type 3 and 4 (AAL3/4) and AAL5 support this delay-tolerant class that is intended to provide interoperability with SMDS and Internet Protocol (IP). Specifies the parameters for connectionless data transfer. ATM adaptation layer type 3 and 4 (AAL3/4) or AAL5 can be used to support this delay-tolerant class that is also intended to provide inter-operability with SMDS and Internet Protocol (IP). Refers to the connection-oriented transport service in which the traffic type (Constant Bit Rate or Variable Bit Rate and timing requirements (delay sensitive or nonsensitive) are defined by the user. QoS Class X is known as an unrestricted service class that is supported by ATM adaptation layer type 5 (AAL5).


RADSL (Rate Adaptive ADSL)

Version of ADSL where modems test line at start up and adapt their operating speed to maximum line can handle. RAM (Random Access Computer’s direct access memory that can Memory) be accessed very quickly and overwritten with new information. Loses its content when power is turned off. RD (Routing Domain) Group of topologically contiguous systems running one instance of routing. Remote Access Access to network resources not located on same physical Ethernet (entire site network topology). Remote Control Form of remote access where device dialing in assumes control of another network node. All remote keystrokes translated into keystrokes on network node. Used primarily with IPX protocol. Remote Node Form of remote access where device dialing in acts as peer on target network. Used with IP and IPX protocols. Repeater A device that automatically amplifies, restores, or reshapes signals before retransmission to compensate for distortion and/or attenuation. RFC (Request for Documents written by the research and Comments) development community to describe Internet protocols and standards submitted to the Internet Engineering Task Force (IETF) for review. All Internet standards are written as RFCs. RIP2 (Routing Used to discover agents and the routes that Information Protocol) Internet Protocol (IP) packets must traverse. This is done automatically using periodic broadcasts. RIP2 also supports IP subnets. RISC (Reduced Computer processing technology in which Instruction Set microprocessor understands few simple Computing) instructions, providing fast, predictable instruction flow. Rlogin Application that provides terminal interface between UNIX hosts using TCP/IP network protocol. Unlike Telnet, assumes remote host is (or behaves like) UNIX machine. RM-Remote Monitoring A management information base that RMON (Remote enables a network monitoring device to be Monitoring) configured and read from remote locations. ROM (Read-only Memory device that retains its information Memory) even when power is off. ROM version of network device does not need to download as contains entire executable code, so never needs to reload it. Frequently provided as "flash ROM", which can be reprogrammed by downloading if user chooses. Route Server Physical device that runs one or more network layer routing protocols and uses route query protocol to provide network layer routing forwarding descriptions to


Routing Computation

Routing Constraint Routing Protocol

RSVP (Resource reSerVation Protocol)

clients. An interconnection device that connects individual Local Area Networks (LANs). Unlike bridges, which logically connect at Open System Interconnection (OSI) Layer 2, routers provide logical paths at OSI Layer 3. Like bridges, remote sites can be connected using routers over dedicated or switched lines to create Wide Area Networks (WANs). Process of applying mathematical algorithm to topology database to compute routes. Many types may be used. For example, Djikstra algorithm. Generic term that refers to topology constraint or path constraint. General term indicating protocol run between routers and/or route servers to exchange information used to allow computation of routes. Result is one or more forwarding descriptions. A protocol developed for supporting different quality of service (QoS) classes for Internet Protocol (IP) applications.

S S/Key Freely available authentication system, developed at Bellcore (based on paper by Leslie Lamport of DEC) that avoids many types of password attacks. Emerging standard for secure firewall-tofirewall communication. Address from which the message or data originated. Resides between the ATM layer and the Q.2931 function and provides reliable transport of Q.2931 messages between Q.2931 entities (e.g., ATM switch and host) over ATM layer and two sublayers: common part and service-specific part. Remote SAP used when application initiates an outgoing call to remote ATM device to specify ATM address of remote device and provide further addressing that identifies target software entity within remote device. Local SAP used when application prepares to respond to incoming calls from remote ATM devices to specify ATM address of device housing application and provide further addressing that identifies the application within local device. Several groups of SAPs are specified as valid for Native ATM Services. Service Advertisement Protocol Segments the information frames into cells at the source and reassembles these cells

S/WAN SA (Source Address) SAAL (Signaling ATM Adaption Layer)

SAP (Service Access Point)

SAP SAR (Segmentation and Reassembly)

back into information frames at the destination. These activities occur at the lower part of the ATM Adaptation Layer (AAL). Each AAL type has its own SAR format. SCAI (Switch-toProtocol that allows subscriber’s computer to Computer Applications interact with digital switch, making it Interface) possible to coordinate information in database with incoming and outgoing phone calls to allow, for example, company representative to receive customer call and simultaneously receive customer's file for viewing on desktop workstation. SCCP (Signaling SS7 protocol that provides additional Connection and functions to Message Transfer Part (MTP). Control Part) Typically supports Transaction Capabilities Application Part (TCAP). SCR (Sustainable Cell A traffic parameter that characterizes a Rate) bursty source and specifies the max-imum average rate at which cells can be sent over a given Virtual Channel (VC) connection. It can be defined as the ratio of the Maximum Burst Size (MBS) to the minimum burst inter-arrival time. Screened Host Host on a network behind screening router. Degree of access to screened host depends on screening rules in router. Screened Subnet Subnet behind screening router. Degree of access to subnet depends on screening rules in router. Screening Router Router configured to permit or deny traffic based on set of permission rules installed by administrator. SDH (Synchronous The European standard for using optical Data Hierarchy) media as the physical transport for highspeed, long-haul networks. SDH (Synchronous ITU-TSS International standard, similar to Digital Hierarchy) SONET, for transmitting information over optical fiber. SDSL (Symmetric HDSL plus POTS over single telephone line. Digital Subscriber Name has not been adopted by standards Line) group, but is being discussed by ETSI. Operates over POTS and would be suitable for symmetric services to premises of individual customers. SE (Switching Device or network node that performs ATM Element) switching functions based on VPI or VPI/VCI pair. Secure virtual private Secure private network using unsecured network (secure VPN) public networks as carriers. Users may use their network as though it were perfectly secure, isolated LAN, even though it is connected to unsecured public networks. Segment Single ATM link or group of interconnected ATM links of ATM connection. Server Computer that provides resources to be

shared on network, such as files (file server) or terminals (terminal server). Session stealing See IP splicing. Shared Ethernet Ethernet configuration in which number of segments are bound together in single collision domain. Hubs produce this type of configuration where only one node can transmit at a time. SLIP (Serial Link An Internet protocol for host dial-up Internet Protocol) connection. SLIP frames are encapsulated Internet protocol (IP) datagrams in which SLIP adds just a few bytes of control data. SMDS (Switched Public, wide-area packet-switched data Multimegabit Data service developed by Bellcore that provides Service) DS-1 to DS-3 switched access. SMTP (Simple Mail A protocol, defined in STD 10, Request for Transfer Protocol) Comments (RFC) 821, used to transfer electronic mail between computers. It is a server-to-server protocol, so other protocols are used to access the messages. SNMP (Simple The network management protocol of the Network Management Transmission Control Protocol/Internet Protocol) Protocol (TCP/IP) suite. SONET (Synchronous A standard for using optical media as the Optical Network) physical transport for high-speed, long-haul networks. SONET basic speeds start at 51.84 Mbps and go up to 2.5 Gbps. Source MAC Address Six-octet value uniquely identifying end point sent in IEEE LAN frame header to indicate source of frame. SS7 (Signaling System A signaling method separate from the voice 7) or data channel that lets intelligent network elements exchange information among themselves. Store and Forward Technique for examining incoming packets on Ethernet switch or bridge where whole packet is read before forwarding or filtering. Slightly slower process than cut-through, but ensures that all bad or misaligned packets are eliminated from network by switching device. STP (Shielded Twisted General term for shielded cabling systems Pairs) that are designed specifically for data transmission. Also means Spanning Tree Protocol, a routing protocol that eliminates routing loops in a network. STS-1 (Synchronous SONET standard for transmission over OC-1 Transport Signal 1) optical fiber at 51.84 Mbps. STS-n (Synchronous SONET standards for transmission over OC-n Transport Signal “n”) optical fiber by multiplexing “n” (integer) STS-1 frames (e.g., STS-3 at 155.52 Mbps, STS-12 at 622.08 Mbps, and STS-48 at 2.488 Gbps). STS-nc (Synchronous SONET standards for transmission over OC-n Transport Signal “n” optical fiber by multiplexing “n” (integer) concatenated) STS-1 frames (e.g., STS-3 at 155.52 Mbps,


SVC (Switched Virtual Circuit)


Synchronous Transmission

STS-12 at 622.08 Mbps, and STS-48 at 2.488 Gbps but treating information fields as single concatenated payload). A portion of a network, which may be a physically independent network segment, which shares a network address with other portions of the network. It is distinguished by a subnet number. A logical connection between two points that is established dynamically and exists during transmission only. In Asynchronous Transfer Mode (ATM) networks, the Switched Virtual Circuit (SVC) connection is established via signaling. End systems transmit their User Network Interface (UNI) 3.1 or 4.0 signaling request via the Q.2931 signaling protocol. Multiport Ethernet device designed to increase network performance by allowing only essential traffic on attached individual Ethernet segments. Packets are filtered or forwarded based upon their source and destination addresses. Transmission in which data bits are sent at a fixed rate, with the transmitter and receiver synchronized.

T A digital transmission link with a capacity of 1.544 Mbps used in North America. Typically channeled into 24 digital subscriber level zeros (DS0s), each capable of carrying a single voice conversation or data stream. T1 uses two pairs of twisted pair wires. T1E1 ANSI standards sub-committee dealing with Network Interfaces. T1M1 ANSI standards sub-committee dealing with Inter-Network Operations, Administration and Maintenance. T1Q1 ANSI standards sub-committee dealing with performance. T1S1 ANSI standards sub-committee dealing with services, architecture, and signaling. T1X1 ANSI standards sub-committee dealing with digital hierarchy and synchronization. T3 A digital transmission link with a capacity of 45 Mbps, or 28 T1 lines. TCP (Transmission An Internet standard transport layer Control Protocol) protocol defined in STD 7, Request for Comments (RFC) 793. It is connectionoriented and stream-oriented, as opposed to User Datagram Protocol (UDP). TCP (Test Coordination Set of rules to coordinate test process Procedure) between lower tester and upper tester. Enables lower tester to control operation of upper tester. May, or may not, be specified T1

TCP/IP (Transmission Control Protocol/Internet Protocol) TDM (Time Division Multiplexer)

TE (Terminal Equipment) Telnet

TFTP (Trivial File Transfer Protocol)

Thickwire Thinwire Throughput TIA Token Ring

TP-MIC (Twisted-Pair Media Interface Connector) Traffic Policing

in abstract test suite. Also known as the Internet protocol suite. This suite of protocols is used on the Internet, often for heterogeneous internetworking. A device that divides the time available on its composite link among its channels, usually interleaving bits (Bit TDM) or characters (Character TDM) of data from each terminal. Endpoint of ATM connection(s) and termination of various protocols within connection(s). The virtual terminal protocol in the Internet suite of protocols. It lets users on one host use the Internet to access and work as terminal users of a remote host. A simplified version of the file transfer protocol that transfers files but does not provide password protection or user directory capability. Half-inch diameter coax cable. Thin coaxial cable similar to that used for television/video hookups. Rate of data transmitted between two points in given amount of time (e.g., 10 Mbps). Telecommunication Industry Association Developed by IBM, this 4 or 16 Mbps network uses ring topology and tokenpassing access method. Connector jack at end user or network equipment that receives twisted pair plug. Mechanism whereby any traffic that violates the traffic contract agreed to at connection setup is detected and discarded. A method of smoothing bursty traffic in order to present a more uniform traffic rate to the network. Protocol that provides reliable transmission of packets over IP. A field in the Internet Protocol (IP) header that indicates how long this packet should be allowed to survive before being discarded. It is primarily used as a hop count. Refers to the encapsulation of protocol A within protocol B, such that A treats B as though it were a data link layer. Router or system capable of routing traffic by encrypting it and encapsulating it for transmission across untrusted network, for eventual de-encapsulation and decryption. Inexpensive, multiple-conductor cable comprised of one or more pairs of 18 to 24gauge copper strands twisted to improve

Traffic Shaping

Transmission Control Protocol TTL (Time to Live)


Tunneling Router

Twisted-Pair Cable

protection against electromagnetic and radio frequency interference. May be either shielded or unshielded. Because of narrow bandwidth, used in low-speed communications, as telephone cable only. U UBR (Undefined Bit Rate) UDP (User Datagram Protocol) An economical class of Quality of Service (QoS) on a moment-to-moment basis, without guaranteeing service levels. A connectionless transport protocol without any guarantee of packet sequence or delivery. UDP functions directly on top of Internet Protocol (IP). The interface, defined as a set of protocols and traffic characteristics, between the CPE and the Asynchronous Transfer Mode (ATM) network. This UNI specification refers to signaling issues in Available Bit Rate (ABR), Virtual Path (VP) and Quality of Service (QoS) negotiations. Connectivity from border node to upnode. Border node’s outside neighbor in common peer group. Must be neighboring peer of one of border node’s ancestors. Representation in ISO/IEC 9646 of means of providing, during test execution, control and observation of upper service boundary of IUT, as defined by chosen Abstract Test Method. An interface to provide connectivity at the Physical Layer (PHY) level among Asynchronous Transfer Mode (ATM) entities. General term for all cabling systems that are not shielded and are used for transmission of data.

UNI (User Network Interface)

UNI 4.0

Uplink Upnode

UT (Upper Tester)

UTOPIA (Universal Test and Operation Physical Interface for ATM) UTP (Unshielded Twisted Pair)

V V.34 Modem V.80 International standard for 28.8 kbps modem connections. International standard for “video phone ready” V.34 modems that defines how video phone software runs on V.80 modems. International standard for 56 kbps modem connections. Same as VDSL or subset of VDSL, if VDSL includes symmetric mode transmission. Traffic containing bursts but centered around an average bandwidth. One of the VBR service types for transmitting traffic where timing information

V.90 VADSL (Very high speed ADSL) VBR (Variable Bit Rate) VBR-NRT (Variable Bit Rate Non Real Time)

VBR-RT (Variable Bit Rate Real Time)

VC (Virtual Channel)

VCI (Virtual Channel Identifier)

VDSL (Very high data rate Digital Subscriber Line) Virtual Circuit


VLAN (Virtual Local Area Network)

VP (Virtual Path)

VPI (Virtual Path Identifier) VPN (Virtual Private Network)

is not critical. Since this service type is delay-tolerant, it is well suited for bursty traffic such as data communications. One of the two VBR service types for transmitting traffic that depends on timing and control information. It is suitable for carrying delay-sensitive traffic such as packeted video and audio. A connection established between end users, in which packets are forwarded along the same path and bandwidth is not permanently allocated until it is used. A 16-bit value in the asynchronous transfer mode (ATM) cell header that provides a unique identifier for the Virtual Channel (VC) within a Virtual Path (VP) that carries that particular cell. Modem for twisted-pair access operating at data rates from 12.9 to 52.8 Mbps, with corresponding maximum reach ranging from 4500 to 1000 feet of 24-gauge twisted pair. A network service that provides connectionoriented service regardless of the underlying network structure. Self-replicating code segment. Viruses may or may not contain payloads, attack programs, or trapdoors. A network architecture that allows geographically distributed users to communicate as if they were on a single physical Local Area Network (LAN) by sharing a single broadcast and multicast domain. Asynchronous Transfer Mode (ATM) forum LAN emulation supports virtual Local Area Networks (VLANs). A term to describe a set of Virtual Channels (VCs) between cross points, grouped together. An 8-bit value in the cell header that identifies the VP and accordingly the virtual channel to which the cell belongs. Public network service in which a customer is provided a network that appears as though it were a private network. The advantage of VPNs over the dedicated private networks is that the VPNs allow a dynamic use of the network resources and offer very reliable, high-speed and less expensive communications.

W WAN (Wide Area Network) Workgroup Switching A network that typically spans nationwide distances and usually utilizes public telephone networks. Configuration in which number of users are

connected to Ethernet network via switch that allows each user to get greater throughput than would be available through hub. X-Y-Z X.25 Gateway Access Protocol Allows node not directly connected to public data network to access facilities of that network through intermediary gateway node. Protocol standard governing packetswitched networks.

Shared By: