Equalization _amp; Clock Recovery for a 2.5-10

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Equalization _amp; Clock Recovery for a 2.5-10 Powered By Docstoc
					Equalization & Clock Recovery for
a 2.5-10 Gb/s 2PAM/4PAM
Backplane Transceiver Cell



May 2, 2003
Fred Chen
Sr. Member of Technical Staff
Rambus Inc.
   Agenda
   •   The Backplane Environment
   •   PAM2 vs. PAM4 signaling
   •   Link Design
   •   Simulation & Measured Results
   •   Conclusions




UC Berkeley BWRC Seminar
    The Backplane Environment
                                                        Package



                                         On-chip parasitic
            Line card                    (termination resistance
            trace                        and device loading
                                         capacitance)

                                     Back plane connector
                                                                   Line card via
                  Back plane trace




                    Backplane via

• There are many sources of Z and thus many possible sources of
  reflections
    • Board Material Loss
    • Counter Bored Backplane Vias
 UC Berkeley BWRC Seminar
   Backplane Component Effects



                                                 PCB only




                                                 PCB + Connectors



                   Device parasitics alone can
                  cause add’l 5dB loss at high
                          frequencies            PCB, Connectors,
                                                 Via stubs & Devices




UC Berkeley BWRC Seminar
      Variations Within a Backplane  FR4 26"


      100%
             0.0   0.5   1.0   1.5     2.0     2.5   3.0   3.5   4.0   4.5    5.0




                                                                             • Four channels from
      10%
                                                                               a single FR4
                                                                               backplane
S21




                                                                             • There are large
       1%
                                                                               variations between
                                                                               channels

       0%
                               Nyquist Frequency (GHz)

  UC Berkeley BWRC Seminar
   Single Bit Response
                                Equalized & Unequalized Single Bit Response
                                                0.08

                 0.9                            0.06
                                                            •Iimpact of reflections
                 0.8                            0.04        increases when relative
                 0.7
                                                0.02        to equalized eye
                                                   0
                                                            •Wworst-case sequence

                                            V
                 0.6

                 0.5
                                                -0.02
                                                            can sum all reflections
                                                -0.04
             V




                 0.4                            -0.06


                 0.3                            -0.08
                                                        0            1   2   3            4   5        6
                                                                                 ns                        -9
                                                                                                       x 10
                 0.2

                 0.1

                   0

                 -0.1
                        0   1           2                   3            4            5       6
                                                                ns                                -9
                                                                                              x 10
UC Berkeley BWRC Seminar
   Reflection Sources
                      TX                                                                                                                                                 RX
                     DATA                                                                                                                                               DATA


                                                            AT

                                                            AR

                                                            B

                                                            CT

                                                            CR

                                                            D

                                                                 gh-gh conn. (baseline) : Normalized Raw and eq pulse response: PR length after
                                                                                                     main 60
                                               10



                                                 8


                                                             A   T,                                                                               C   T,
                                                                                                                                                      T,R    D
                                                 6               T,R                                                                                  R
                                                                 R
                                                 4
                                                                            A2         T,
                                                                                       T,R                                           B
                                                                                       R
                                                 2
                      % of the received main




                                                 0



                                                -2



                                                -4



                                                -6
                                                        T
                                                -8




   • Primary reflection sources are at the     -10
                                                  500                                     1000                                                        1500       2000




     connector/backplane transition
         • Grouped in time – as a function of backplane length
UC Berkeley BWRC Seminar
        Eye With Worst Case Reflections
                           0.2                        0.2

                          0.15                       0.15

                           0.1                        0.1

                          0.05                       0.05
            Voltage [V]




                             0                          0

                          -0.05                      -0.05

                           -0.1                       -0.1

                          -0.15                      -0.15

                           -0.2                       -0.2
                              -15   -10     -5   0           0   0.5         1      1.5
                                      log pdf                          sec              -10
                                        10                                       x 10
   (left) 2-PAM probability distribution function (PDF) showing the probability
   of an eye waveform for each voltage at the sample point
   (right) equalized eye with worst-case pattern. 6.4Gb/s over 20” backplane.
UC Berkeley BWRC Seminar
   Agenda
   •   The Backplane Environment
   •   PAM2 vs. PAM4 signaling
   •   Link Design
   •   Simulation & Measured Results
   •   Conclusions




UC Berkeley BWRC Seminar
  What is 4-PAM
 • Binary (NRZ) is 2-PAM                            • 4-PAM uses 4-levels to send
 • 2-PAM uses 2-levels to send                        2 bits per symbol
   one bit per symbol                               • Each level has 2 bit value
 • Signaling rate = 2 x Nyquist                     • Signaling rate = 4 x Nyquist


                                                                           00

                  0                0

                                                                           01



                                                                           11
                  1                1

                                                                           10




UC Berkeley BWRC Seminar
                     Note   : both can be either single-ended or differential
           When Does 4-PAM Make Sense?
                       Nyquist Frequency (GHz)
           0.0   1.0      2.0          3.0       4.0   5.0




 -20db
  |H(f)|




 -40db




 -60db




• First order : slope of S21
            • 3 eyes : 1 eye = 10db
            • loss > 10db/octave : 4-PAM
              should be considered
 UC Berkeley BWRC Seminar
   Agenda
   • The Backplane Environment
   • PAM2 vs. PAM4 signaling
   • Link Design
        • Equalization
        • Clocking
   • Simulation & Measured Results
   • Conclusions


UC Berkeley BWRC Seminar
   Equalization For Loss : Flatten Response



                             +


                =
     • Channel is band-limited
     • Equalization : boost high-frequencies relative
       to lower frequencies
UC Berkeley BWRC Seminar
   Transmit Linear Equalizer : SBR

                      0.7
                                                    Unequalized
                                                    Equalization Pulse
                                                    End of Line
                      0.5
        Vo lt a g e




                      0.3



                      0.1



                      -0.1



                      -0.3
                          0.0   0.3          0.6       0.9               1.2
                                      time (nsec)
UC Berkeley BWRC Seminar
   Transmit and Receive Equalization
                                           RX
                                          DATA
   TX
  DATA


                                                 TAP SEL
                                                  LOGIC
              3




   • Transmit and receive equalizers are
     combined to make a range restricted DFE
         • Tx equalizer functions as the feed-forward filter
         • Rx equalizer restricted in performance of loop

UC Berkeley BWRC Seminar
   Tx & Rx Equalization Ranges



                                      RX Equalizer
                                      5-17 taps after main
                                      Pick any 5 taps




       TX Driver/Equalizer : 5 taps
       1(pre)+1(main)+3(post)
UC Berkeley BWRC Seminar
   2-PAM/4-PAM Transmitter
     [MSB,LSB]             TP TN        00   01   11   10
                                   TN



                    A[2]           TP
                                             4-PAM

                                             00   10
       4-PAM        A[1]
                                   TN
      Encoder

                    A[0]
                                   TP
                                        2-PAM: LSB=0

 • Transmit either 2-PAM or 4-PAM using
   Gray code
UC Berkeley BWRC Seminar
   5-Tap 2P/4P Transmitter (Original)
                           TP TN

                                                      TP TN
                                                W/L
            A[2]                   A[0]
                   W/L
                                                                WA[6:0]
                                          1/z   W/L
            A[1]                   B[0]
                   W/L
                                          1/z                   W B[6:0]




                                          ...
            A[0]
                   W/L
                                          1/z
                                                W/L
                                   E[0]
                                                      WE[6:0]



  • Simple 2P/4P transmitter: Total gate = 3W/L
  • 5-Tap 2P/4P transmitter: Total gate = 15W/L
UC Berkeley BWRC Seminar
   5-Tap 2P/4P Shared Transmitter

                                                 WA[6:4]               Allocation    TP TN
                               TP TN




                                                               ...
                                                 WE [6:4]                Logic
                     W/L                                                        W/8L




                                         Driver Segments (7)
                                                               A[0]




                                                                       ...
        A[0]
                                                               E[0]




                                                                                 ...
                                                Shared
               1/z   W/L
                                                                                W/8L
        B[0]                                                   A[0]




                                                                       ...
                                                               E[0]
               1/z
                                                                                W/8L
                     WB[6:0]
               ...




                                                                       A[0]
                                         Dedicated Tap




                                                                                ...
               1/z
                                           Drivers (5)
                     W/L                                             W A[3:0]

        E[0]                                                                    W/8L
                               WE[6:0]                                  E[0]

                                                                     WE[3:0]


        Total gate = 3(5) = 15W/L        Total gate = 3(7/8+5/8) = 4.5W/L
UC Berkeley BWRC Seminar
   Receive Equalizer
                                                              Normal Rx Path

                                          Rx Data      CDR          UP/DOWN
                           Sampler
                                                                          Phase
                                                                          Mixer

                      Tap Select
                    Training           0101...
                   Sequence

                                                 ...
                            Tap Weights
                                 ...                               Calibrate
                                         ...




                                                        Variable
                                                         Delay
                             Receive
UC Berkeley BWRC Seminar
                             Equalizer
   Dual Loop PLL/DLL Design
                           ÷ 4,5

                                         Low Pass
                                           Filter
                                                      VCO          TX Clk
                           PD
        Ref Clk



            RX
           Data
                                           CDR      Phase Mixers
                                           Logic

                                RX Clk


  • Self-biased 4x or 5x RefClk Multiplier
    based on [Maneatis, Sidiropoulos, Horowitz]
  • CDR is DLL w/PLL vectors & phase mixers
  • 2X oversampling per bit (edge + data)
  • Dual loop design avoids harmonic locking
UC Berkeley BWRC Seminar
   Multi PAM clock recovery
   • Data can transition from and to any level
   • 2PAM CDR may lock to any of three strong
     timing distributions




UC Berkeley BWRC Seminar
   4-PAM Edges & CDR
                           Minor   Major
 00


 01
                                           MSB
                                           threshold
 11
                                                   LSB
                                                thresholds
 10




   • Timing errors possible if using a
     2-PAM CDR on unrestricted 4-PAM data
UC Berkeley BWRC Seminar
 2-PAM/4-PAM CDR

                      2PAM/4PAM Mode
                                                                  CDR clk
            MSB                               Early/Late
            TranDet


                          CDR
                                      Tran       Majority          Phase
                       transition
                                                  Voter            Mixer
                       selection


            LSB
            TranDet       Tran(2PAM) = MSBTran
                          Tran(4PAM) = (LSBTran * MSBTran) + (MSBTran * LSBTran)




   • 2-PAM mode - uses major transitions
   • 4-PAM mode - uses minor transitions
UC Berkeley BWRC Seminar
   Complete Link Block Diagram
                                                                                Vtt
      SysClk
                                                              TX                  TXP
                                                                                            TX
      TX Data                        Parallel to Serial       EQ
                                                                                  TXN
                                                                  Tclk

                      1/4 or 1/5                    Phase Mixer
                                      PLL
       RefClk         1 or 1/2                      Phase Mixer
                                                    Phase Mixer
                                                     Phase Mixer         Rclk               Clocking

                           Phase Control                                        Vtt

                                                                                      RXP
       RX Data                       Serial to Parallel
                                                                                      RXN
       RX Clk                                             Rclk
                                                                                            RX
                                       RX Equalizer


                  Tap Selection        Tap Weights

UC Berkeley BWRC Seminar
   Agenda
   •   The Backplane Environment
   •   PAM2 vs. PAM4 signaling
   •   Link Design
   •   Simulation & Measured Results
   •   Conclusions




UC Berkeley BWRC Seminar
   Measured PLL (+TX) Jitter
                                                      3.0



                                                      2.5




                                   RMS Jitter [%UI]
                                                      2.0



                                                      1.5



                                                      1.0



                                                      0.5

2.3psec rms; 18psec p-p @ 3.2GHz
                                                      0.0
   (6.4Gbps @ 2P, 12.8Gbps @ 4P)
                                                            0     1      2     3      4

                                                                PLL frequency [GHz]
  Includes on-chip noise
UC Berkeley BWRC Seminar
        Measured 4-PAM CDR Performance

Phase
                              • 2-PAM CDR on
                                4-PAM data
                                 • 60ps p-p @ 8Gb/s



                              • 4-PAM CDR uses
Phase                           only minor
                                transitions
                              • Lower dither jitter
                      Cycle
                                • 35ps p-p @ 8Gb/s
  UC Berkeley BWRC Seminar
             System Level Simulink Model




UC Berkeley BWRC Seminar
UC Berkeley BWRC Seminar
        TX Equalization Effectiveness
                     No EQ                                 w/TX EQ
  Un-folded: 10*T
  Folded




UC Berkeley BWRC Seminar     20” of FR4 & two connectors
   2-PAM eye with no equalization at
   6.4Gb/s over 20” BP




UC Berkeley BWRC Seminar
   2-PAM eye with Tx equalization at
   6.4Gb/s over 20” BP




UC Berkeley BWRC Seminar
   10G Eyes & System Margin Shmoos




   • 3”/20”/3” = 26” Trace + 2 Connectors
   • Tested to BER < 10-15
UC Berkeley BWRC Seminar
   Data Level Distribution With No
   Receive Equalization
                                0.2                        0.2

                               0.15                       0.15

                                0.1                        0.1

                               0.05                       0.05
                 Voltage [V]




                                  0                          0

                               -0.05                      -0.05

                                -0.1                       -0.1

                               -0.15                      -0.15

                                -0.2                       -0.2
                                   -15   -10     -5   0           0    1             2
                                           log pdf                    sec          -10
                                             10                             x 10
            (left) 4-PAM PDF showing broad distributions and
            (right) eye including worst-case transitions at 10Gb/s over a
            20” backplane.
UC Berkeley BWRC Seminar
   Data Level Distribution With Receive
   Equalization
                                 0.2                        0.2

                                0.15                       0.15

                                 0.1                        0.1

                                0.05                       0.05
                  Voltage [V]




                                   0                          0

                                -0.05                      -0.05

                                 -0.1                       -0.1

                                -0.15                      -0.15

                                 -0.2                       -0.2
                                    -15   -10     -5   0           0    1             2
                                            log pdf                    sec          -10
                                              10                             x 10

       (left) 4-PAM PDF showing narrowed distributions and (right) eye
       including worst-case transitions showing improvement of both
       distributions and eyes. 10Gb/s over 20” BP
UC Berkeley BWRC Seminar
   RX Equalization Effectiveness
                 No RX Eq                         With RX Eq




   • Measured system margin with device shmoo
     shows large improvement with RX Eq

UC Berkeley BWRC Seminar    20” of FR4 & two connectors
   Agenda
   •   The Backplane Environment
   •   PAM2 (NRZ) vs. PAM4 signaling
   •   Link Design
   •   Simulation & Measured Results
   •   Conclusions




UC Berkeley BWRC Seminar
   Prototype System Evaluation




   • Constructed line cards with commercially available and next
     generation connectors
   • A complete matrix of backplanes was constructed
        • 5 connectors X 3 materials
        • Counterbored/Non-Counterbored vias
   • System components (packages, vias, connectors, traces, etc.)
     were individually measured to construct complete channel
     models
UC Berkeley BWRC Seminar
 2P/4P Performance by Configuration
                             2-PAM (NRZ) Maximum Performance (Gbps)

    12

    10

     8
                                                                                                   Configuration
     6                                                                                             Space
     4

     2
                                                                                                    5 Different
     0
                                                                                                   connectors
           Top     Bottom      Top       Bottom       Top       Bottom        Top       Bottom

           20"       20"
                              4-PAM Maximum Performance (Gbps)
                               10"         10"        20"         20"         10"         10"       2 Different
    12   FR4NoCB   FR4NoCB   FR4NoCB    FR4NoCB    Nelco6kCB   Nelco6kCB   Nelco6kCB   Nelco6kCB
                                                                                                   dielectrics
            0         1         2          3           4           5           6           7
    10

     8                                                                                              2 Different via
     6                                                                                             types
     4

     2
                                                                                                    2 Different Trace
     0                                                                                             lengths
           Top      Bottom     Top       Bottom       Top       Bottom        Top       Bottom

           20"       20"       10"        10"         20"         20"         10"         10"       Top & Bottom
         FR4NoCB   FR4NoCB   FR4NoCB    FR4NoCB    Nelco6kCB   Nelco6kCB   Nelco6kCB   Nelco6kCB

            0         1         2          3           4           5           6           7
                                                                                                   Layers

UC Berkeley BWRC Seminar
   Summary & Conclusions
                  TX   PLL           Process       0.13m CMOS
                                     Power         40mW / Gb

                             RX
                                     Area          1mm2
                                     2-PAM Range   2 – 6.4 Gb/s
                                     4-PAM Range   4 – 10 Gb/s

    • Backplane Environment is very challenging
         •   Frequency dependent dielectric and skin loss
         •   Many variations between channels
         •   Reflection locations in time vary with length and Nyquist
         •   Does not scale due to increasing need for complexity
    • With the right silicon approaches copper
      backplanes can run at 10Gb/s

UC Berkeley BWRC Seminar

				
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