# JFET by anil.gorantala

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```									                     Adam’s Engineering College, Paloncha
ECE Department – ECA LAB

Experiment No.: 1          Year : II/IV B.Tech I Semester   Page 1 of 9

JFET CHARACTERISTICS

Aim :- To draw drain characteristics and transfer characteristics of N-
Channel JFET

Apparatus :-
1)   FET Characteristics circuit Arrangement
2)   12V Power Supply.
3)   0-15V Voltmeter.
4)   0-10V Voltmeter.
5)   0-20mA Ammeter.

Circuit Diagram:

Theory :-

FET is a semiconductor device which depends for its operation
on the control of current by an electric field. The FET differs Bipolar
Transistor in the following important characteristics.

1.    Its operation depends on the flow of majority carriers only
hence it is Uni-Polar device.

Lab in-charge                                                 HOD, ECE
ECE Department – ECA LAB

Experiment No.: 1          Year : II/IV B.Tech I Semester       Page 2 of 9
2.   It is simple to fabricate and occupies less space in integrated
form.
3.   It exhibits a high input resistance.
4.   It is less noisy than Bipolar Transistor.
5.   It exhibits no Off-set Voltage at Zero drain current and hence
makes an excellent signal chopper.

The Symbol for N-channel and P-channel JFET’s are as follows

n-channel FET                                 p-channel FET

The following are the important parameters of common source
configuration.

1)    Drain Resistance (rd) = Vds/Id                 When Vgs is constant.
2)    Transconductance (gm) = Id/Vgs                 When Vds is constant.
3)    Amplification Factor (µ)=rd*gm                 When Id is constant.

Procedure :-

DRAIN CHARACTERISTICS:-

1.   Connections are made as per the circuit diagram
2.   To draw drain characteristics, keep Vgs=0V and vary Vdd from 0
to 12V in steps of 1V and note down the corresponding values
of Id.
3.    Vary the values of Vgs from -1V to -4V insteps of 1V and repeat
the above procedure.
4.   From the above readings draw the drain characteristics between
Id and Vds.

Lab in-charge                                                     HOD, ECE
ECE Department – ECA LAB

Experiment No.: 1          Year : II/IV B.Tech I Semester   Page 3 of 9

TRANSFER CHARACTERISTICS:-
1. Connections are made as per the circuit diagram.
2. Apply Vdd=10V and vary Vgs from 0 to -5V in steps of 0.1V and
note down the Id.
3. From the above draw the transfer characteristics.

RESULT:-

The drain characteristics and transfer characteristics of N-
channel JFET are obtained.

Lab in-charge                                                 HOD, ECE
ECE Department – ECA LAB

Experiment No.: 1          Year : II/IV B.Tech I Semester   Page 4 of 9

PROGRAM :-

DRAIN CHARACTERISTICS:-

Vgs 1        0  DC 0V
Vx 3        2   DC 0V
Vdd 3       0   DC 12V
J1   2      1   0   JMOD
.MODEL      JMOD NJF (Is=100e-14 Rd-10 Rs=10 BETA=1e-3
VTO=-5v)
.DC Vdd     0        12V .2 Vgs         0     -4     1
.PLOT       DC       I(VX)
.PROBE
.END

TRANSFER CHARACTERISTICS:-

Vgs 1        0  DC 0V
Vx 3        2   DC 0V
Vdd 3       0   DC 10V
J1   2      1   0   JMOD
.MODEL      JMOD NJF (Is=100e-14 Rd-10 Rs=10 BETA=1e-3
VTO=-5v)
.DC Vgs     0        -5    .1
.PLOT       DC       I(VX)
.PROBE
.END

Lab in-charge                                                 HOD, ECE
ECE Department – ECA LAB

Experiment No.: 1          Year : II/IV B.Tech I Semester    Page 5 of 9

JFET AMPLIFIER

Aim:- To study the frequency response of n-channel JFET amplifier
and to calculate bandwidth.
Apparatus:-

1.   FET Amplifier kit
2.   Function Generator
3.   CRO
4.   Probes and connecting wires.

Circuit Diagram:

Theory:-

FET is a semiconductor device which depends for its operation on the
control of current by an electric field. The FET differs Bipolar
transistor in the following important characteristics.

1.   Its operation depends on the flow of majority carriers only
hence it is Uni-Polar device.
2.   It is simple to frabricate and occupies less space in integrated
form.

Lab in-charge                                                  HOD, ECE
ECE Department – ECA LAB

Experiment No.: 1          Year : II/IV B.Tech I Semester     Page 6 of 9

3.   It exhibits a high input resistance because gate to source is
reverse biased.
4.   It is less noisy than Bipolar Transistor.
5.   It exhibits no Off-set Voltage at Zero drain current and hence
makes an excellent signal chopper.

The Symbol for N-channel and P-channel JFET’s are as follows

n-channel FET                                 p-channel FET

The structure of an N=channel FET is ohmic contacts are made to the
two ends of a semiconductor bar of n-type material. Current is caused
to flow along the length of the bar because of the voltage supply
connected between the ends.

By giving proper biasing conditions FET can be used as an amplifier.
These considerations are output voltage swing, distortion, power
dissipation, voltage gain and drift. In this circuit, it uses Rg to give
proper biasing voltage to the gate of the GFET to operate in faithful
amplification state. R3 limits the drain current and C3 forms bypass
capacitor and voltage gain depends on R4, C3 and R3 values.

Procedure:-

1.   Connections are made as per the circuit diagram.
2.   Feed a sine wave of 0.5V amplitude at 1 KHz from a signal
generator to the input terminals of the amplifier.
3.   Measure the output voltage and calculate gain.
Gain=V0/Vin

Lab in-charge                                                   HOD, ECE
ECE Department – ECA LAB

Experiment No.: 1          Year : II/IV B.Tech I Semester   Page 7 of 9

1) Keep amplitude constant and vary frequency from 10Hz to
1MHz and note down the output voltage and calculate gain.
2) Draw the frequency response between frequency and voltage
gain.

Result:-

The frequency response of FET amplifier is obtained and
bandwidth is calculated.

Lab in-charge                                                 HOD, ECE
ECE Department – ECA LAB

Experiment No.: 1          Year : II/IV B.Tech I Semester   Page 8 of 9

DUAL VOLTAGE REGULATED POWER SUPPLY

Vin    1     0  AC 230 Sin(0 230 50Hz)
E1     2    0   1     0    0.07
E2     0    3   1     0    0.07
D1     2    4   1N4007
D2     3    4   1N4007
D3     5    3   1N4007
D4     5    4   1N4007
C1     4    0   470uF
C2     0    5   470uF
.MODEL 1N4007 D()
.TRAN 5us 20ms
.PROBE
.END

Lab in-charge                                                 HOD, ECE
ECE Department – ECA LAB

Experiment No.: 1          Year : II/IV B.Tech I Semester   Page 9 of 9

BUFFER AMPLIFIER

Vin     1    0   AC 0.02V Sin(0 0.02 1Hz)
C1      1    2   0.1uF
R1      3    2   1Mega
R2      2    0   1Mega
RE      4    0   2.7K
CE      4    5   10uF
Rl      5    0   10k
Q       3    2    5    BC148B
.MODEL BC148B npn( )
.TRAN 5us 1ms
.AC 100 10HZ 1Mega
.PROBE
.END

Lab in-charge                                                 HOD, ECE

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