Revision questions - Computer memory
For problem solving (numerical) type questions please consult the Cache design
exercises and solutions
1. What are the three main considerations in computer memory design? Explain why fast
performance, large capacity and low cost are conflicting requirements?
2. What is (temporal and spatial) locality of reference in a computer system? Explain how
locality of reference can be exploited to resolve the conflicting requirements of fast
performance, large capacity and low cost in memory design.
3. How is a main memory word w delivered to the CPU in a computer with a memory cache?
4. Given that it is quicker to deliver a word w to the CPU directly from main memory without
the overhead of transferring a block containing w into cache, why is the cache still used?
5. Why is main memory transferred to the cache in blocks of several words?
6. What is the role of the tag in a memory cache?
7. What is a cache mapping function? What are the three main types of cache mapping
8. Let C be the number of cache lines. Which set of cache lines is assigned to main memory
block n in a (i) fully associative (ii) direct mapped (iii) q - way set associative cache?
9. Let C be the number of cache lines. Suppose that main memory block n is transferred to a
cache line. What will the tag of the line be set to in a (i) fully associative (ii) direct mapped
(iii) q - way set associative cache?
10. Suppose that main memory capacity is M = 2 words, the block size is K = 2 words, the
number of cache lines is C = 2 . Let b31b30... b2 b1b0 be the main memory address of a word
w in 32-bit binary and let n be the number of the block containing w.
(i) How can we determine the block number n from b31b30... b2 b1b0?
(ii) If block n is stored in a line of a fully associative cache, how can we determine the tag
from b31b30... b2 b1b0?
(iii) If block n is stored in a line of a direct mapped cache, how can we determine the
number of the line and the tag form b31b30... b2 b1b0?
(iv) Suppose that block n is stored in a line of a cache set in a q - way set associative
cache. How can we determine the number of the set and the tag from b31b30... b2 b1b0 in a
2-way set associative cache.? How can we determine the number of the set and the tag
from b31b30... b2 b1b0 in a 4-way set associative cache.?
11. What are the main types of cache replacement policies? Explain briefly how each of them
works. Do all three major cache types (fully associative, direct mapped and q - way set
associative) need a replacement policy?
12. Suppose that a main memory block b is stored in the cache and later on the cache copy b*
of b is changed. In what circumstances can this cause problems and why?
13. Discuss the write-through and write-back write policies.