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CPSC 5155U - Bosworth

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					CPSC5155U - Computer Architecture                                                Fall 2011
               Undergraduate Offering (CRN 83896)
Instructor
       Dr. Edward L. Bosworth
       Center for Commerce and Technology, Room 443
       (706) 507 – 8183
       E-Mail:       bosworth_edward@ColumbusState.edu
       Homepage: http://csc.columbusstate.edu/bosworth/
Office Hours – Fall 2011
       Monday        5:30 PM –         7:30 PM                      2 hours
       Tuesday       9:00 AM – 11:00 AM
                     2:00 PM –         4:00 PM                      4 hours
       Wednesday 9:00 AM – 11:00 AM
                     2:30 PM –         4:30 PM                      4 hours
       Thursday      9:00 AM – 11:00 AM                             2 hours
       Friday        I am not in the office on Friday.
                     Contact me using e–mail.
Class Meetings:
   This has been converted to an on–line class. Please contact me for more information.
Course Prerequisites
    CPSC 2105          Introduction to Computer Organization
The student is expected to have some familiarity with Boolean algebra; two’s complement
arithmetic; basic building blocks such as AND, OR and NOT gates; and basic MSI
components such as encoders, decoders, multiplexers, demultiplexers, and full adders.
The course uses assembly language as a functional specification for a computer. The student
is expected to be able to understand assembly language statements that will be used to
illustrate the design of the computer.

Textbook
 Design and Architecture of Digital Computers: An Introduction
 Edward L. Bosworth, Ph.D. (the instructor)
 The book may be found through my CSU web site or at this web site.
 http://www.edwardbosworth.com/My5155Textbook/MyText5155_AFrontMatter.htm

Other Required Materials:
For the digital lab you will be required to use the digital logic simulator Multimedia Logic
by Softronix, Inc. Go to the web site http://www.softronix.com and select MMLogic.
Select the Startup Kit and run the setup with the default settings. It is free.




Page 1 of 8 pages                                                   Last Revised 8/6/2011
CPSC 5155 – Computer Architecture        Fall 2010                  Undergraduate Offering


Course Description
Review of Boolean algebra and simple combinational and sequential circuits. Study of
the design of the major components of a simple computer: memory, central processing
unit, and Input/Output systems. Considerable focus will be placed on the design of the
Control Unit. Other topics, including examples of real computer architectures, as time
allows. Please see the listing Topics for the Course, attached to this document.

Course Objectives (Learning Outcomes)
At the end of the course the student will be able to describe and explain the following:
    1. Design and explain simple sequential circuits, such as sequence detectors & counter.
        ABET Criteria Covered:             C
        Program Objectives Covered:        2.
   2. Describe a tri-state buffer and use it correctly in circuit design.
      ABET Criteria Covered:             C
      Program Objectives Covered:        2
   3. Design circuits using basic MSI components (Adders, Multiplexers, Demultiplexers,
      Encoders, and Decoders) as basic building blocks.
      ABET Criteria Covered:           C
      Program Objectives Covered:      2
   4. Interface a register file to the internal data busses of the CPU.
      ABET Criteria Covered:                C
      Program Objectives Covered:           2
   5. Describe the interfacing of an interleaved memory system to the CPU.
      ABET Criteria Covered:             C
      Program Objectives Covered:        2
   6. Define the terms “memory access time” and “memory cycle time”.
      ABET Criteria Covered:         C
      Program Objectives Covered:    2
   7. Describe the functioning of associative (content addressable) memory.
      ABET Criteria Covered:           C
      Program Objectives Covered:      2
   8. Describe the Instruction Set Architecture and addressing modes of a specific
      simple computer.
      ABET Criteria Covered:           C
      Program Objectives Covered:      2
   9. Describe and justify the internal bus structure of a specific sample CPU.
      ABET Criteria Covered:             C
      Program Objectives Covered:        2
   10. Design hardwired circuits for generation of control signals for existing and new
       assembly language instructions for a specific sample CPU.
       ABET Criteria Covered:           C
       Program Objectives Covered:      2



Page 2 of 8 pages                                                     Last Revised 8/6/2011
CPSC 5155 – Computer Architecture        Fall 2010                  Undergraduate Offering


   11. Design binary microcode for the microprogrammed control unit of a specific sample
       CPU. This is to be done for existing and new assembly language instructions.
       ABET Criteria Covered:           C
       Program Objectives Covered:      2
   12. Design the Arithmetic Logic Unit for a specific sample CPU.
       ABET Criteria Covered:          C
       Program Objectives Covered:     2
   13. Describe both Interrupt-Driven I/O and Direct Memory Access. Explain the
       difference between the two designs and consider the advantages of each.
       ABET Criteria Covered:           C
       Program Objectives Covered:      2
   14. Describe the interface of an I/O device to the computer system bus.
       ABET Criteria Covered:            C
       Program Objectives Covered:       2
   15. Design a hardwired interrupt handler for a multi-level interrupt system and
       show how to generate ACK (Interrupt Acknowledge) signals properly.
       ABET Criteria Covered:           C
       Program Objectives Covered:      2
Student Responsibilities
   1. Attend class regularly.
   2. Complete all reading assignments and all homework assignments.
   3. Actively participate in all class discussions.
   4. Participate in the hands-on laboratory for this course.
      The times for these laboratories will be posted.
   5. Ask the instructor questions.
Instructor Responsibilities
   1. Give lectures on the course material.
   2. Assign appropriate homework that illustrates the concepts of the course, and
       grade and return the homework in a timely manner with adequate explanation.
   3. Give tests over the material and grade and return the tests in a timely manner.
   4. Provide a website that supports the course.
   5. Provide at least four hours of office time primarily designated for assistance of
       students in this class, at times expected to be convenient for the students. It is
       expected that the instructor be available to the students during these hours.
Course Methods
  This will be based on an in-class lecture course, taught face-to-face.
   There will be a laboratory component, in which the student will use a circuit
   simulation tool to investigate a number of digital circuits.




Page 3 of 8 pages                                                    Last Revised 8/6/2011
CPSC 5155 – Computer Architecture        Fall 2010                  Undergraduate Offering


Laboratory Experience
There are two options for the lab experience. One option is to run the simulation on the
lab computers in CCT 450. Another option is to download MMLogic by Softronix, run
the experiments at home (or work). Recall that the simulator is a free download.
The lab work will be considered part of the homework and submitted as homework. Many
students have found the lab tool MMLogic to be useful in solving homework
problems, and have submitted MMLogic diagrams as answers to homework. This is OK.
Homework Policy
All homework is to be submitted through the WebCT/CougarView tool. Submissions
through the standard CougarNet e–mail system are not acceptable. Submissions in class
of “hard copy” homework written on paper are not acceptable.
Lab experiments, while assigned as homework, are to be submitted in the standard file
format produced by the logic simulation tool. If necessary, these can be ZIPped.
Other homework assignments are to be submitted as either MS–Word documents or
Adobe PDF documents. MS–Word (any variant) is preferred, as this allows me to
edit comments into your submission before returning it.
Methods for Evaluating Students
The evaluation methods will include homework, a laboratory experience, a mid-term
exam, and a final exam. The relative grading is shown below.
                   Homework          40%
                   Mid-Term Exam 30% The week of Monday, October 3.
Final Exam         30% The week of Monday, December 5.
                         Detailed exam policies will be posted soon.
Assignment of Letter Grades
The method of assigning letter grades based on overall course averages is fairly standard.
      GRADE         POINTS
         A          90 – 100                D      55 – 69
         B           80 – 89                F      Below 55
         C           70 – 79

Other Course Policies
ADA Accommodation Notice
If you have a documented disability as described by the Rehabilitation Act of 1973
(P.L. 933–112 Section 504) and the Americans with Disability Act (ADA) that may
require you to need assistance attaining accessibility to instructional content to meet
course requirements, we recommend that you contact the Center for Academic Support
in Schuster Student Success Center – Room 221, 706 – 507 – 8755, as soon as possible.
The Center for Academic Support can assist you and the instructor in formulating
a reasonable accommodation plan and provide support in developing appropriate
accommodations for your disability. Course requirements will not be waived but
accommodations may be made to assist you to meet the requirements. Technical
support may also be available to meet your specific need. For more information on
services and support available, refer to http://uc.colstate.edu/disability_services.htm.



Page 4 of 8 pages                                                     Last Revised 8/6/2011
CPSC 5155 – Computer Architecture         Fall 2010                   Undergraduate Offering


Parking
Parking is a problem at CSU; for this we apologize. It is the student’s responsibility to
arrive at class on-time and submit any homework before the beginning of class.
Attendance Policy
I do not take roll, but believe that it is important for students to attend class regularly. If
you find it necessary to miss one or more classes, you are still responsible for all material
covered in the class. You should notify me in advance of expected class absences to
avoid late penalties on homework due on the date you miss. For more information on
class attendance and withdrawal, refer to
http://aa.colstate.edu/advising/a.htm#Attendance%20Policy.
Dropping the Course
We hope that you will complete the course and profit from it. If it is necessary for you to
withdraw from the course during the semester, you must follow all official CSU
procedures for withdrawing. It is not sufficient to notify the instructor; you must use the
ISIS system and withdraw officially. NOTE: The deadline to drop courses is
Friday, September 9.

Academic dishonesty
Academic dishonesty includes, but is not limited to, activities such as cheating and
plagiarism. It is a basis for disciplinary action. Collaboration is not permitted on
assignments or exams/quizzes in this course. Any work turned in for individual credit
must be entirely the work of the student submitting the work. All work must be your
own. You may share ideas but submitting identical assignments (for example) will be
considered cheating. A simple way to avoid inadvertent plagiarism is to talk about the
assignments, but don't read each other's work or write solutions together. Keep scratch
paper and old versions of assignments until after the assignment has been graded and
returned to you. If you have any questions about this, please see me immediately.

For assignments, access to notes, textbook, books and other publications is allowed.
Stealing, giving or receiving any code, diagrams, drawings, text or designs from another
person (CSU or non-CSU) is not allowed. Having access to another person’s work on the
system or giving access to your work to another person is not allowed. It is your
responsibility to keep your work confidential, so that other students do not have access to
it without your knowledge. Properly dispose of all your scratch work.
No cheating in any form will be tolerated. The penalty for the first occurrence of
academic dishonesty is a zero grade on the assignment or exam/quiz; the penalty for the
second occurrence is a failing grade for the course. For exams/quizzes, discussion of any
kind (except with me) is not allowed.
(http://aa.colstate.edu/advising/a.htm#Academic Dishonesty/Academic Misconduct)




Page 5 of 8 pages                                                      Last Revised 8/6/2011
CPSC 5155 – Computer Architecture     Fall 2010                Undergraduate Offering


                        CPSC5155: Topics for the Course

1.   General Introduction to Computer Architecture
        Main components of a Stored Program Computer.
        Simple designs and modern elaborations that increase efficiency.
        Modern Design Principles.
        ABET Criteria Covered:           C
        Program Objectives Covered:      2
2.   The Power Wall and Modern Multicore Computers
        The undesired side effects of increased transistor density.
        Solutions to maintain performance while reducing power use.
        ABET Criteria Covered:              C
        Program Objectives Covered:         2
The next two topics are review material, covered only very lightly in class.
The student is encouraged to review this material and send e–mail to the instructor.
3.   Data Representations
        Integers: Unsigned and Two’s–Complement Signed.
        Floating point standards.
        Packed decimal arithmetic (used mostly on IBM Mainframes).
        Character codes: ASCII, EBCDIC, and Unicode.
        ABET Criteria Covered:           C
        Program Objectives Covered:      2
4.   Review of Boolean Algebra and Basic Gates
        Basic Boolean functions: AND, OR, NOT, and XOR.
        Theorems and Postulates of Boolean Algebra
        Truth Tables and Algebraic Representation of Boolean Functions
        Basic Gates: AND, OR, NOT, and XOR.
        Other Gates: NAND and NOR
        The Tri-State Buffer (not a Boolean gate) and its uses.
        CMOS implementation of the basic digital gates.
        ABET Criteria Covered:             C
        Program Objectives Covered:        2
The textbook has a chapter on minimization of Boolean functions. While your instructor
is interested in this topic, it probably will not be covered in class.
5.   Review of Some Medium Scale Integration (MSI) Circuits
        Encoders and Decoders
        Multiplexers and Demultiplexers
        The Full Adder and a Ripple-Carry Adder
        ABET Criteria Covered:            C
        Program Objectives Covered:       2




Page 6 of 8 pages                                                Last Revised 8/6/2011
CPSC 5155 – Computer Architecture      Fall 2010                Undergraduate Offering



6.    Introduction to Sequential Circuits, Including Flip-Flops and Registers
         The Basic Idea of a Synchronous Computer
         The Computer Clock as a Synchronization Mechanism
         Four Basic Flip-Flops: SR, JK, D, and T
         Registers as Collections of Flip-Flops
         Register Files and Conventions for Usage and Representation
         ABET Criteria Covered:              C
         Program Objectives Covered:         2
7.    Analysis and Design of Sequential Circuits
        Flip-Flops as Interface Elements
        Introduction to Finite-State Machines (FSM)
        Modulo-N Counters: Up Counters and Up-Down Counters
        A Traffic Light Controller
        ABET Criteria Covered:             C
        Program Objectives Covered:        2
8.    Memory Organization and Addressing
        Types of memory: ROM, RAM, SDRAM.
        Basic structure of random access memory.
        Cache memory: multilevel caches and split caches.
        Commercial standards for SDRAM.
        ABET Criteria Covered:            C
        Program Objectives Covered:       2
9.    Overview of Computer Busses, Disks, and Disk Drives
         General theory of computer busses.
         Special busses: the memory bus and the graphics bus.
         Synchronous and asynchronous busses.
         Overview of disk organization and timings.
         ABET Criteria Covered:             C
         Program Objectives Covered:        2
10.   Overview of Computer Architecture
         Main components of a Computer: CPU, Memory, and I/O Devices
         Computer Buses as Communication Devices
         ABET Criteria Covered:          C
         Program Objectives Covered:     2
11. Architectural Support for Computer Security.
       Memory protection, protection rings, and levels of privilege.
       Commercial management and mismanagement of security.
       Issues in the design of secure systems.
       ABET Criteria Covered:              C
       Program Objectives Covered:         2




Page 7 of 8 pages                                                Last Revised 8/6/2011
CPSC 5155 – Computer Architecture      Fall 2010                Undergraduate Offering



12.   The Instruction Set Architecture of a Model Computer
         The Assembly Language
         The User Registers
         Other Registers
         ABET Criteria Covered:            C
         Program Objectives Covered:       2
13.   The Central Processing Unit (CPU) of the Computer
         Main components: the ALU, Control Unit, and Register File
         Internal Bus Structure for the CPU
         Design of the Arithmetic-Logic Unit (ALU)
         The Register File and Its Communication via CPU Buses
         Subroutine linkage and the use of the stack.
         The Control Unit – Specification of Control Signals and Micro-Operations
         A Hard-Wired Control Unit
         A Microprogrammed Control Unit
         ABET Criteria Covered:              C
         Program Objectives Covered:         2
14.   The Input/Output System
         Main classes of I/O: Program-Controlled, Interrupt-Driven, and DMA
         The problem with Program-Controlled I/O
         Design of a Multi-Level Interrupt Structure for Vectored Interrupts
         Basics of a Direct Memory Access (DMA) I/O Controller
         Support for networks: interfacing the NIC.
         ABET Criteria Covered:              C
         Program Objectives Covered:         2
15.   Miscellaneous Advanced Topics
         Assessing computer performance.
         Pipe-lined execution structures.
         Parallel execution structures.
         The problem of cache coherency and a standard solution.
         The Cray line of supercomputers and their evolution.
         The CUDA (Compute Unified Device Architecture) by NVIDIA
         Massively parallel computer architectures, including BlueGene and Jaguar.
         Other computer architectures
         ABET Criteria Covered:             C
         Program Objectives Covered:        2




Page 8 of 8 pages                                                Last Revised 8/6/2011

				
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