INTEL 8085 architecture,addressing modes,instruction

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					INTEL 8085
   collection in internet
               Contents

Microprocessor  Architecture
Instruction Set and

Addressing mode
       Microprocessor ?

    A microprocessor is multi
programmable clock driven register
 based semiconductor device that is
used to fetch , process and execute a
  data within fraction of seconds.
PIN CONFIGURATION
  THE 8085 AND ITS BUSSES
The 8085 is an 8-bit general purpose
microprocessor that can address 64K Byte of
memory.
It has 40 pins and uses +5V for power. It can run
at a maximum frequency of 3 MHz.
    -The pins on the chip can be grouped into 6
    groups:
       Address Bus.
       Data Bus.
       Control and Status Signals.
       Power supply and frequency.
       Externally Initiated Signals.
       Serial I/O ports.
    The Address and Data Busses
   The address bus has 8 signal lines A8 – A15 which are
    unidirectional.
   The other 8 address bits are multiplexed (time shared)
    with the 8 data bits.
      So, the bits AD0 – AD7 are bi-directional and serve
       as A0 – A7 and D0 – D7 at the same time.
         During the execution of the instruction, these
          lines carry the address bits during the early part,
          then during the late parts of the execution, they
          carry the 8 data bits.
      In order to separate the address from the data, we
       can use a latch to save the value before the function
       of the bits changes.
                     8085 ARCHITECTURE


                          RST 5.5

                                    RST 6.5


                                               RST 7.5
                   INTR

                            INTA




                                                          TRAP




                                                                                                                                                         SOD
                                                                                                                                   SID
                          Interrupt controller                                                                                   Serial I/O controller


                                                                                             8 bit internal Data Bus


                                                                                                  Instruction Reg                                              Multiplexer

     Accumulator                         Temp Reg
                                                                                                                                                       W               Z
                                                                                                                                                       temp            temp




                                                                                                                                          Reg array
                                                                                                                                                        B               C
                                                                        Flag Flip                                                                       D               E
                                                                         Flops
                                                                                                    Instruction
                                                                                                   Decoder and                                          H               L
                                                                                                     Machine
                                                                                                      Cycle                                            Stack Pointer (16)
                                                                        ALU                          Encoding                                         Program counter (16)

                                                                                                                                                         Inc/dec latch
                                               Timing and control
X1    Clk gen
                                                                                                                                                                             Data/ Address
X2                                                                                                                                       Address Buffer
                                                                                                                                                                                 Buffer
             Control                           Status                                  DMA                   Reset
                                                                 IO/M
                                         ALE
                          WR




                                                         S1
                   RD




                                               S0




                                                                                                                                                  A15 –A8
                                                                                                                         Reset
     Clk
     out




                                                                                           HLDA




                                                                                                                                                                              AD0 –AD7
                                                                                                                         out


                                                                                                                                                  Address
                                                                                                              Reset in
           Ready




                                                                                                                                                                              Address/
                                                                                    HOLD




                                                                                                                                                   Buss
                                                                                                                                                                                Data
                                                                                                                                                                                Buss
                Flag Register
The flags are affected by the arithmetic and logical
                     instruction

D7     D6      D5     D4      D3     D2     D1         D0
 S      Z             AC              P                CY
                  Accumulator
 It is an 8 bit register
 For any arithmetic and logical instruction one of the data
  should be in this register
 It is used for storing the result of any arithmetic and
  logical manipulations.
 It is also called as A register

 All the data which are sent to I/O devices are sent via
  A register.
          Temporary register
 Itis used to hold the data during the
  operation of arithmetic and logical operation
                  Sign Flag
 If the D7 bit of the accumulator is set then
  this flag is set i.e 1 meaning that the result is
  in negative.
 Ex. 7-8 = -1
                     Carry flag
 During the arithmetic operation if a carry occurs then this
  flag is set.
 Ex. F1+1F=       1 10



                     Carry
               Zero flag

During    the arithmetic/ logical
 operation if the result is zero then this
 flag is set.
Ex. FF-FF = 00
                  Parity flag
 After the of the arithmetic and logical
  operation if the result is even then this flag is
  set.
 Ex. 0A-02 = 08
           Auxiliary carry flag
 During   BCD arithmetic operation when a carry is
  generated by D3 bit and passed on to D4 bit then
  this flag is set.
 Ex. 1F+11 = 0001 1111 +

                    0001 0001
                  = 0010 0000
         Timing and control

 It synchronizes all the operation with the
  clock and generates the communication
  between the microprocessor and
  peripherals
Instruction Register and decoder

 The  instruction is loaded in the
  instruction register
 The decoder decodes them and establishes
  the operation that has to be performed
            Register array

 The   W and Z register are temporary
  registers
 Used to hold the 8 bit data during the
  execution and it is used internally .
 It is not used by the programmer.
    Control and status signals

Machine Cycle   IO/M   S1   S0

Opcode fetch     0     1    1
 Memory read     0     1    0
Memory write     0     0    1
  I/O read       1     1    0
  I/O write      1     0    1
       Arithmetic and Logical unit

 It is an 8 bit register
 It is used for performing addition,
  subtraction and logical operation.
 AND, OR, NOT, XOR, CMP are
  some of the logical operation.
          Program Counter

It is a 16 bit register
It is used to point out the address of
 the next instruction which is to be
 executed
               Stack pointer
 It is a 16 bit register
 It points the starting address of the stack .
             Register Array
 B,  C, D, E, H and L are general purpose
  register
 All are 8 bit register

 If the are combined as BC, DE and HL
  they can store 16 bit data
              Instruction set
  An instruction is a binary pattern designed
  inside a microprocessor to perform a specific
  function.
 A group of instruction together called as
  instruction set.
 Group of instruction set is called as a
  program.
    Classification of instruction set
    According to word size or byte size it is
     classified into 3 types.
    1 - byte instruction
    2 - byte instruction and
    3 - byte instruction
           1 byte instruction
 It includes the Opcode and the Operand in
  the same byte.
 Ex. MOV A,B

 Ex. CMP B

 Ex. ANA B

 Ex. RAL
         Opcode an operand

 The task to be performed is called Opcode
 The data to be operated is called
  Operand.
            2 byte instruction
 The  first byte specifies the operation cod eand
  the next byte specifies the operand
 Ex. MVI A, 10

 Ex. SUI A, 34
            3 byte instruction
 The first byte specifies the opcode and the next
  two bytes specifies the 16 bit address/data.
 Ex. LXI H, 4500

 Ex. JMP 5000
    Classification of Instructions
 The 8085 instruction are classified into 5 categories.
  They are..
 Data transfer operations

 Arithmetic operations

 Logical operations

 Branching operations and

 Machine control operation
       Data transfer operations

 Group of data form a source location are copied
  to the destination location without changing the
  original data.
   Various types of data transfer are:
 Between registers

 Specific byte to a register or a memory location

 Between memory location and a register

 Between an I/O device and accumulator
         Arithmetic operations
 Functionlike addition, subtraction, increment and
 decrement operation are performed
Ex. ADD B
Ex. SUB B
Ex. INR B
Ex. DCX H
             Logical operation
 These instruction perform various logical operation
  with the contents of the accumulator.
 Ex. AND B

 Ex. ORA

 Ex. RAR

 Ex. CMP B

 Ex. CMA
         Branching operation
 It alters the sequence of program executing
  either conditionally are unconditionally
 Ex. JMP 5000

 Ex. JNC 4500
       Machine control operation
   controls the machine operation
 It

 Ex. HALT

 Ex. NOP

 Ex. INTR
          Addressing modes
 The   various ways of specifying the operand are
  called the addressing mode.
It classified is as
 Immediate addressing

 Register addressing

 Direct addressing

 Indirect addressing

 Implied addressing mode
Immediate addressing mode
Instructions that use immediate addressing


         MVI R, DATA
Register Addressing mode




       MOV Rd, Rs
   Direct addressing mode


Instructions that include a direct address

           IN/OUT Port #
             LDA 4500
        Indirect addressing mode
   Register indirect instructions reference memory via
    a register pair.



               LXI Rp, 16 bit address
    Implied addressing mode

Instruction deals with the accumulator

                     ORA
                     RAL

				
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posted:11/23/2012
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