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Software Defined Radio Lec 6 – Digital Generation of Signals Sajjad Hussain MCS-NUST Outline for Today’s Lecture Digital Generation of Signals 1. Introduction 2. Comparison to Analog generation 3. DDS Techniques 4. Analysis of Spurious Contents 5. Band-pass Signal Generation 6. Performance of DDS Systems 7. Generation of Random Numbers 8. ROM compression techniques Digital Generation of Signals - Introduction Many of the traditional analog techniques of radio design have thus far proven to be inefficient and unsuitable for SDRs Development of increasingly fast and efficient digital ICs and better digital design techniques have made software radios a reality It is therefore important to understand the components of the underlying architecture, which actually define the SDR and its capabilities E.g. synthesis of waveforms – sinusoids (modulation, pulse-shaping, filtering etc.)– important part of comm. sys. design Digital Generation of Signals - Introduction Analog techniques have long dominated frequency synthesis Bulky analog devices – quartz crystals, inductors, capacitors, mechanical resonators Digital techniques – more accurate, easy to manufacture with VLSI Direct Digital Synthesis – DDS –generation of waveforms directly in discrete time Direct Digital Synthesis - DDS History Earlier designs – 1970s – for audio signal applications – from sampled values of sine wave in ROM later driving DAC Modern approaches – much improved and mostly derivative of the classical approach Practical use in Comm. System by 1990s 1980s – Highest freq. - < 10 MHz– limitation of DAC tech. Current DDS systems – 100s of MHz Advantages Preferred form of signal generation nowadays Precision Fast switching capability Generation of arbitrary wave-shapes Small low-powered devices – portability Fewer components per system – low costs Fewer assembly operations / reduced product reject rates Direct Digital Synthesis - DDS Allow carrier modulation in digital domain and then to DAC AM Modulation : Multiplyingsinusoidal output of ROM with modulating signal and then to DAC PM modulation : Changing instantaneous phase angle Using the modulating signal to alter the input to the ROM (phase) FM Varyinginstantaneous frequency Using modulating signal to increment the phase Comparison of DDS with Analog Synthesis Common Approaches DAS – Direct Analog Synthesis PLLs – Phase Locked Loops DAS From crystals freq. and their harmonics combinations Advantages : High purity and low spurious outputs -> -80 dB Fast frequency switching till 0.1 μs Disadvantages Limited by size, cost and power consumptions – improper for portable applications Applications : medical and radar imaging, spectroscopy, radar simulation Comparison of DDS with Analog Synthesis PLLs Feedback mechanism for tracking a given freq. VCO, Phase detector and loop filter Advantages Very low level of spurious contents Comparatively low cost Disadvantages Relatively higher level of phase noise as compared to DAS Inherently slow freq. switching times due to loop filter settling delay Comparison of DDS with Analog Synthesis DDS overcomes most of the problems associated with DAS and PLLs Advantages Ease of implementation VLSI implementations are inexpensive and readily available Size of equipment is fraction of that of similar analog synthesizer Precision Use in systems demanding tight freq. control Most of today’s DDS designs provide step sizes as fine as 1 mHz or smaller Stability More stable response than analog versions Stray in freq. because of changes in temperature, humidity and other factors influencing analog components response Limited to use in less demanding applications w.r.t tight freq. control DDS Advantages Advantages Flexibility - Easy to perform digital tuning (BW, resolution) Fast Switching : Output is smooth, transient-free and phase- continuous during freq. change – crucial in fast Frequency Hopping systems Spectral Purity Solution : Ability to consistently and precisely predict the performance of digital components of a DDS system Disadvantage Presence of spurious frequencies. in output signal – challenging problem to tackle Approaches for Direct Digital Synthesis Nyquist constraint Maximum attainable output freq. limited to Fclk/2 Exploitation of spectral replication, creation of a signal with center freq. higher than clock freq. Common Approaches ROM Look-up table approach Phase-truncation distortion Analysis of Output Sequence Pulse-Output DDS Pulse-Output DDS Very simple implementation Used for generation of pulse, saw-tooth or rectangular waveforms Basic idea : Cycling through an accumulator, as a way to create an adjustable pulse-frequency from a stable high-frequency driving clock N bit adder and register to form an accumulator A freq. word Δr is added to the accumulator once every clock period Tclk Pulse-Output DDS The output of the accumulator S(n), at time n is given by The accumulator will overflow, and the counter resets on average once every 2N/ Δr clock periods The average freq. for which the counter is reset is The output of this synthesizer could be the carry output of the accumulator for the pulse output or the MSB of the output for approx. square-wave output or S(n) for a saw-tooth output ROM Look-Up Table Approach ROM LUT approach uses sampled values of a periodic function stored in a ROM Every clock cycle, a value of the periodic function stored in the ROM is output through a DAC to generate the synthesized signal. Output from the DAC is often a distorted version, due to sample-and- hold nature of the waveform – use of LPFs and amplifiers Sometimes use of pre-DAC digital filtering to cater for analog distortion ROM Look-Up Table Approach Structure : Based on a single crystal oscillator, which generates a reference clock frequency Use of accumulator = Adder + Register ROM Function : The output of the accumulator takes the form of an address used by a ROM LUT that contains the waveform samples. The number of clock-cycles needed to step through the entire ROM LUT defines the time-period of the waveform along with the step-size Δr LUT contents – digital representation of the desired waveform – digital words describing the amplitude of the waveform as a function of phase Address generated by the adder represents the phase value of the waveform Example of ROM LUT with 512 addresses Extensive pipe-lining can be used to speed-up the flow of data to achieve an output freq. in excess of hundreds of MHz ROM LUT based DDS DDS with ROM-LUT Phase – Truncation distortion : As previously described, the step-size Δr determines the output frequency where Fout = ( Fclk * Δr ) / 2N Nyquist criterion limits the output freq. to half that of the input clock Taking the smallest possible change in Δr = 1, the freq. resolution can be found as ΔF = Fclk / 2N Example : Max. output freq. = 2.5 MHz with tuning-step = 1 Hz Fclk should be 10 MHz Sufficient accumulator width 2N = Fclk / ΔF smallest N = 24 Size of LUT = 224 = 16 MB having this size of memory on board is costly LUT size can be reduced by storing only one-fourth the period of the sine- wave and repeating it with necessary sign inversions still 4 MB Solution – Phase truncation DDS with ROM-LUT – Phase truncation In phase truncation, not all of the N bits of the phase accumulator are used to address the ROM If we choose any W such that W< N, for address of the ROM LUT, then the phase will be held for some time before moving ahead depending upon the value of W. Example : A 3-bit DDS accumulator, but only 2 of the MSBs (W=2) of the accumulator are used to address a 2*8 ROM DDS with ROM-LUT – Phase truncation In phase truncation, not all of the N bits of the phase accumulator are used to address the ROM A rudimentary DDS system Analysis of Output Sequence Phase accumulator uses the modulo 2N property of an N bit accumulator to simulate the modulo 2π property of the sine function ROM serves as LUT, converting its Index (phase) into sine amplitude samples Output freq. = ( Fclk * Δr ) / 2N and phase-increment per clock-cycle = ( Δr * 2π ) / 2N Fastest output freq. – Nyquist vs. practical Fclk / 2 , Fclk / 4.5 Slowest output freq. Δr = 1 Fout = Fclk / 2N Use of LPF at the output of DAC for images removal Analysis of Spurious Signals Purpose of output filters of DDS system interpolate the discrete time signal and minimize spurious outputs. Cannot completely remove all non-linear distortions modeling of noise at different points of system Three major sources of error : Amplitude truncation because of finite no. of bits not the major source of error Phase truncation use of truncated no. of bits to address ROM major source of error Location of spurs due to phase-truncation alone occur at integral multiples of freq f given by Resolution of DAC for periodic signals, harmonic spurious frequency components Sources of Spurious Signals in a DDS System Phase-truncation errors For every output freq., a subset of the ROM LUT values are used to synthesize the signal, which impacts the spurious signals in the final output. No. of address-lines to ROM vs. no. of output bits Optimum no. of bits required W-1or W-2 depending upon whether entire sine-wave or 1/4th of the values are stored Given that at least two samples are needed to represent a periodic waveform, the range of Δr is constrained from 1 to 2N/2. No phase-quantization occurs when LSBs which are ignored by ROM are always 0. Thus there are 2w/2 freqs for which phase-quantization does not occur Total no. of frequencies generable ( Nyquist criteria ) vs. Freq. without phase-quantization effect. For N = 32 and W = 14…>>>Total combinations possible 231, but without phase quantization 213. Effect of Large na and small W Effect of having small na and large W Spurious Components due to periodic jitter Signal periodicity controlled by Δr and size of accumulator N Depending upon how many periods (k) of the fundamental output period N are required to return to the original state defines the mount of harmonic spurious signals at (1/k)th the original freq. Another periodicity is generated, denoted by P, for which the phase relation S(i)= S(i+P), for all i. While main output freq. given by Δr / (Tclk * 2N ), other periodicities will be determined by 2N / gcd (Δr , 2N ) Only Δr = 2G (G<N) generated a solution gcd (Δr , 2N ) = Δr However, for the majority of Δr,, this is not the case , and the secondary periodicity will manifest itself as a spurious signal Spurious periodicities Spurious Components due to periodic jitter For N=4 and Δr = 6 period of the secondary term = 8 *Tclk Normalized main output freq. period is (16/6)Tclk = 2.666 *Tclk Hence the spectrum of a digital sine, at the output of a ROM (with no amplitude truncation) consists of principal (2.666 *Tclk ) and secondary (8 *Tclk) periodicities The ratio between them is 3, therefore a spurious signal at the fundamental frequency ± 1/3 and its harmonics will exist. The output spectral lines, of which only one is the desired signal, will show all periodicities that are multiples of (2N *Tclk) / gcd (Δr , 2N ) this is the fundamental relationship for locating spurious signals Band-pass Signal Generation Spectral images can be used to obtain higher freq. than the sampling freq. Images will appear at n*Fsamp ± Fsine The roll-off in the amplitude of aliased images follows the sinc(x) function due to the non-ideal nature of the ADC Non-ideal ADC – pulses of finite width instead of infinitely narrow pulses Real signals – presence of spurious signals due to phase and amplitude truncation SFDR of the signal Spurious energy due to non-linearities inherent in the DAC Higher output freqs. require higher order DACs and sometimes require a combination with PLLs or heterodyne mixers Sinc effect for bandpass DDS Performance of DDS Systems First limitation comes from the presence of spurious Sources of spurious signals Amplitude truncation Phase-truncation DAC- non linearities Other limitation comes from bandwidth – Nyquist Criterion –little a problem now in the presence of high-speed FPGAs and DSPs Relation of chosen output freq. with clock freq. presence of spurs Possible to predict spurs in digital signals, however, the non-linearities added in the analog part of DDS (=DAC) are difficult to model analytically This along with some errors introduced by ROM that are not analytically traceable -> use of empirical models Measurement based model Use of Hybrid Systems DDS Systems make a trade-off between bandwidth and spectral purity In a DDS using ROM-LUT , freq. resolution is determined primarily by word-length of phase accumulator Greater resolution with more bits to accumulator but need to reduce phase-truncation for same spectral-purity (More ROM) PLLs High switching-times but good characteristics Hybrid structures that retain good qualities of both the systems Hybrid DDS-PLL system Using the output of DDS as a freq. reference for the PLL DDS can provide very high resolution and high switching speeds Possible to obtain very small increments of Fref and it can also be varied at very fast rate not possible with traditional PLL Spectral purity of hybrid system largely defined by spectral purity of PLL Hybrid DDS-PLL system Applications of DDS Systems High freq. switching enablers Can be as high as one clock-cycle plus delay added by output filter Generate signals for paging radios, mobile phones and multi-mode radios Use in FH-SS systems – fast switching with spectral purity required For testing equipment/electronics for different freqs + creating custom and arbitrary waveforms Capturing waveform with oscilloscopes/ data-recorders and reproducing using DDS

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posted: | 10/11/2012 |

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