# EE 5342 Lecture

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"EE 5342 Lecture"

```					EE5342 – Semiconductor Device
Modeling and Characterization
Lecture 20
March 31, 2010

Professor Ronald L. Carter
ronc@uta.edu
http://www.uta.edu/ronc/
Schedule Change
• Classes WILL be held on
– 4/5/10
– 4/7/10
– Dr. Russell will be filling in
• The previously scheduled make-up
classes will be cancelled
– 4/16/10 (Friday)
– 4/23/10 (Friday)
• Project 2 Test changed to W 4/28/10
L20 03/31/10                           2
Inversion for p-Si
Vgate>VTh>VFB
VOx                  Vgate> VFB
EOx,x        0
xOx
 Induced ESi                  EOx,x> 0

 0 depletes            e- e- e- e - e-

 Induced ESi
Depl Reg            Acceptors
above threshold
for inversion                Vsub = 0

L20 03/31/10                                    3
Inversion for p-Si
Vgate>VTh>VFB
Fig 10.5*

L20 03/31/10         4
Approximation concept
“Onset of Strong Inv”
• OSI = Onset of Strong Inversion
occurs when ns = Na = ppo and VG = VTh
• Assume ns = 0 for VG < VTh
• Assume xdepl = xd,max for VG = VTh and
it doesn’t increase for VG > VTh
• Cd,min = eSi/xd,max for VG > VTh
• Assume ns > 0 for VG > VTh
L20 03/31/10                               5
MOS Bands at OSI
p-substr = n-channel
Fig 10.9*

L20 03/31/10           6
Equivalent circuit
above OSI
• Depl depth given by the maximum
depl = xd,max = [2eSi|2fp|/(qNa)]1/2
• Depl cap, C’d,min = eSi/xd,max
• Oxide cap, C’Ox = eOx/xOx             C’   Ox

• Net C is the series comb             C’d,min

1      1     1
       
C'tot C'd,min C'
Ox
L20 03/31/10                                      7
MOS surface states**
p- substr = n-channel
VGS           fs       Surf chg Carr Den
VGS < VFB < 0      fs < 0      Accum.      ps > N a
VGS = VFB < 0      fs =      Neutral      ps = N a
VFB < VGS       fs > 0     Depletion    ps < N a
VFB < VGS < VTh   fs = |fp|    Intrinsic ns = ps = ni
VGS < VTh     fs > |fp|    Weak inv ni< ns < Na
VGS = VTh     fs = 2|fp|    O.S.I.      ns = Na

L20 03/31/10                                             8
n-substr accumulation
(p-channel)
Fig 10.7a*

L20 03/31/10            9
n-substrate depletion
(p-channel)
Fig 10.7b*

L20 03/31/10            10
n-substrate inversion
(p-channel)
Fig 10.7*

L20 03/31/10            11
Values for gate work
function, fm
Alu min um, Al : fm  4.28 V
Gold, Au : fm  5.1 V
Molybdenum, Mo : fm  4.6 V
Platinum, Pt : fm  5.65 V
Tungsten, W : fm  4.55 V

n         poly - Si : fm  Si  4.05 V
p  poly - Si : fm  Si  Eg / q  5.17 V
L20 03/31/10                                      12
Values for fms
with metal gate
             NCNa  
Al to p - Si : fms  fm,Al     Si  Vt ln 2  
             n 
             i 
 NCNa  Eg      Na 
Note : Vt ln 2  
 n  2q  Vt ln n 
 
 i             i 
             NC  
Al to n - Si : fms  fm,Al   Si  Vt ln
             N 

             d 
fm,Al  4.28, Si  4.05, ni  1.45E10
NC  2.8E19, Eg  1.12, Vt  0.02586
L20 03/31/10                                              13
Values for fms
with silicon gate
                                               NCNa  
n       poly to p - Si : fms    Si   Si  Vt ln 2  
             n 
             i 
 NCNa  Eg       Na 
Note : Vt ln 2    Vt ln 
 n  2q         n 
 i              i 
                           Eg              NC  
p poly to n - Si : fms  Si    Si  Vt ln  
 N 
q            d 
 NC  Eg      Nd 
Note : Vt ln    Vt ln 
 N  2q      n 
 d           i 
L20 03/31/10                                         14
Typical fms values

fms
(V)

Fig 10.15*          NB (cm-3)
L20 03/31/10                     15
Flat band with oxide
charge (approx. scale)
If a charge Q'ss is             Al           SiO2        p-Si

at the Ox/Si bound,                       +<--Vox-->-
q(Vox)
then at FB cond a                             Ec,Ox q(f - )
fp ox
charge Q'  Q'ss is q(fm-ox)
m                                    Ex
on the gate surface                          Eg,ox     Ec
E            Fm
'
~8eV         EFi
Qss 1 dEc VOx
Ex                           q(VFB)                        EFp
e Ox q dx xOx                                       Ev
VFB= VG-VB, when
'
Qss         Si bands are flat
VFB  fms  VOx  fms    '
COx                        Ev
L20 03/31/10                                                         16
Flat-band parameters
for n-channel (p-subst)
Q'ss
p  substrate : VFB  fms   
C'
Ox
e Ox
C' 
Ox       , Q'ss is the Ox/Si chg den
xOx
For a n  poly - Si gate, f s  fm   s
 NcNa   Eg      Na  
fms     Vt ln 2     Vt ln    0
 n      2q      n 
 i              i 
L20 03/31/10                               17
Flat-band parameters
for p-channel (n-subst)
Q'ss
n  substrate : VFB  fms         (no change)
C'
Ox
e Ox
C' 
Ox       , Q'ss is the Ox/Si chg den
xOx
Eg
For a p  poly - Si gate, f s  fm   s 
q
 NvNd   Eg   Nd  
fms  Vt ln 2     Vt ln    0
 n   2q      n 
L20 03/31/10  i           i             18
Inversion for p-Si
Vgate>VTh>VFB
VOx                  Vgate> VFB
EOx,x        0
xOx
 Induced ESi                  EOx,x> 0

 0 depletes            e- e- e- e - e-

 Induced ESi
Depl Reg            Acceptors
above threshold
for inversion                Vsub = 0

L20 03/31/10                                    19
Approximation concept
“Onset of Strong Inv”
• OSI = Onset of Strong Inversion
occurs when ns = Na = ppo and VG = VTh
• Assume ns = 0 for VG < VTh
• Assume xdepl = xd,max for VG = VTh and
it doesn’t increase for VG > VTh
• Cd,min = eSi/xd,max for VG > VTh
• Assume ns > 0 for VG > VTh
L20 03/31/10                           20
MOS Bands at OSI
p-substr = n-channel
Fig 10.9*

qfp

2q|fp|

xd,max
L20 03/31/10                  21
Computing the D.R.
W and Q at O.S.I.
Ex
xd ,max 

2eSi 2 f p   
Emax                              qNa
dEx     q
     Na
dx     eSi
area  2 f p
x
'
Q d,max  qNa xd,max
L20 03/31/10                                    22
Calculation of the
threshold cond, VT
The threshold condition is reached
when the surface is inverted. The
depletion region has reached the
value of xd,max and the extra charge
is Q'd,max  qNBxd,max (n - sub, p - sub)
VT  VFB  V, where V is the voltage
added to induce  Q'd,max across the Ox
L20 03/31/10                                 23
Equations for
VT calculation                        '
Qd,max
p, n  substr : VT  VFB  2fp,n 
'
COx
 ni                Nd 
fp  Vt ln    0, fn  Vt ln    0,
N                 n 
 a                 i 
2e 2fp,n
d,max   qNa,d xd,max , xd,max 
Q'
qNa ,d
V  0 for p - substr,  0 for n - substr
L20 03/31/10                                    24
n-channel VT for
VC = VB = 0
Fig 10.20*

L20 03/31/10                25
Fully biased n-MOS
capacitor
VG
Channel if
VG > VT
VS                        EOx,x> 0                   VD

n+       e- e- e- e- e- e-       n+

p-substrate

Depl Reg                        Vsub=VB           Acceptors
y
L20 03/31/10           0                       L                  26
Fully biased MOS
capacitor in inversion
Channel                      VG>VT

VS=VC                                        VD=VC
EOx,x> 0

n+       e- e- e- e- e- e-       n+

p-substrate

Depl Reg                        Vsub=VB           Acceptors
y
L20 03/31/10           0                       L               27
Flat band with oxide
charge (approx. scale)
If a charge Q'ss is             Al           SiO2        p-Si

at the Ox/Si bound,                       +<--Vox-->-
then at FB cond a          q(Vox)
Ec,Ox q(f - )
fp ox
charge Q'  Q'ss is q(f - )
m                                    Ex
m ox
on the gate surface                          Eg,ox     Ec
E            Fm
'                                  ~8eV         EFi
Qss 1 dEc VOx
Ex                          q(VFB)                        EFp
e Ox q dx xOx                                     Ev
VFB= VG-VB, when
'
Qss        Si bands are flat
VFB  fms  VOx  fms     '
COx                       Ev
L20 03/31/10                                                        28
Flat-band parameters
for n-channel (p-subst)
Q'ss
p  substrate : VFB  fms   
C'
Ox
e Ox
C' 
Ox       , Q'ss is the Ox/Si chg den
xOx
For a n  poly - Si gate, f s  fm   s
 NcNa   Eg      Na  
fms     Vt ln 2     Vt ln    0
 n      2q      n 
 i              i 
L20 03/31/10                               29
MOS energy bands at
Si surface for n-channel
Fig 8.10**

L20 03/31/10                30
Computing the D.R.
W and Q at O.S.I.
Ex
xd ,max 
      V
2eSi 2 f p  ( B VS )   
Emax
qNa
dEx     q
     Na
dx     eSi
V
area  2 f p  ( B VS )
x
Qd,max  qNaxd,max
L20 03/31/10                                        31
Q’d,max and xd,max for
biased MOS capacitor

|Q’d,max|/q (cm-2)
xd,max (microns)

Fig 8.11**

L20 03/31/10                              32
Fully biased n-
channel VT calc
p  substrate : VG, at threshold  VT
Q'd,max
VT  VC  VFB  2fp                    VFB  V
C'
Ox
 ni 
d,max   qNa xd,max ,
fp  Vt ln   0, Q'
 Na 

2e 2 fp  VB  VC 
xd,max                               , V  0
L20 03/31/10
qNa                          33
Vs , VD  VB
Vox  VG  Vs or VG  1 / 2(Vs  VD )

Total BB goes from 
Vbi  2  p Na  Na , Nd  ns  Na


  2Vt ln(Na / ni )

Va  Vpside  Vnside  VB  Vs
Total Band Bending  2  p  (VB  Vs )

L20 03/31/10                                 34
Computing the
threshold voltage
Q' ,max
d
VT  VFB        2 f p VS 
C' Ox
 VFB  V , where V is required
to invert the channel and
charge the DR

L20 03/31/10                             35
VT  VFB  2  P  Vs  (Qd,max ) / Cox
          

VT  VG for Vs & VB values chosen

VT  VB  V GB Th...  VFB  T .BB  (Qd,max ) / Cox
          

L20 03/31/10                                     36
n-channel VT for
VC = VB = 0
Fig 10.20*

L20 03/31/10                37
Flat-band parameters
for p-channel (n-subst)
Q'ss
n  substrate : VFB  fms         (no change)
C'
Ox
e Ox
C' 
Ox       , Q'ss is the Ox/Si chg den
xOx
Eg
For a p  poly - Si gate, f s  fm   s 
q
 NvNd   Eg   Nd  
fms  Vt ln 2     Vt ln    0
 n   2q      n 
L20 03/31/10  i           i             38
Fully biased p-
channel VT calc
n  substrate : VG, at threshold  VT
Q'd,max
VT  VC  VFB  2fn               VFB  V
C'
Ox
 Nd 
fn  Vt ln   0, Q'
n            d,max  qNdxd,max ,
 i 
2e2 fn  VC  VB 
xd,max                          , V  0
qNd
L20 03/31/10                                   39
p-channel VT for
VC = VB = 0
Fig 10.21*

L20 03/31/10       40
Ion implantation

L20 03/31/10       41
“Dotted box” approx

L20 03/31/10          42

 Nimpl dx  NaiXi
0
                
area under      area under dotted
dashed curve           curve
'            '                     Na
Qss  Qss , before impl    qNaiXi        , F  NaiX
  Nd
di                 di
Xi Xd, max
To get Vt as desired, implant Nai Xi
qNaiXi
to get Vt  2.43, etc    '
Cox
L20 03/31/10                                        43
Mobilities

L20 03/31/10   44
Differential charges
for low and high freq

high freq.

From Fig 10.27*

L20 03/31/10                         45
Ideal low-freq
C-V relationship
Fig 10.25*

L20 03/31/10                    46
Comparison of low
and high freq C-V
Fig 10.28*

L20 03/31/10        47
Effect of Q’ss on
the C-V relationship
Fig 10.29*

L20 03/31/10           48
n-channel enhancement
MOSFET in ohmic region
0< VT< VG
Channel
VS = 0                            0< VD< VDS,sat
EOx,x> 0
e-e- e- e- e-
n+                       n+

Depl Reg              p-substrate         Acceptors
VB < 0
L20 03/31/10                                             49
Conductance of
inverted channel
•   Q’n = - C’Ox(VGC-VT)
•   n’s = C’Ox(VGC-VT)/q, (# inv elect/cm2)
•   The conductivity sn = (n’s/t) q mn
•   G = sn(Wt/L) = n’s q mn (W/L) = 1/R, so
•   I = V/R = dV/dR, dR = dL/(n’sqmnW)
L        VD
I  dL   C' VG  VC   VT  mnWdV
Ox
0        VS
L20 03/31/10                                 50
Basic I-V relation
for MOS channel
ID 
Wmn COx
2L
                    
2VG  VT VDS  VDS , VDS  VG  VT
2

At VDS  VDS,sat  VG  VT , Q' y  L   0  Sat.
n
so let ID be given by ID VDS,sat ,
for VDS  VDS,sat  VG  VT so
Wmn COx
ID  ID,sat             VG  VT 2
2L

L20 03/31/10                                     51
I-V relation for
n-MOS (ohmic reg)
m C'
ID 
2
W
n Ox
L
                 
2VG  VT VDS  VDS . Note for
2

ohmic
VDS  VG  VT  VDS,sat ,
ID
result is non - physical.                non-physical
ID,sat
At VDS,sat , n's, y L  0
assume that channel curr.
is const for VDS  VDS,sat
saturated
mnC' W
ID,sat        Ox   VGS  VT 2                  VDS
2   L                     VDS,sat
L20 03/31/10                                        52
Universal drain
characteristic                         mnC' W 2
Ox
mnC' W                ID,sat         V
ID1     Ox    1V 2                 2   L DS
2   L
ID
VGS=VT+3V
9ID1

ohmic   saturated, VDS>VGS-VT

VGS=VT+2V
4ID1

VGS=VT+1V
ID1
VDS

L20 03/31/10                                             53
Characterizing the
n-ch MOSFET
VD
ID
ID

D

G    S         B                               slope 

VDS  VGS , VT  0           mnC' W 
Ox
        
VDS  VGS  VT , so          2     L

mnC' W                    VT         VGS
ID,sat         Ox   VGS  VT 2
L20 03/31/10
2   L                                    54
Low field ohmic
characteristics
ID 
mnC' W
2
Ox
L
               
2VGS  VT VDS  VDS ,
2

for ohmic region. Furthermore, let
VDS  VG  VT , so that
W
ID  mnC'
Ox   VGS  VT VDS
L
W
 KP VGS  VT VDS , KP  mnC'
Ox
L
 dID                W
 dV             KP VDS
 GS  V V V        L
DS   G       T
L20 03/31/10                           55
MOSFET Device
Structre       Fig. 4-1, M&A*

L20 03/31/10                    56
4-7a           (A&M)

L20 03/31/10           57
Figure         4-7b (A&M)

L20 03/31/10                58
Figure 4-8a    (A&M)

L20 03/31/10           59
Figure 4-8b    (A&M)

L20 03/31/10           60
Body effect data
Fig 9.9**

L20 03/31/10           61
References
* Semiconductor Physics & Devices, by
Donald A. Neamen, Irwin, Chicago,
1997.
**Device Electronics for Integrated
Circuits, 2nd ed., by Richard S. Muller
and Theodore I. Kamins, John Wiley
and Sons, New York, 1986

L20 03/31/10                            62

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