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TC3162LEH_Data_Sheet_v_1_2_Brief by ajizai


									TRENDCHIP                                                                                 TC3162LEH
ADSL2/2+ Bridge/Router Processor                                                                                 Data Sheet

General Descriptions                                            Ÿ Two-chip ADSL bridge/router solution including
                                                                  TC3162LEH ADSL2/2+ processor and TC3086
TrendChip’ TC3162LEH ADSL2/2+ processor is a
           s                                                      integrated analog front end and line driver.
highly integrated solution for ADSL broadband access            Ÿ Compliant to ADSL performance requirements of
gateway. It includes a 32-bit network processor and a                                     s
                                                                  DSL Forum and operator’ specifications (including
powerful ADSL Discrete Multi-Tone (DMT) engine with               INP requirement).
enhanced features. When used with TrendChip’          s
                                                                Ÿ 32-bit network processor core with MMU and cache
TC3086 analog front-end (AFE), it performs a simple
                                                                  (write-back D-cache) optimized to handle layer 2,
two-chip solution for bridge/router applications.
                                                                  layer 3 and higher-layer protocols.
The TC3162LEH ADSL2/2+ processor employs the
discrete multi-tone modulation technology compliant             Ÿ 10/100 Ethernet MAC with Integrated PHY for LAN
to the various standards defined by ANSI and ITU-T.               access.
It incorporates a DMT engine, a 32-bit network                  Ÿ Embedded hardware ATM AAL-5 SAR supports
processor, a USB 1.1 controller & transceiver, a 10/100           CBR, UBR, UBR+ and VBR, and GFR traffics.
Ethernet MAC with Integrated PHY, and an ATM AAL5
                                                                Ÿ USB 1.1 controller provides plug-and-play service
hardware SAR. The 10/100 Ethernet MAC with                        for personal computers.
Integrated PHY supports LAN access. The 12Mbps
USB 1.1 client controller with transceiver provides a           Ÿ Support Parallel Flash and SPI Flash (Single/
plug-and-play service for PC without external device.             Dual/Quad Mode) Memory interface.
These features maximize the flexibility for the system          Ÿ SPI Flash Memory interface supports In System
designers.                                                        Programming.
                                                                Ÿ JTAG supported with ICE debug capability.
Features                                                        Ÿ 1.8V/3.3V supply.

Ÿ Support all ADSL standards (ADSL1/2/2+),                      Ÿ 128-pin LQFP package with Exposed PAD.
  including Annex A, B, I, J & M.
Ÿ Support Reach-Extended ADSL2 (Annex L).

                                                EJTAG         GPIO    ADSL Processor
                                   USB                                     128-pin LQFP
                                                                                            AFE Interface

                                  10/100                        ATM                                          TC3086       Line
                                                32-bit                      ADSL2/2+                        ADSL2/2+
                                  MAC+          RISC            SAR           DMT                             AFE
                                   PHY        processor                      Engine

                                            Memory Controller     Timers      INTC        PLL

                                             Flash        SDRAM

Trendchip Technologies Corp. – Proprietary and Confidential                                                 TCD-3162LEH-DS
Revision: V1.2                                          -1-                                                      Mar. 26, 2008

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