# Computation with Feedback by 8Z84az

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```									   Combinational Circuits
with Feedback
Marc Riedel
Ph.D. Defense, Electrical Engineering, Caltech

November 17, 2003
Combinational Circuits
Building Block: Logic Gate

x1
x2
g ( x1 ,  , xd )

xd

xi  {0,1}                g : {0,1}d  {0,1}
for all i  1,  , d
Combinational Circuits
Building Block: Logic Gate

x1
x2
g ( x1 ,  , xd )

xd

feed-forward device
Combinational Circuits
Common Gate: “AND” gate

x1                      x1 x2 g
0 0 0
g       0 1 0
x2                      1 0 0
1 1 1
Combinational Circuits
Common Gate: “OR” gate

x1                     x1 x2 g
0 0 0
g      0 1 1
x2                     1 0 1
1 1 1
Combinational Circuits
Common Gate: “XOR” gate

x1                     x1 x2 g
0 0 0
g      0 1 1
x2                     1 0 1
1 1 0
Combinational Circuits
The current outputs depend only on the current inputs.

inputs                                  outputs

x1
a f1 ( x1 ,  , xm )
x2                          a f 2 ( x1 ,  , xm )
combinational
        logic        
a f n ( x1 ,  , xm )
xm

xi  {0,1}                                  f j : {0,1}m  {0,1}
for all i  1,  , m                       for all j  1,  , n
Combinational Circuits
The current outputs depend only on the current inputs.

inputs                                       outputs

x1
a f1 ( x1 ,  , xm )
x2
combinational a af ( x 2,( x1 ,  ,)xm )
f
gate                 1  , xm
         logic       
a f n ( x1 ,  , xm )
xm

xi  {0,1}                                       f j : {0,1}m  {0,1}
for all i  1,  , m                            for all j  1,  , n
Combinational Circuits
Generally feed-forward (i.e., acyclic) structures.

x

c
y            z

x
z
y                                           s
Combinational Circuits
Generally feed-forward (i.e., acyclic) structures.

0
0
1
1            1
1

0
1
1
1
0
Feedback
How can we determine the output without knowing
the current state?
...

...

...

...
feedback
Feedback
How can we determine the output without knowing
the current state?
...

...
?
...
?

?           ...
Feedback

Example: outputs can be determined in spite of feedback.

x               x

a f a
Feedback

Example: outputs can be determined in spite of feedback.

0               0

a f a
Feedback

Example: outputs can be determined in spite of feedback.

0                0
0
a0 a
f
Feedback

Example: outputs can be determined in spite of feedback.

x               x

a f a
Feedback

Example: outputs can be determined in spite of feedback.

1               1

a f a
Feedback

Example: outputs can be determined in spite of feedback.

1                1
1
a1 a
f

There is feedback is a topological sense,
but not in an electrical sense.
Feedback

Example: outputs can be determined in spite of feedback.

x                 x

a f ax

Rivest’s Circuit
Example due to Rivest:

x1        x2        x3       x1     x2     x3

a   f1 a a    f2 a   a f3 a a f4 a a f5 a a   f6 a
Rivest’s Circuit
Example due to Rivest:

x
01        x2        x3       x
01     x2     x3

a   f1 a a    f2 a   a f3 a a f4 a a f5 a a   f6 a
Rivest’s Circuit
Example due to Rivest:

0          x2          x3       0      x2     x3

a   f
01 a   a    f2 a   a f3 a a f4 a a f5 a a   f6 a
Rivest’s Circuit
Example due to Rivest:

x
01        x2        x3       x
01     x2     x3

a   01 a a
f         f2 a   a f3 a a f4 a a f5 a a   f6 a
Rivest’s Circuit
Example due to Rivest:

x
11        x2        x3       x
11     x2     x3

a   f1 a a    f2 a   a f3 a a f4 a a f5 a a   f6 a
Rivest’s Circuit
Example due to Rivest:

1         x2        x3       1      x2     x3

a   f1 a a    f2 a   a f3 a a f4 a a f5 a a
1               f6 a
Rivest’s Circuit
Example due to Rivest:

x
11        x2        x3       x
11     x2     x3

a   f1 a a    f2 a   a f3 a a f4 a a f5 a a
1               f6 a
Rivest’s Circuit
Example due to Rivest:

x1           x2             x3             x1            x2             x3

x1 ( x2  x3 )                x3 ( x1  x2 )                x2 ( x1  x3 )
x2  x1 x3                    x1  x2 x3                    x3  x1 x2

3 inputs, 6 fan-in two gates.
Multiplication: AND
6 distinct functions, each dependent on all 3 variables.
Rivest’s Circuit
a   f1  x1 ( x2  x3 ) a   f 2  x2  x1 x3 a       f 3  x3 ( x1  x2 )
a   f 4  x1  x2 x3   a    f 5  x2 ( x1  x3 ) a   f 6  x3  x1 x2

Individually, each function requires 2 fan-in two gates:

x2                x1
x1 ( x2  x3 )
x3
x2       x1
a    f1 a
x3
x2            a        f2 a

x3                a f3 a

x1           a f4 a

x2           a f5 a

x3       a    f6 a

An equivalent feed-forward circuit requires 7 fan-in two gates.
Rivest’s Circuit
3 inputs, 6 fan-in two gates.
6 distinct functions.

x1         x2        x3        x1        x2        x3

a   f1 a a     f2 a   a f3 a a f4 a a f5 a a        f6 a

A feedback circuit with fewer gates than any equivalent
feed-forward circuit.
Rivest’s Circuit
2n fan-in two gates, n inputs
2n distinct functions.

x1                    xn              x1                    xn

                                      

a
f1   a           a   fn   a    a   f n 1   a        a   f2n   a
Rivest’s Circuit

...

...
a    f1 a
...
a f2 a           2n  1 gates
...

n  1 gates           
aa   f 2n

An equivalent feed-forward circuit requires 3n  2
fan-in two gates.
Rivest’s Circuit
2n fan-in two gates, n inputs
2n distinct functions.

x1                    xn              x1                    xn

                                      

a
f1   a           a   fn   a    a   f n 1   a        a   f2n   a

A feedback circuit with 2 3 the number of gates of any
equivalent feed-forward circuit.
Prior Work

• Kautz first discussed the concept of feedback in logic
circuits (1970).

• Huffman discussed feedback in threshold networks
(1971).

• Rivest presented the first, and only viable, example of
a combinational circuit with feedback (1977).
Prior Work
Stok discussed feedback at the level of functional units (1992).

X                        Y

e.g., add       F(X)                   G(X)       e.g., shift

F(G(Y))                 G(F(X))

Malik (1994) and Shiple et al. (1996) proposed techniques for
analysis.
Questions

1.   Is feedback more than a theoretical curiosity, even
a general principle?
2.   Can we improve upon the bound of 2 3 ?

3.   Can we optimize real circuits with feedback?
Key Contributions

1.   A family of feedback circuits that are asymptotically 1 2
the size of equivalent feed-forward circuits.
2.   Efficient symbolic algorithm for analysis (both
functional and timing).
3.   A general methodology for synthesis.
Ph.D. Defense

•   Present examples with same property as Rivest’s
circuits.

•   Illustrate techniques for analysis.

•   Focus on synthesis: methodology, examples,
optimization results.
x1
a   f1  x1 ( x2  x3  x4 )                                        Example
x2
f 2  x1  x2  x3 x4                  8 gates
4 inputs
f 3  x1 x2 x4  x3
x3                                                                8 distinct functions
not symmetrical
x4                             f 4  ( x1  x2 ) x3 x4

f 5  x1  x2 x3 x4
x1

f 6  x1  x2  x3 x4
x2

f 7  ( x1  x2  x4 ) x3
x3

x4                              f 8  ( x1  x2 ) x3 x4
Examples
9 gates, 3 inputs, 9 distinct functions , multiple cycles
x3
a       f 4  x3  x1 x2                                                        x2
x1
a
f 3  x2 ( x1  x3 )
a       f 2  x1  x2 x3

x1           f 5  x1 ( x2  x3 )
a
a   f1  x1 x 2 x3  x1 x2 x3
x1
a
f  x1 ( x2  x3 )
a 9

a       f 6  x1  x2 x3
a
a
a
f 7  x2 ( x1  x3 )
x1
x2
a
a   f 8  x3  x1 x1
x3
Example
20 gates, 5 inputs, 20 distinct functions.

x1           x2      x3      x4     x5         x1          x2             x3      x4        x5

a     f1      f2      f3        f4          f5          f6          f7        f8        f9      f 10

a       f 11   f 12    f 13    f 14      f 15        f 16        a   f 17    f 18      f 19      f 20

(“stacked” Rivest circuits)
½ Example
(sketch)

a
a 1
f  1  1 f 3

X

X                   a
a
f 3   3   3 f1   3 f 2   3 f1 f 2

X                                                       X  x1 , x2 ,, xn
a       f 2   2   2 f3                    i ,  i ,  i ,  i are functions of X
a

Generalization: family of feedback circuits ½ the size of
equivalent feed-forward circuits.
Analysis
• Functional analysis: determine if the circuit is combinational
and if so, what values appear.
• Timing analysis: determine when the values appear.

Contributions:
1. Symbolic algorithm based on Binary Decision Diagrams.
2. Optimizations based on topology (“first-cut” method).
Analysis
Explicit analysis:

x
01           x
02            x
03       x
01      x
02    x
03

01            02       01      02    01    02

arrival delay.
Assume gates each have unittimes
Analysis
Explicit analysis:

x
01           x
02
1             x
03       x
01      x
02
1     x
03

01            12
01       01      02    01
3    02
4
Analysis
Explicit analysis:

01
x            12
x             03
x        x
01      x
12    x
03

01            11       01      02    03    04

n inputs  2n combinations
Exhaustive evaluation intractable.
Analysis
Symbolic analysis:

x1             x2              x3          x1              x2              x3

 01 :   x1

 12 :   x1 x3
a
f1  
a                           similarly for f 2 , f 3, f 4 , f 5 , f 6
a

 03 :   x1 x2 x3
 14 :
        x1 x2 x3
Analysis
Symbolic analysis:

 01   c1 ( x1 , , xn )   evaluates to 0

 02   c2 ( x1 , , xn )
1



a
f   a
 1    c1 ( x1 , , xn )   evaluates to 1

 12   c2 ( x1 , , xn )





      d ( x1 , , xn )    undefined
Analysis
Symbolic analysis:

 01-7     c1 ( x1 , , xn )   evaluates to 0

 08-28    c2 ( x1 , , xn )
1



a
f   a
  1-10     c1 ( x1 , , xn )   evaluates to 1

 111-21   c2 ( x1 , , xn )

 


                
d ( x1 , , xn )    undefined

range of values
Synthesis
Design a circuit to meet a specification.

• General methodology: optimize by introducing feedback
in the substitution/minimization phase.
• Optimizations are significant and applicable to a wide
range of circuits.
Example: 7 Segment Display
x3   x2 x1   x0
0   0    0 0     0        Output
1   0    0 0     1
2   0    0 1     0          c
3   0    0 1     1
Inputs                         a            f
4   0    1 0     0          d
5   0    1 0     1
6   0    1 1     0    b            g
e
7   0    1 1     1
8   1    0 0     0
9   1    0 0     1
Example: 7 Segment Display

Output
a  x0 x2 x3  x1 ( x2 x3  x2 ( x0  x3 ))
b  x0 ( x1 x3  x1 x2 )                                 c
c  x1 x 2 x3  x3 ( x0 x2  x0 ( x1  x2 ))
a            f
d  x1 x 2 x3  x3 ( x1 x2  x2 ( x0  x1 ))             d
e  x0 x 1 x2  x3 ( x0 x 1 x2  x1 ( x0  x2 ))
f  x 1 x2  x3 ( x2  x0 x1  x0 x1 )             b
e
g
g  x 1 x2  x3 ( x0  x2 )
Substitution/Minimization
Basic minimization/restructuring operation:
express a function in terms of other functions.

a  x0 x2 x3  x1 ( x2 x3  x2 ( x0  x3 ))   (cost 9)

Substitute b into a:
a  x2b  x1 ( x2 x3  x2 x3  b)             (cost 8)

Substitute c into a:
a  x1c  x2 x3c                              (cost 5)

Substitute c, d into a:
a  x1c  c d                                 (cost 4)
Substitution/Minimization
substitutional set
{ b, c, d , f }


target function
a  x0 x2 x3  x1 ( x2 x3  x2 ( x0  x3 ))        Berkeley SIS
Tool


low-cost expression
a  x1c  c d
Acyclic Substitution
Select an acyclic topological ordering:
d
a
c
b
c                                            a
d
b
e 
f                                                    e
g                                                        f
g
Acyclic Substitution
Select an acyclic topological ordering:

a  x1c c d
b  x0 ( x1d  c)
c  x0 x2 x3  x2 ( x0 x1  d )
d  x1x2 x3  x3 ( x1x2  x2 ( x0  x1 ))
e  b  x3c d
f  x1x 2  a c  de
g  a bf

Cost (literal count): 37
Acyclic Substitution
Select an acyclic topological ordering:

a  x1c c d
b  x0 ( x1d  c)
c  x0 x2 x3  x2 ( x0 x1  d )
d  x1x2 x3  x3 ( x1x2  x2 ( x0  x1 ))
e  b  x3c d
f  x1x 2  a c  de
g  a bf

Nodes at the top benefit little from
substitution.
Cyclic Substitution
Try substituting every other function into
each function:

a  x1c  c d
b  x0 e
c  x2 a  x0 x2 g  e f
d  x1e  x2 a  x3 g
e  x3cd  b
f  x2 e  e g
g  a bf

Cost (literal count): 30              Not combinational!
Cost 37
Acyclic substitution
Upper bound

Cyclic solution?         Cost 34

Unordered substitution
Lower bound              Cost 30
Cyclic Substitution
Combinational solution:

a  x1c  x0 x3c
b  x0 e
c  x0 x2 x3  x2 ( x1 x3  e)
d  x1e  ( x2  x3 )a
e  x3 f  x2 ( x0  x1 ) f
f  x3 a  ( x2  x0 x1 ) g
g  a  x3b

Cost (literal count): 34
Cyclic Substitution
Combinational solution:

a  x1c  x0 x3c
b  x0 e
c  x0 x2 x3  x2 ( x1 x3  e)
d  x1e  ( x2  x3 )a
e  x3 f  x2 ( x0  x1 ) f
f  x3 a  ( x2  x0 x1 ) g
g  a  x3b

Cost (literal count): 34         topological cycles
Cyclic Substitution
Inputs x3, x2, x1, x0 = [0,0,1,0]:

a  x1c  x0 x3c               c
b  x0 e                       e
c  x0 x2 x3  x2 ( x1 x3  e)  e
d  x1e  ( x2  x3 )a         e
e  x3 f  x2 ( x0  x1 ) f   1
f  x3 a  ( x2  x0 x1 ) g    a g
g  a  x3b                    a b

Cost (literal count): 34               no electrical cycles
Cyclic Substitution
Inputs x3, x2, x1, x0 = [0,0,1,0]:

a  x1c  x0 x3c               c     0
b  x0 e                       e     1
c  x0 x2 x3  x2 ( x1 x3  e)  e    1
d  x1e  ( x2  x3 )a         e     1
e  x3 f  x2 ( x0  x1 ) f   1      1
f  x3 a  ( x2  x0 x1 ) g    a g  1
g  a  x3b                    a b  0

Cost (literal count): 34                   no electrical cycles
Cyclic Substitution
Inputs x3, x2, x1, x0 = [0,0,1,0]:

a  x1c  x0 x3c               c     0       c
b  x0 e                       e     1
a       f
c  x0 x2 x3  x2 ( x1 x3  e)  e    1       d
d  x1e  ( x2  x3 )a         e     1
e  x3 f  x2 ( x0  x1 ) f   1      1   b
e
g
f  x3 a  ( x2  x0 x1 ) g    a g  1
g  a  x3b                    a b  0

Cost (literal count): 34
Cyclic Substitution
Inputs x3, x2, x1, x0 = [0,0,1,0]:

a  x1c  x0 x3c               c     0       c
b  x0 e                       e     1
a       f
c  x0 x2 x3  x2 ( x1 x3  e)  e    1       d
d  x1e  ( x2  x3 )a         e     1
e  x3 f  x2 ( x0  x1 ) f   1      1   b
e
g
f  x3 a  ( x2  x0 x1 ) g    a g  1
g  a  x3b                    a b  0

Cost (literal count): 34
Cyclic Substitution
Inputs x3, x2, x1, x0 = [0,0,1,0]:

a  x1c  x0 x3c               c     0       c
b  x0 e                       e     1
a       f
c  x0 x2 x3  x2 ( x1 x3  e)  e    1       d
d  x1e  ( x2  x3 )a         e     1
e  x3 f  x2 ( x0  x1 ) f   1      1   b
e
g
f  x3 a  ( x2  x0 x1 ) g    a g  1
g  a  x3b                    a b  0

Cost (literal count): 34
Cyclic Substitution
Inputs x3, x2, x1, x0 = [0,1,0,1]:

a  x1c  x0 x3c
b  x0 e
c  x0 x2 x3  x2 ( x1 x3  e)
d  x1e  ( x2  x3 )a
e  x3 f  x2 ( x0  x1 ) f
f  x3 a  ( x2  x0 x1 ) g
g  a  x3b

Cost (literal count): 34
Cyclic Substitution
Inputs x3, x2, x1, x0 = [0,1,0,1]:

a  x1c  x0 x3c               c
b  x0 e                       0
c  x0 x2 x3  x2 ( x1 x3  e)  1
d  x1e  ( x2  x3 )a         a
e  x3 f  x2 ( x0  x1 ) f   f
f  x3 a  ( x2  x0 x1 ) g   a
g  a  x3b                    a b

Cost (literal count): 34               no electrical cycles
Cyclic Substitution
Inputs x3, x2, x1, x0 = [0,1,0,1]:

a  x1c  x0 x3c               c     1
b  x0 e                       0     0
c  x0 x2 x3  x2 ( x1 x3  e)  1    1
d  x1e  ( x2  x3 )a         a     1
e  x3 f  x2 ( x0  x1 ) f   f      1
f  x3 a  ( x2  x0 x1 ) g   a      0
g  a  x3b                    a b  1

Cost (literal count): 34                   no electrical cycles
Cyclic Substitution
Inputs x3, x2, x1, x0 = [0,1,0,1]:

a  x1c  x0 x3c               c     1       c
b  x0 e                       0     0
a       f
c  x0 x2 x3  x2 ( x1 x3  e)  1    1       d
d  x1e  ( x2  x3 )a         a     1
e  x3 f  x2 ( x0  x1 ) f   f      1   b
e
g
f  x3 a  ( x2  x0 x1 ) g   a      0
g  a  x3b                    a b  1

Cost (literal count): 34
Cyclic Substitution
Inputs x3, x2, x1, x0 = [0,1,0,1]:

a  x1c  x0 x3c               c     1       c
b  x0 e                       0     0
a       f
c  x0 x2 x3  x2 ( x1 x3  e)  1    1       d
d  x1e  ( x2  x3 )a         a     1
e  x3 f  x2 ( x0  x1 ) f   f      1   b
e
g
f  x3 a  ( x2  x0 x1 ) g   a      0
g  a  x3b                    a b  1

Cost (literal count): 34
Synthesis
Strategy:
• Allow cycles in the substitution phase of logic synthesis.
• Find lowest-cost combinational solution.

Collapsed:                                  Solution:

a  x1 x2 x3  x2 ( x1  x3 )               a  x3b  x2 x3
b  x1x2 x3  x1 ( x2  x3 )                b  x1 x2 x3  x1c
c  x3 ( x1  x2 )  x1x2                   c  x1a  x 2 x3

Cost: 17                                    Cost: 13
Branch and Bound

cost 12
“Break-Down” approach

cost 13                                  cost 12

• Exclude edges
• Search performed outside space
of combinational solutions
cost 13                 cost 14
combinational
Branch and Bound

cost 17
“Build-Up” approach

cost 15                                cost 16
not combinational

• Include edges
• Search performed inside space
of combinational solutions
cost 13                 cost 14
best solution
Implementation: CYCLIFY Program
• Incorporated synthesis methodology in a general
logic synthesis environment (Berkeley SIS package).
• Trials on wide range of circuits
– randomly generated
– benchmarks
– industrial designs.
• Consistently successful at finding superior cyclic
solutions.
Benchmark Circuits
Circuit   # Inputs   # Outputs   Berkeley Simplify Caltech Cyclify Improvement
dc1            4          7             39               34           12.80%
ex6            8        11              85               76           10.60%
p82            5        14             104               90           13.50%
t4           12           8            109               89           18.30%
bbsse         11        11             118              106           10.20%
sse           11        11             118              106           10.20%
5xp1           7        10             123              109           11.40%
s386          11        11             131              113           13.70%
dk17         10         11             160              136           15.00%
apla         10         12             185              131           29.20%
tms            8        16             185              158           14.60%
cse           11        11             212              177           16.50%
clip           9          5            213              189           11.30%
m2             8        16             231              207           10.40%
s510         25         13             260              227           12.70%
t1           21         23             273              206           24.50%
ex1          13         24             309              276           10.70%
exp            8        18             320              262           18.10%

Cost (literals in factored form) of Berkeley SIS Simplify vs. Cyclify
Benchmarks

Example: EXP circuit

cost measured by the literal count in
the substitute/minimize phase

Acyclic Solution (Berkeley SIS):
cost 320

Cyclic Solution (Caltech CYCLIFY):
cost 262
Discussion

• A new definition for the term “combinational circuit”:
a directed, possibly cyclic, collection of logic gates.

• Most circuits can be optimized with feedback.

• Optimizations are significant.
Current Work

• Implement more sophisticated search heuristics (e.g.,
simulated annealing).
• Extend ideas to a decomposition and technology
mapping phases of synthesis.
• Address optimization of circuits for delay with feedback.
Future Directions
Structured Network Representations

inputs        data structure           outputs

databases, biological systems,...
Binary Decision Diagrams
Graph-based Representation of Boolean Functions

a    f
• Introduced by Lee (1959).              1
• Popularized by Bryant (1986).          0
x1

• compact (functions of 50 variables)                   x2
• efficient (linear time manipluation)

x3
Widely used; has had a significant
0                   1
Binary Decision Diagrams
Graph-based Representation of Boolean Functions

x1   x2   x3   f                      a    f
0    0    0    0                1
0    0    1    0                           x1
0
0    1    0    0
0    1    1    0
1    0    0    0                                x2
1    0    1    1
1    1    0    1
1    1    1    1                      x3

BDDs generally defined as
Directed Acyclic Graphs             0                    1
Binary Decision Diagrams
Short described a cyclic structure for a BDD variant (1960).
We suggest cycles are a general phenomenon.

a   f1 a    a   f2 a   a f3 a    a f4 a     a f5 a    a   f6 a

x1          x2       x3         x1         x2         x3

0           1        0         1           0          1
Binary Decision Diagrams
Short described a cyclic structure for a BDD variant (1960).
We suggest cycles are a general phenomenon.

a   f1 a       a   f2 a   a f3 a   a f4 a   a f5 a    a   f6 a

x1             x2       x3       x1        x2         x3

0              1        0        1         0          1

x1 x2 x3
a    f1 a

0 * *      0
1 0 1      1
Binary Decision Diagrams
Short described a cyclic structure for a BDD variant (1960).
We suggest cycles are a general phenomenon.

a       f1 a        a   f2 a         a f3 a      a f4 a         a f5 a         a      f6 a

x1              x2             x3             x1            x2                x3

0               1              0             1              0                 1

a        f1  x1 ( x2  x3 ) a    f 2  x2  x1 x3 a       f 3  x3 ( x1  x2 )
a        f 4  x1  x2 x3   a     f 5  x2 ( x1  x3 ) a   f 6  x3  x1 x2
Binary Decision Diagrams
Short described a cyclic structure for a BDD variant (1960).
We suggest cycles are a general phenomenon.

a   f1 a    a   f2 a   a f3 a    a f4 a     a f5 a    a   f6 a

x1          x2       x3         x1         x2         x3

0           1        0         1           0          1

Future research awaits...

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