EE 319K - Introduction To Microcontrollers by xSo9LLp

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									EE 319K – Introduction to
  Embedded Systems



   EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   1
          Today’s Agenda
• QUIZ 2 – Friday, 7/27
• Analog to Digital Conversion




         EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   2
Analog To Digital
  Conversion



EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   3
Sample-And-Hold Circuit




 Analog Input (AI) is sampled when the switch is closed
 and its value is held on the capacitor where it becomes
 the Analog Output (AO)




     EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   4
  Analog to Digital Converter - ADC
• Successive Approximation
  ADC
   – VIN is approximated as a static                                        end of conversion
     value in the sample and hold
     circuit
   – the successive approximation
     register is a counter that
     increments each clock as long
     as it is enabled by the
     comparator
   – the output of the SAR is fed to
     a DAC that generates a
     voltage for comparison with
     VIN
   – when the ouput of the DAC =
     VIN the value of SAR is the
     digital representation of VIN
               EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu              5
R-2R Resistor Ladder


              D            C             B
 E                                                        A




 EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   6
      R-2R Resistor Ladder
            Analysis
• Assume that the voltage for each bit (bi) is
  either 0 or 1V.
  – At point A, the voltage will be one half b0
    considering the 2R-2R voltage divider
  – The Thevenin equivalent circuit is a voltage
    source having the value b0/2 in series with a
    resistor, R (2R||2R)
  – This voltage is applied through a series
    resistor R to point B

          EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   7
Digital To Analog Conversion




          R-2R Network


   EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   8
Analog to Digital Converter




    EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   9
                                    Cortex M3                    Systick
                                 System Bus Interface            NVIC

                  GPIO Port A                           GPIO Port B
   PA7/I2C1SDA
   PA6/I2C1SCL            I2C1                                             PB7/TSRT
                                                     Analog                PB6/C0+
     PA5/SSI0Tx                                                            PB5/C1-
     PA4/SSI0Rx                                PF4 Comparator
                          SSI0                                             PB4/C0-
    PA3/SSI0Fss                                                            PB3/I2C0SDA
    PA2/SSI0Clk                                          I2C0              PB2/I2C0SCL
      PA1/U0Tx                                 PF6                         PB1/CCP2
      PA0/U0Rx           UART0
                                                         Timer0            PB0/CCP0
                  GPIO Port C                           GPIO Port D
        PC7/C2-          Analog                                            PD3/U1Tx
       PC6/C2+                                          UART1              PD2/U1Rx
       PC5/C1+
                       Comparator
                                                                           PD1/PWM1
      PC4/PHA0                                                             PD0/IDX0
  PC3/TDO/SWO                       PB7
       PC2/TDI                                          GPIO Port F        PF7
PC1/TMS/SWDIO
                          JTAG
                                                                           PF6/CCP1
PC0/TCK/SWCLK                                                              PF5
                  GPIO Port E                  PH3                         PF4/C0o
                                                        PWM2               PF3/PWM5
     PE3/SSI1Tx                                                            PF2/PWM4
     PE2/SSI1Rx                                PC4               PD0
                          SSI1                          QEI0               PF1/IDX1
    PE1/SSI1Fss                                                            PF0/PHB0
    PE0/SSI1Clk                                         GPIO Port G
                  GPIO Port H                                    PF1
      PH3/Fault                                         QEI1               PG7/PHB1
           PH2                                                             PG6/PHA1
                                               PB1
     PH1/PWM3            PWM1                                              PG5
     PH0/PWM2                                           Timer1             PG4/CCP3
         ADC7                                  PH3               PD1       PG3
         ADC6                                           PWM0               PG2/PWM0
         ADC5             ADC
                                                                           PG1/U2Tx
         ADC4                                           UART2              PG0/U2Rx
         ADC3                                           Timer2
         ADC2
         ADC1                                           Timer3
         ADC0
                                            Peripheral Bus


    EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu                           10
Analog to Digital Converter - ADC




     LM3S1968 Analog to Digital Converter

      EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   11
    Analog to Digital Converter - ADC
•   Eight analog input channels
•   Single-ended and differential-input configurations
•   On-chip internal temperature sensor
•   Sample rate of one million samples/second
•   Flexible, configurable analog-to-digital conversion
•   Four programmable sample conversion sequences from one to eight entries
    long, with corresponding conversion result FIFOs
•   Flexible trigger control
     –   Controller (software)
     –   Timers
     –   Analog Comparators
     –   PWM
     –   GPIO
•   Hardware averaging of up to 64 samples for improved accuracy
•   Converter uses an internal 3-V reference

                    EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   12
 Analog to Digital Converter - ADC

• Sampling Range/Resolution
  – 3V internal reference voltage
  – 0x000 at 0 V input
  – 0x3FF at 3 V
  – resolution = range/precision
                 = 3V/1024 alternatives = 0.00293V




          EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   13
   Nyquist Sampling Theorem
• A bandlimited analog signal that has been sampled can be perfectly
  reconstructed from an infinite sequence of samples if the sampling
  rate exceeds 2B samples per second, where B is the highest
  frequency in the original signal.
    – Harry Nyquist
• Valvano Postulate: If fmax is the largest frequency
  component of the analog signal, then you must sample
  more than ten times fmax in order for the reconstructed
  digital samples to look like the original signal when
  plotted on a voltage versus time graph.


              EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   14
            Sampling
                                             100 Hz signal sampled at
                                             1600 Hz




                                                100 Hz signal sampled at
                                                1600 Hz




EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu        15
            Sampling
                                             800 Hz signal sampled at
                                             1600 Hz




                                              1500 Hz signal sampled at
                                              1600 Hz




EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu        16
            Sampling




  A signal with DC, 100 Hz and 400 Hz is sampled
  at 1600 Hz


EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   17
 Analog to Digital Converter - ADC

• Transducer – A device actuated by power
  from one system that supplies power in
  the same or other form to another system.




         EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   18
   Data Acquisition System
• Hardware                             • Software
  – Transducer                         • ADC device driver
                                       • Timer routines
  – Electronics
                                            – Output compare
  – ADC                                       interrupts
                                       • LCD driver
                                       • Measurement system
                                            – How fast to update
                                            – Fixed-point number
                                              system
                                            – Algorithm to convert
                                              ADC into position
          EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   19
Data Acquisition System




Transducer – position to voltage



       EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   20
 Data Acquisition System




Data Flow Graph

         EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   21
Data Acquisition System




Call Graph
       EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   22
  Analog-to-Digital Converter
          Precision
• Observable x(t) is sensed via transducer
  as signal y(t)
  – assume a relation, y = f(x)
  – range of x is rx and range of y is ry
  – precision of x and y is nx and ny respectively
  – resolution of x and y is Dx and Dy respectively
     • and Dx = rx/nx


           EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   23
  Analog-to-Digital Converter Precision
• The output of the transducer is related to the
  input such that:
  – Dy = min{f(x + Dx) – f(x)} for all x in rx
  – and ny = ry/Dy
• Consider y = x2 with 0  x  1
  – then 0  y  1
• If Dx = 0.01, Dx = rx/nx = 1/0.01 = 100
  – log2(100) ~ 7 bits
 Dy = min{(x + 0.01)2 – x2} = 0.0001
  – ny = ry/Dy = 1/10-4 = 104;
  – log2(104) ~ 15 bits

            EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   24
                     Time Jitter
• Definition of time-jitter, δt:
  – Let nΔt be the time a task is scheduled to be
    run and tn the time the task is actually run
  – thenδtn= tn – nΔt
• Real time systems with periodic tasks,
  must have an upper bound, k, on the time-
  jitter
  – -k ≤ δtn ≤ +k for all n
           EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   25
            Delayed Service
• Consequences
  – Nyquist’s theorem no longer holds
     • requires constant sampling interval
  – data acquisition and control systems operate
    using incorrect calculated values
     • consider derivative dx/dt = ((x(t)-x(t-Δt))/Δt
  – errors in signal generation
     • the sound is distorted
     • the picture is blurry

           EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   26
    Measurement Resolution
• Limiting factors
  – Transducer noise
  – Electrical noise
  – ADC precision
  – Software errors




          EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   27
     Measurement Accuracy
• Limiting factors
  – Resolution
  – Calibration
  – Transducer stability




          EE 319K - Summer 2012 - Bill Bard - w.bard@mail.utexas.edu   28

								
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