# University of Bridgeport by 5IB3dq2k

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```									                                         University of Bridgeport
Department of Computer Science and Engineering

CpE 315
Digital Systems Design II - Handout #2

Combinational logic example - design of a 2-bit multiplier

TRUTH TABLE

A   B    C   D      W   X    Y   Z
0   0    0   0      0   0    0   0                    A
0   0    0   1      0   0    0   0                    B                                      W
0   0    1   0      0   0    0   0                                      2-bit                X
0   0    1   1      0   0    0   0                                    multiplier             Y
0   1    0   0      0   0    0   0                    C                                      Z
0   1    0   1      0   0    0   1                    D
0   1    1   0      0   0    1   0
0   1    1   1      0   0    1   1
1   0    0   0      0   0    0   0
1   0    0   1      0   0    1   0                             Using K-maps:
1   0    1   0      0   1    0   0                                                    _     _
1   0    1   1      0   1    1   0                             W = ABCD          X = ABC + ACD
1   1    0   0      0   0    0   0                                 _       _    _      _
1   1    0   1      0   0    1   1                             Y = ABC + BCD + ACD + ABD
1   1    1   0      0   1    1   0
1   1    1   1      1   0    0   1                             Z = BD

Now let's use MUXes: use one for each output - can be 16 to 1, 8 to 1 or 4 to 1

Connect system data inputs to the MUX data selects and find the MUX data inputs

Can also use a decoder to implement the multiplier: here we use a 4 to 16 decoder and 4
OR shapes (one for each output) - connect system inputs to the decoder inputs

```
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