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Transceiver Architectures

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					    TRANSCEIVER ARCHITECTURES
• General Consideration
• Receiver Architectures
  • Super-heterodyne
  • Homodyne
  • Low IF
• Transmitter Architectures
  • Direct Conversion
  • Two Step
      GENERAL CONSIDERATION

• Adjacent channel reject
         GENERAL CONSIDERATION

• nonlinearity and spurious respone
     GENERAL CONSIDERATION

• Dynamic range design
 • AGC (for large signal)
 • Isolation between TX and
   RX(for small signal)
• PA design
 • noise immunity and supply
   reject
     RECEIVER ARCHITECTURES

• Super-heterodyne Receiver
 • easy to design
 • problem of image
 • problem of half if
           PROBLEM OF IMAGE

• Need image rejection filter
• Choose a suitable IF (high is good)
          PROBLEM OF IMAGE

• How about the IF frequency?
           PROBLEM OF HALF IF

• Second harmonic problem

  ( win  wLo )  2wLo  wIF
 win  wLo         win  wLo wIF
            wLo           
     2                 2      2
            HOMODYNE RECEIVERS

•   Easy to single chip
•   Channel Selection
•   DC offsets
•   I/Q Mismatch
•   Even-Order Distortion
•   Flick Noise
    • choose a suitable code
• LO Leakage
         CHANNEL SELECTION

• Different placement of three block
                 DC OFFSETS

• Self-mixing problem
I/Q MISMATCH


      X in (t )  a cos wc t  b sin wc t
                                       
      X LO , I (t )  2(1  ) cos(wc t  )
                            2            2
                                       
      X LO , I (t )  2(1  ) sin(wc t  )
                           2            2
                                            
      X BB. I (t )  a(1  ) cos  b(1  ) sin
                           2      2        2   2
                                              
      X BB. I (t )  a (1  ) sin  b(1  ) cos
                              2     2        2   2
EVEN-ORDER DISTORTION
           LOW-IF RECEIVERS

• Possible way to implant digital IF
• Low-IF cause image reject problem
                DIGITAL IF

• Subsampling Receivers
          IMAGE REJECT FILTER

• Hartley Architecture
HARTLEY ARCHITECTURE
         IMAGE REJECT FILTER

• Weaver Architecture
WEAVER ARCHITECTURE
  TRANSMITTER ARCHITECTURES

• Direct-Conversion Transmitters
  TRANSMITTER ARCHITECTURES

• Two-Step Transmitters

				
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posted:9/5/2012
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Description: Easy to single chip Channel Selection DC offsets I/Q Mismatch Even-Order Distortion Flick Noise choose a suitable code LO Leakage