Mohammed Mansoor Ali
We would like to create a bioengineering project that is useful for people on a daily level.
The project will attack a problem that has been experienced by virtually everyone in the
world: a lack of refreshment from sleep. Creating a clock that keeps into account that a
person is not being woken up when he/she is not in his/her REM sleep will help people feel
fresher upon waking up. Being college students in electrical engineering, we know and face
this problem quite often. Finding a solution is not only a good challenge for us to prove what
we have learned in our time at the University of Illinois, but it is a great tool to leave behind
for students to help them in their college life.
The brain goes through several ninety minute cycles every night while a person is sleeping.
This cycle consists of four non-REM stages and one REM (rapid eye movement) stage.
Throughout the night the subject will pass through the cycle described in sequence stage 1-2-
3-4-3-2-REM. REM sleep is important for memory processing and proper brain function,
however if somebody wakes up in this stage they will feel groggy; to feel most refreshed, a
person must wake up in the stage 2 part of the sleep cycle. The alarm clock will detect stage
2 brain waves using EEG sensors and wake a person up to the closest deviation from the time
they want to wake up, keeping in mind that the person only wakes up during stage 2 of the
sleep cycle. This way the person will feel relaxed and fresh when they wake up.
Stages of Sleep:
Stage 1: Stage 1 sleep is characterized by awake-like frequency of alpha waves. Alpha waves
have a frequency range of 8-13 Hz. Stage 1, also sees a transition from these waves to theta
waves, with a frequency of 4-7Hz. During this stage, the person loses muscle tone, feels
drowsy, and awareness of the external environment. Although the alpha waves are
characterized for the person in a "light sleep" and would be perfect time to wake a person up,
it is often skipped in most sleep cycles in a person due to body's natural way of acquiring the
deepest sleep. Therefore, it is in the best interest to ignore this stage for the alarm clock
Stage 2: Stage 2 sleep is associated with sleep spindles (12-16 Hz) and K-complexes, which
are special patterns only found in this stage that last for about 0.5 to 1.5 seconds and occur
occasionally. It occupies a total of 50% of total sleep. During this stage, a person lowers their
muscular activity and consciousness to the environment. Stage 2 is the perfect time to wake a
person up, because the person is still in the "light sleep" and stage 2 occurs throughout the
Stage 3: Stage 3 waves have a frequency of 0.5- 4 Hz and facilitate the transition to stage 4.
Stage 4: Stage 4 has delta waves and is considered "deep sleep" along with stage 3.
Stage 3, stage 4 and REM stage are the stages the clock will avoid waking a person up,
because they are in "deep sleep".
(Frequency pattern observed at various stages of the sleep
cycle, Medical Instrumentation by John Webster).
To create this clock, it will be required to use instrumentation
amplifiers and filters to isolate the brain wave signal and
convert the analog signal to digital to find the brain wave
activity and send a signal to the alarm whenever the person is
supposed to be woken up. The benefits of this device to the
Wake up more refreshed.
More productive throughout the day.
Take a REM nap.
Not disturbed from the most important time of the
Since the signal strength of brain waves is in the micro Volt range, typically 1-10 microvolt, amplification is
one of the biggest challenges faced in this project. The goal is to get the desired signal to be at about 100mV
- 1V range. For this reason a total gain of roughly 100,000 is necessary. Analog Devices' AD8221
instrumentation amplifier was chosen for this purpose. This amplifier can provide a gain of upto 1000, thus 2
amplifiers will be cascaded together to achieve the necessary 100,000 gain. This particular amplifier was a
good choice because of its low noise level, of only .25 microvolt peak to peak, and with a particular circuit
option (shown in page 20 of the AD8221 datasheet) using an integrator setup to reduce the noise to nano volt
range if needed. The amplifier performs with a single resistor to determine the gain, using the relationship:
R = 49.4KOhm / (G - 1)
For a single stage gain of 316 (316*316 ~100,000)
R = 49.4KOhm/ (316-1) = 156.8 Ohms
Using the above resistance value, 2 amplifiers are cascaded together. For decoupling, 1 microfarad bypass
capacitors are connected to the power supplies of both amplifiers and the capacitance may need to be
increased if the capacitor were to be placed farther away from the amplifiers. The schematic below shows the
circuit with proper component values, with V1 representing the input to the amplifier circuit.
A general gain profile, as obtained from the datasheet, below plots the gain values at varying frequencies.
Clearly, the amplifier is able to perform well for low frequency applications.
(Analog Devices, datasheet for AD8221)
This amplifier also provides a very high common mode rejection ratio, which should help cancel out any
external (i.e. 60 Hz) noise, as long as both of the differential input leads are placed close to each other.
The amplifier is also to be used as a filter in a way. The electrodes will also pickup some muscle artifacts,
usually in the milliVolt range. Their frequency can vary, and many of them will be outside our frequency
range and will be filtered out. But for any artifacts that occur within the frequency range of interest, they will
be amplified. Since muscle artifacts appear to be random bursts, and not a continuous phenomenon, any such
burst causing distorted signal will just be ignored. Essentially, a milliVolt range signal with a 100,000 gain
will get clipped off since the power supply of 5 Vdc cannot achieve an output signal of 100V, thus clipping
the signal off, and essentially destroying it. These destroyed signal bursts can be picked up at the DSP end,
and be ignored. Since any state of a sleep cycle lasts for several minutes, only the good available data will be
analyzed to determine the frequency information and proper sleep stage.
A low pass filter is used to attenuate the frequency artifacts from power lines, muscle frequency and other
noise. A simple low pass filter with a cut-off frequency of 50 Hz can be used to attenuate higher frequency
components. Time can be invested in finding a higher order filter or a Butterworth filter with a better
attenuation. A schematic of the circuit layout and its frequency output is shown below.
f = 1/ (2*pi*R*C). Taking C = 1 microfarad, R = 3183 ohms for a frequency of 50 Hz.
Our DSP algorithm for stage II recognition is outlined below. The DSP samples the analog signal at a
frequency of 48 kHz, which is extreme considering the content of our signal lies within the range of 12-16
Hz. With this sampling rate the bandwidth of the relevant signal and placement in the digital frequency
domain would be so small that filtering it would be an exceptional challenge. As a solution we have decided
to down sample the data to make the filtering process more effective and less costly from a memory
standpoint. It is necessary to first run the raw signal into a low pass filter before each down sampling so that
no high frequency noise gets aliased into the relevant signal.
Once we have the correct signal isolated, the next step is to derive a control signal to send to and operate the
alarm clock. To achieve this, a mean of the past N amount of samples would be taken and thresholded into a
digital 1 or 0 as a representation of whether we are in the correct sleep stage.
The challenge for the filter design is to create a filter that could easily discriminate the 12-16 Hz content of
stage II sleep from the spectra of the other stages (which is quite similar). For this characteristic it is
necessary for the filter to have a very short transition bad, yet considering how the signal is being used in the
end (to calculate a mean), the phase and ripple effects are much less important. In light of this an IIR filter
would be used as it could fulfill all of these requirements with a minimal amount of filter coefficients.
These coefficients where determined using the MATLAB 'ellip.m' function which figures Elliptic IIR filter
coefficients based on a desired passband. The filters desribed below have all been designed with 10 filter
This is a pre-filter that is used to create an effective bandwidth before down sampling. The assumed sampling
frequency for this filter is 48 kHz, which is equal to the sampling frequency of the DSP and readily
changeable if this rate changes. The passband is from 0 - .05*pi in digital frequency.
This filter is applied after the first down sampling (20x), again to create an effective bandwidth for the signal
before down sampling again. Due to the down sampling the new effective sampling rate is 2.4 kHz. This
filter's passband is from 0-.10*pi in digital frequency.
This third filter is applied assuming that the data has been down sampled twice by a factor of 20 xs, thus
making the sampling rate 120 Hz. At this point there may be some aliasing artifact coming from the 60 Hz
noise but this will have no effect on our signal as the artifact will only occur at higher digital frequencies and
will eventually be filtered out by this third filter. This filter will pass all of the signal content from 12-16 Hz
and reduce all other content by a factor of 20 dB. This filter's passband is from .2*pi-.267*pi in digital
Figure 1. Basic flow of our design.
Analog Amplifiers: Incorporate EEG sensors to detect brain wave activity during sleep and amplify
the signal using good amplifiers, also apply filtering on inputs to the amplifier.
DSP component: It converts the signal from analog to digital to evaluate the signal
Alarm clock: It will take the input from the DSP component and ring at the required time. The alarm
clock will incorporate a logic which will be a time saving feature so that it will wake the person up in his/her
stage I/II sleep closest to their desired time.
Performance Requirement: This device should work within 5 feet of the band if we incorporate a wireless
transmission of the signal, otherwise this device will work within the range of the electrodes. It will also save
power by turning on the circuit, other than the clock, a sleep cycle before the desired time. The most
important requirement for this project is to successfully detect brain wave activity during stage I/II and
control of the alarm clock to wake the person up.
The first phase of testing would be to test all the individual parts. For example, testing the sensors by
inputting a known signal using a function generator, and monitoring the sensor output to see if the desired
signal is reproduced. Final test would require the sensors to be placed on the test subject and the signal
monitored using the oscilloscope.
The amplifier circuit will first be tested with known signals to see the amplification. The brain wave signals
are in the microvolt range, and would need to be amplified to around 100mV to a 1 V. Amplifiers are critical
to this project, and would need to achieve the minimum voltage for the signal to be processed by DSP
without errors. Thus there is a tolerance for the amplifier circuit, which must be a 100 mV or greater. This
will be tested with known generated signals between 1-40 Hz, since that is the range of brain wave signals. It
will also be test for varying amplitudes between 1-10 microvolt. The final test will be using the EEG sensors
on a person, and would be required to meet these specifications.
The amplified circuit will also need to be filtered so the noise outside of the 1-40Hz range is
attenuated as much as possible. The digital filter algorithm and coefficients will first be designed and tested
using MATLab software to determine an appropriate frequency response. The implementation of the filter
will be tested by using a function generator to input test signals into the DSP and checking to see if we get
the appropriate output. DSP will process the signal to determine the frequency information, which allows the
alarm to trigger at the right time. The final test will be with the real brainwave signals which can be
monitored simultaneously on a spectrum analyzer to make sure DSPs results are confirmed by the spectrum
A final test will be performed which will incorporate all the blocks and will be used predominantly on
a person going through 2 sleep cycles, if stage 2 pattern is recognized twice, it will show that the device is
working at least logically. An addendum would be to have a sample population to test the person device and
make a qualitative analysis of their sleep over a week with and without the alarm clock.
V. Cost and Schedule
Item Comment Cost
Salary 12 hours/week, 14 weeks, $40 $20160
DSP/PIC/TI-54x (provided) $20
Instrumentation Amplifier x3 $12
Solderable Circuit Board $10
Alarm Implentation $20
Vaibhav Mansoor Ali Bob Cvengros
February 4 – 10 Proposal Proposal Proposal
February 11 – 17 Research wireless to Research EEG sensors Research DSP vs. PIC
determine if it is an and amplifiers. boards
Design review Design review
February 18 – 24 Finish amplifier and Finish amplifier and MATLab simulation of
(Design Review) filter design. filter design DSP algorithm and
February 25 – Order parts and start Order parts and start Begin to write
March 3 building the EEG building the EEG implementation code in
component. component. C
March 4 – 10 Incorporate EEG Start building the basic Research architecture of
component with alarm clock. PIC/DSP and optimize
amplifiers. implemetentation of
filter in ASM
March 11 – 17 Finalize the EEG and Finish the alarm clock Finish the DSP and
Amplifiers block. block. Alarm clock blocks.
March 18 – 24 SPRING BREAK SPRING BREAK SPRING BREAK
March 25 – 31 Prepare for mock up Prepare for mock up Prepare for mock up
(Mock-up Demo) demo. demo. demo.
April 1 – 7 Start process for Start process for Start process for
integration of all design integration of all design integration of all design
components components components
April 8 – 14 Test the transmission Test the transmission Incorporate wireless
of EEG waves using of EEG waves using input to the DSP
wireless transmission wireless transmission component
April 15 – 21 Testing and fine-tuning Testing and fine-tuning Testing and fine-tuning
(Demo and of the integrated system of the integrated system of the integrated system
April 22 – 28 Prepare for Prepare for Prepare for
presentation presentation presentation
April 29 – Prepare final report Prepare final report Prepare final report