PCB Layout Issues by ewghwehws

VIEWS: 3 PAGES: 11

									Some PCB Layout Issues




           1
         Ground Bounce




500 mV

 GND




               2
             VCCI Noise

500 mV/DIV




                  3
             VCCA Noise



500 mV/DIV




                  4
             AD Bus Signal Quality




500 mV/DIV




                       5
VCCA/VCCI Noise Measurements




             6
Original layout pattern for an FPGA
     implementing a PCI core.




                  7
Original layout pattern for an FPGA
     implementing a PCI core.




                      Note:
                      • Small trace width for
                        these array power
                        connections.
                      • Via "islands" separating
                        cap from FPGA


                  8
VCCA Plane




     9
New FPGA Cap Layout




         10
New FPGA Cap Layout




         11

								
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