EE462L_PI_Controller_PPT
Document Sample


EE462L, Spring 2012
PI Voltage Controller for DC-DC
Boost Converter
1
PI Controller for DC-DC Boost Converter Output
Voltage
!
Vpwm PWM mod. DC-DC Vout
(0-3.5V) and MOSFET conv. (0-120V)
driver
Open Loop, DC-DC Converter Process
error Vpwm Hold to 90V
PI PWM mod. DC -DC
Vset controller and MOSFET conv. Vout
+ driver
–
(scaled down
to about 1.3V)
DC-DC Converter Process with Closed-Loop PI Controller
2
The Underlying Theory
Vout ( s ) G ( s)
Vset ( s ) 1 G ( s )
error Vpwm Hold to 90V
PI PWM mod. DC -DC
Vset controller and MOSFET conv. Vout
+ driver
–
(scaled down
to about 1.3V)
G ( s) G PI ( s) G PWM ( s) G DC DC ( s)
1 1
G PI ( s ) K P Gconv ( s) G PWM G DC DC ( s)
sTi 1 sT
Proportional Integral Our existing boost process 3
Theory, cont. !
error e(t) Vpwm
PI PWM mod. DC -DC
Vset controller and MOSFET conv. Vout
+ driver
–
1
VPWM (t ) K P e(t )
Ti e(t )dt
• Proportional term: Immediate correction but steady state error (Vpwm equals
zero when there is no error (that is when Vset = Vout)).
• Integral term: Gradual correction
Consider the integral as a continuous sum (Riemman’s sum)
Thank you to the sum action, Vpwm is not zero when the e = 0
4
Ti Ri Ci Theory, cont.
Response of Second Order System
1 1 (zeta = 0.99, 0.8, 0.6, 0.4, 0.2, 0.1)
G( s) K P
sTi 1 sT
0.1
1.8
1.6 0.2
Vout ( s ) G ( s)
1.4
0.4
Vset ( s ) 1 G ( s ) 1.2
1
0.8
work! KP 1
s
0.6
Ti K P
0.99
Vout ( s)
T 0.4
0.2
Vset ( s) 1 K p 1
s s
2
T TT
0
0 2 4 6 8 10
i
Recommended in PI
Ti 0.8T literature
s 2 2 n s n
2
1 K p 0.65 K p 0.45
1
n
2
2 n
TTi T From above curve – gives some
overshoot
2T T
K p 2 nT 1 1 2 1 5
TTi Ti
Improperly Tuned PI Controller
Mostly Proportional Control – Sluggish,
Mostly Integral Control - Oscillation Steady-State Error
90V 90V
Figure 11. Closed Loop Response with Mostly Integral Control Figure 12. Closed Loop Response with Mostly Proportional Control
(ringing) (sluggish)
6
!
Op Amps
I−
V− –
Vout
I+
V+ +
Assumptions for ideal op amp
Vout = K(V+ − V− ), K large (hundreds of thousands, or one million)
I+ = I− = 0
Voltages are with respect to power supply ground (not shown)
Output current is not limited
7
!
Example 1. Buffer Amplifier
(converts high impedance signal to low impedance signal)
Vout K (V+ V− ) = K(Vin – Vout)
–
Vout
Vin + Vout KVout KVin
Vout (1 K ) KVin
K
Vout Vin
1 K
K is large
Vout Vin
8
!
Example 2. Inverting Amplifier
(used for proportional control signal)
Rf V
Vout K (0 V ) KV , so V out .
Rin K
Vin – V Vin V Vout
Vout KCL at the – node is 0.
+ Rin Rf
Eliminating V yields
V V
out Vin out Vout
K K 0 , so
Rin Rf
1 1 1 Vin Vout Vin Rf
Vout . For large K, then , so Vout Vin .
KRin KR f R f Rin Rf Rin Rin
9
Example 3. Inverting Difference
!
(used for error signal)
V
R R Vout K (V V ) K b V , so
Va 2
– V V
Vout V b out .
R + 2 K
V Va V Vout
Vb
KCL at the – node is 0 , so
R R R
V Vout
V Va V Vout 0 , yielding V a .
2
Eliminating V yields
V V Vout V V Va K V Va
Vout K b a , so Vout K out K b , or Vout 1 K b .
2 2 2 2 2 2
For large K , then Vout ( a Vb )
V
10
!
Example 4. Inverting Sum
(used to sum proportional and integral control signals)
Vout
R Vout K (0 V ) KV , so V .
K
R
Va –
R Vout KCL at the – node is
Vb +
V Va V Vb V Vout
0 , so
R R R
3V Va Vb Vout .
V 3
Substituting for V yields 3 out Va Vb Vout , so Vout 1 Va Vb .
K K
Thus, for large K , Vout ( a Vb )
V
11
Example 5. Inverting Integrator !
(used for integral control signal)
~ ~
Using phasor analysis, Vout K (0 V ) , so
Ci ~
~ Vout
Ri
V . KCL at the − node is
Vin – K
Vout
+ ~ ~ ~ ~
V Vin V Vout
0.
Ri 1
jC
~
Vout ~
Vin ~
Vout ~
~ j C
K Vout 0 . Gathering terms yields
Eliminating V yields K
Ri
~
~ 1 1 Vin ~ 1 1 ~
Vout
KR j C 1
, or Vout
jRi C 1 Vin For large K , the
i K Ri K K
~
Vin
expression reduces to Vout ( jRi C ) Vin , so Vout
~ ~ ~
(thus, negative integrator action).
jRi C
~
For a given frequency and fixed C , increasing Ri reduces the magnitude of Vout .
12
Op Amp Implementation of PI Controller
Signal flow
– error Rp
αVout
+
–
–
+ 15kΩ – Vpwm
– +
Difference +
Vset
+ (Gain = −1) Proportional
Summer
(Gain = −Kp)
(Gain = −1
1)
Buffers
(Gain = 1)
Ci
Ri
Ri is a 500kΩ pot, Rp is a 100kΩ pot, and all other
–
resistors shown are 100kΩ, except for the 15kΩ
resistor. +
Inverting Integrator
The 500kΩ pot is marked “504” meaning 50 • 10 4 . (Time Constant = Ti)
The 100kΩ pot is marked “104” meaning 10 • 10 4 .
(Note – net gain Kp is unity when, in the open loop condition and with the integrator disabled,
Vpwm is at the desired value)
13
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