External & internal Interrupts
• There are 21 different interrupts and each one has its own vector
located in a predefined location at the start of the memory space.
• 3 external interrupts (INT0, INT1 and INT2) are available at pins
PD2(pin 16) and PD3 (pin 17) and PB2 (pin 3). They are Edge or
Level triggered interrupts (except Int2 which is only edge
• Reset input (pin 9) which causes also an interrupt and can be
both externally and internally initiated.
• If enabled, the interrupts will trigger even if the INT0 and INT1
pins are configured as outputs. This feature provides a way of
generating a software interrupt (how?).
• INT0, INT1 (level) and INT2 are detected asynchronously (no
Clock needed and thus they can be used to get the µC from sleep
Reset and Interrupt Vectors
Vector Program Source Interrupt Definition
1 $000 RESET External Reset
Reset, and JTAG
2 $002 INT0 External Interrupt Request 0
3 $004 INT1 External Interrupt Request 1
4 $006 TIMER2 COMP Timer-Counter2 Compare Match
5 $008 TIMER2 OVF Timer-Counter2 Overflow
6 $00A TIMER1 CAPT Timer-Counter1 Capture Event
7 $00C TIMER1 COMPA Timer-Counter1 Compare Match A
8 $00E TIMER1 COMPB Timer-Counter1 Compare Match B
9 $010 TIMER1 OVF Timer-Counter1 Overflow
Vecto Program Source Interrupt Definition
r No. Address
10 $012 TIMER0 OVF Timer-Counter0 Overflow
11 $014 SPI, STC Serial Transfer Complete
12 $016 USART, RXC USART, Rx Complete
13 $018 USART, UDRE USART Data Register Empty
14 $01A USART, TXC USART, Tx Complete
15 $01C ADC ADC Conversion Complete
16 $01E EE_RDY EEPROM Ready
17 $020 ANA_COMP Analog Comparator
18 $022 TWI Two-wire Serial Interface
19 $024 INT2 External Interrupt Request 2
20 $026 TIMER0 COMP Timer-Counter0 Compare Match
21 $028 SPM_RDY Store Program Memory Ready
Notes to interrupt vector table
• If the program never enables an interrupt source, the Interrupt
Vectors are not used, and regular program code can be placed at
• To enable INT0/INT1/INT2:
The I-bit in the Status Register must be set. But also the
corresponding External Interrupt Request Enable bit in the General
Interrupt Control Register (GICR)
• When an event on the INT0/INT1/INT2 pin triggers an interrupt
request, INT0-Flag/INT1-Flag/INT2-Flag (bit 6/7/5 of the General
Interrupt Flag Register – GIFR) becomes set. The flag is cleared
when the interrupt routine is executed. Alternatively, the flag can
be cleared by writing a logical one to it.
General Interrupt Flag
The external interrupts INT0/INT1 can be triggered by a falling or
rising edge or a low level.
The external interrupts INT2 can only be triggered by a falling
or rising edge.
ISC2 (interrupt sense control of INT2):
ISC2 = 0 -> Falling Edge
ISC2 = 1 -> Rising Edge
MCU Control and Status Register
Using Interrupts in C
The access to the AVR interrupt system is implemented with the
interrupt  void external_int0(void)
/* Place your code here */
interrupt  void timer0_overflow(void)
/* Place your code here */
Using Interrupts in C (Contd.)
•Interrupt vector numbers start with 1.
•The compiler will automatically save the affected registers when calling
the interrupt functions and restore them back on exit.
•a RETI assembly instruction is placed at the end of the interrupt
•Interrupt functions can't return a value nor have parameters.
•You must also set the corresponding bits in the peripheral control
registers to configure the interrupt system and enable the interrupts.
Using the CodeVisionAVR Wizard by interrupts
Including Assembly Lines in the Program
You can include assembly language anywhere in your program using the #asm
and #endasm directives.
void delay(unsigned char i)
/* Assembly language code sequence */
Inline assembly may also be used.
#asm("sei") /* enable interrupts */