Digital Signal Processing With Altera FPGAs
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When Worlds Collide: Embedded Systems in FPGAs
Joel A. Seely
Altera Corporation
Introduction
Hardware and software design are merging. With the density and complexity of FPGAs
increasing, FPGAs are becoming more attractive for implementing embedded systems.
But as these two worlds collide, more sophisticated tools are needed to assist embedded
designers in developing hardware/software co-designs in FPGAs. Altera’s SOPC Builder
is just such a tool. The large quantity of SOPC Builder ready IP, including the Nios
Processor, memory interfaces, communications peripherals, etc. allows embedded
systems designers flexibility to design systems that meet their performance needs by
using hardware or software where most appropriate to the problem they are trying to
solve.
Description
This article will cover the issues that hardware and software designers face when
developing high-performance embedded systems. With FPGAs used in conjunction with
embedded microprocessors, more flexibility is provided on how to solve problems.
Specifically the designer now has options to:
1. Optimize software
2. Move software into custom instructions that are part of the ALU for
microprocessors on the FPGA.
3. Use off-FPGA microprocessors interfaced with the FPGA where the
programmable logic resources are used to optimize specific high-performance
tasks.
4. Add custom peripherals to embedded systems
5. Add parallelization to the problem, taking advantage of slave-side arbitration.
Examples for each of these optimizations will be provided
Conclusion
As we enter the era of the FPGA, the power of using programmable logic in conjunction
with a processor in embedded systems is just beginning to be realized. With SOPC
Builder embedded systems designers can now architect solutions that use hardware and
software in the areas where they are most appropriate and cost effective, meeting
performance requirements and time-to-market needs.
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