Docstoc

Signals

Document Sample
Signals Powered By Docstoc
					CS 241 Section Week #10
              (10/30/08)
                           Outline
• MP5 tips
• Memory Management
  –   Fragmentation
  –   Storage Placement Algorithms
  –   malloc revisited
  –   paging
• Virtual Memory
  –   Why Virtual Memory
  –   Virtual Memory Addressing
  –   TLB (Translation Lookaside Buffer)
  –   Multilevel Page Table
  –   Inverted Page Table
MP5 tips
                                MP5 tips
1.   What system call allows you to create a child process and make it
     execute a command?
2.   Do some reading on the exec() family of library functions (man 3 exec).
3.   Include a counter that increments for each command executed
     regardless of whether the command succeeds or fails.(Careful with
     blank lines)
4.   Create a built-in 'cd' command which CHanges DIRectory in the shell
5.   Create a build-in command '!N' to re-execute the last N'th command
6.   User presses 'Ctrl-C' in Shell, instead of exiting shell, you prints the last
     9 commands

Carefully read Readme.txt for details!

Good luck!
Memory Management
                 Fragmentation
• External Fragmentation
  – Free space becomes divided into many small pieces
  – Caused over time by allocating and freeing the storage of
    different sizes


• Internal Fragmentation
  – Result of reserving space without ever using its part
  – Caused by allocating fixed size of storage
    Storage Placement Algorithms
• Best Fit
   – Produces the smallest leftover hole
   – Creates small holes that cannot be used
    Storage Placement Algorithms
• Best Fit
   – Produces the smallest leftover hole
   – Creates small holes that cannot be used
• First Fit
   – Creates average size holes
    Storage Placement Algorithms
• Best Fit
   – Produces the smallest leftover hole
   – Creates small holes that cannot be used
• First Fit
   – Creates average size holes
• Worst Fit
   – Produces the largest leftover hole
   – Difficult to run large programs
    Storage Placement Algorithms
• Best Fit
   – Produces the smallest leftover hole
   – Creates small holes that cannot be used
• First Fit
   – Creates average size holes
• Worst Fit
   – Produces the largest leftover hole
   – Difficult to run large programs
First-Fit and Best-Fit are better than Worst-Fit in
  terms of SPEED and STORAGE UTILIZATION
                     Exercise
• Consider a swapping system in which memory
  consists of the following hole sizes in memory order:
  10KB, 4KB, 20KB, 18KB, 7KB, 9KB, 12KB, and 15KB.
  Which hole is taken for successive segment requests
  of (a) 12KB, (b) 10KB, (c) 9KB for
   – First Fit?
                     Exercise
• Consider a swapping system in which memory
  consists of the following hole sizes in memory order:
  10KB, 4KB, 20KB, 18KB, 7KB, 9KB, 12KB, and 15KB.
  Which hole is taken for successive segment requests
  of (a) 12KB, (b) 10KB, (c) 9KB for
   – First Fit? 20KB, 10KB and 18KB
                     Exercise
• Consider a swapping system in which memory
  consists of the following hole sizes in memory order:
  10KB, 4KB, 20KB, 18KB, 7KB, 9KB, 12KB, and 15KB.
  Which hole is taken for successive segment requests
  of (a) 12KB, (b) 10KB, (c) 9KB for
   – First Fit? 20KB, 10KB and 18KB
   – Best Fit?
                     Exercise
• Consider a swapping system in which memory
  consists of the following hole sizes in memory order:
  10KB, 4KB, 20KB, 18KB, 7KB, 9KB, 12KB, and 15KB.
  Which hole is taken for successive segment requests
  of (a) 12KB, (b) 10KB, (c) 9KB for
   – First Fit? 20KB, 10KB and 18KB
   – Best Fit? 12KB, 10KB and 9KB
                     Exercise
• Consider a swapping system in which memory
  consists of the following hole sizes in memory order:
  10KB, 4KB, 20KB, 18KB, 7KB, 9KB, 12KB, and 15KB.
  Which hole is taken for successive segment requests
  of (a) 12KB, (b) 10KB, (c) 9KB for
   – First Fit? 20KB, 10KB and 18KB
   – Best Fit? 12KB, 10KB and 9KB
   – Worst Fit?
                     Exercise
• Consider a swapping system in which memory
  consists of the following hole sizes in memory order:
  10KB, 4KB, 20KB, 18KB, 7KB, 9KB, 12KB, and 15KB.
  Which hole is taken for successive segment requests
  of (a) 12KB, (b) 10KB, (c) 9KB for
   – First Fit? 20KB, 10KB and 18KB
   – Best Fit? 12KB, 10KB and 9KB
   – Worst Fit? 20KB, 18KB and 15KB
                   malloc Revisited
• Free storage is kept as a list of free blocks
   – Each block contains a size, a pointer to the next block, and the space
     itself
                   malloc Revisited
• Free storage is kept as a list of free blocks
   – Each block contains a size, a pointer to the next block, and the space
     itself


• When a request for space is made, the free list is scanned
  until a big-enough block can be found
   – Which storage placement algorithm is used?
                   malloc Revisited
• Free storage is kept as a list of free blocks
   – Each block contains a size, a pointer to the next block, and the space
     itself


• When a request for space is made, the free list is scanned
  until a big-enough block can be found
   – Which storage placement algorithm is used?


• If the block is found, return it and adjust the free list.
  Otherwise, another large chunk is obtained from the OS and
  linked into the free list
       malloc Revisited (continued)
typedef long Align;      /* for alignment to long */

union header {           /* block header */
  struct {
    union header *ptr;   /* next block if on free list */
    unsigned size;       /* size of this block */
  } s;
  Align x;               /* force alignment of blocks */
};

typedef union header Header;


                             points to next free block

                      size
                    Paging
• Divide memory into pages, all of equal size
  – We don’t need to assign contiguous chunks
                     Paging
• Divide memory into pages, all of equal size
  – We don’t need to assign contiguous chunks
  – Internal fragmentation can only occur on the last
    page assigned to a process
                     Paging
• Divide memory into pages, all of equal size
  – We don’t need to assign contiguous chunks
  – Internal fragmentation can only occur on the last
    page assigned to a process
  – External fragmentation cannot occur at all
Virtual Memory
             Why Virtual Memory?
• Use main memory as a Cache for the Disk
   – Address space of a process can exceed physical memory size
   – Sum of address spaces of multiple processes can exceed physical
     memory
              Why Virtual Memory?
• Use main memory as a Cache for the Disk
   – Address space of a process can exceed physical memory size
   – Sum of address spaces of multiple processes can exceed physical
     memory
• Simplify Memory Management
   – Multiple processes resident in main memory.
        • Each process with its own address space
    – Only “active” code and data is actually in memory
              Why Virtual Memory?
• Use main memory as a Cache for the Disk
   – Address space of a process can exceed physical memory size
   – Sum of address spaces of multiple processes can exceed physical
     memory
• Simplify Memory Management
   – Multiple processes resident in main memory.
        • Each process with its own address space
   – Only “active” code and data is actually in memory
• Provide Protection
   – One process can’t interfere with another.
        • because they operate in different address spaces.
    – User process cannot access privileged information
        • different sections of address spaces have different permissions.
          Principle of Locality
• Program and data references within a process
  tend to cluster
          Principle of Locality
• Program and data references within a process
  tend to cluster
• Only a few pieces of a process will be needed
  over a short period of time (active data or
  code)
          Principle of Locality
• Program and data references within a process
  tend to cluster
• Only a few pieces of a process will be needed
  over a short period of time (active data or
  code)
• Possible to make intelligent guesses about
  which pieces will be needed in the future
          Principle of Locality
• Program and data references within a process
  tend to cluster
• Only a few pieces of a process will be needed
  over a short period of time (active data or
  code)
• Possible to make intelligent guesses about
  which pieces will be needed in the future
• This suggests that virtual memory may work
  efficiently
             VM Address Translation
• Parameters
    – P = 2p = page size (bytes).
    – N = 2n = Virtual address limit
    – M = 2m = Physical address limit
 n–1                           p p–1                  0
       virtual page number              page offset           virtual address



         address translation


    m–1                    p p–1                          0
      physical page number       page offset                  physical address


Page offset bits don’t change as a result of translation
Page Table

     • Keeps track of what pages
       are in memory
Page Table

     • Keeps track of what pages
       are in memory
     • Provides a mapping from
       virtual address to physical
       address
       Handling a Page Fault
• Page fault
  – Look for an empty page in RAM
     • May need to write a page to disk and free it
       Handling a Page Fault
• Page fault
  – Look for an empty page in RAM
     • May need to write a page to disk and free it
  – Load the faulted page into that empty page
       Handling a Page Fault
• Page fault
  – Look for an empty page in RAM
     • May need to write a page to disk and free it
  – Load the faulted page into that empty page
  – Modify the page table
             Addressing
• 64MB RAM (2^26)
               Addressing
• 64MB RAM (2^26)
• 2^31 (2GB) total memory




                Virtual Address (31 bits)
               Addressing
• 64MB RAM (2^26)
• 2^31 (2GB) total memory
• 4KB page size (2^12)



                Virtual Address (31 bits)
                      Addressing
•   64MB RAM (2^26)
•   2^31 (2GB) total memory
•   4KB page size (2^12)
•   So we need 2^12 for the offset, we can use
    the remainder bits for the page

                        Virtual Address (31 bits)


          Virtual Page number (19 bits)   Page offset (12 bits)
                      Addressing
•   64MB RAM (2^26)
•   2^31 (2GB) total memory
•   4KB page size (2^12)
•   So we need 2^12 for the offset, we can use
    the remainder bits for the page
    – 19 bits, we have 2^19 pages (524288 pages)
                        Virtual Address (31 bits)


          Virtual Page number (19 bits)   Page offset (12 bits)
              Address Conversion
• That 19bit page address can be optimized in a variety of
  ways
   – Translation Look-aside Buffer
 Translation Lookaside Buffer (TLB)
• Each virtual memory reference can cause two
  physical memory accesses
  – One to fetch the page table
  – One to fetch the data
 Translation Lookaside Buffer (TLB)
• Each virtual memory reference can cause two
  physical memory accesses
  – One to fetch the page table
  – One to fetch the data
• To overcome this problem a high-speed cache
  is set up for page table entries
 Translation Lookaside Buffer (TLB)
• Each virtual memory reference can cause two
  physical memory accesses
  – One to fetch the page table
  – One to fetch the data
• To overcome this problem a high-speed cache
  is set up for page table entries
• Contains page table entries that have been
  most recently used (a cache for page table)
Translation Lookaside Buffer (TLB)
              Address Conversion
• That 19bit page address can be optimized in a variety of
  ways
   – Translation Look-aside Buffer
   – Multilevel Page Table
             Multilevel Page Tables
• Given:
   – 4KB (212) page size
   – 32-bit address space
   – 4-byte PTE
             Multilevel Page Tables
• Given:
   – 4KB (212) page size
   – 32-bit address space
   – 4-byte PTE
• Problem:
   – Would need a 4 MB page table!
       • 220 *4 bytes
              Multilevel Page Tables
• Given:
   – 4KB (212) page size
   – 32-bit address space
   – 4-byte PTE
• Problem:
   – Would need a 4 MB page table!
       • 220 *4 bytes
• Common solution
   – multi-level page tables
   – e.g., 2-level table (P6)
       • Level 1 table: 1024 entries, each
         of which points to a Level 2 page
         table.
       • Level 2 table: 1024 entries, each
         of which points to a page
Summary: Multi-level Page Tables
                  •Instead of one large table, keep a
                  tree of tables
                      –Top-level table stores pointers to
                      lower level page tables


                  •First n bits of the page number ==
                  index of the top-level page table

                  •Second n bits == index of the 2nd-
                  level page table

                  •Etc.
  Example: Two-level Page Table
• 32-bit address space (2GB)
  Example: Two-level Page Table
• 32-bit address space (2GB)

• 12-bit page offset (4kB pages)
  Example: Two-level Page Table
• 32-bit address space (2GB)

• 12-bit page offset (4kB pages)

• 20-bit page address
   – First 10 bits index the top-level page table
   – Second 10 bits index the 2nd-level page table
   – 10 bits == 1024 entries * 4 bytes == 4kB == 1 page
  Example: Two-level Page Table
• 32-bit address space (2GB)

• 12-bit page offset (4kB pages)

• 20-bit page address
   – First 10 bits index the top-level page table
   – Second 10 bits index the 2nd-level page table
   – 10 bits == 1024 entries * 4 bytes == 4kB == 1 page

• Need three memory accesses to read a memory
  location
Why use multi-level page tables?
• Split one large page table into many page-sized
  chunks
   – Typically 4 or 8 MB for a 32-bit address space
Why use multi-level page tables?
• Split one large page table into many page-sized
  chunks
   – Typically 4 or 8 MB for a 32-bit address space


• Advantage: less memory must be reserved for the
  page tables
   – Can swap out unused or not recently used tables
Why use multi-level page tables?
• Split one large page table into many page-sized
  chunks
   – Typically 4 or 8 MB for a 32-bit address space


• Advantage: less memory must be reserved for the
  page tables
   – Can swap out unused or not recently used tables


• Disadvantage: increased access time on TLB miss
   – n+1 memory accesses for n-level page tables
              Address Conversion
• That 19bit page address can be optimized in a variety of
  ways
   – Translation Look-aside Buffer
   – Multilevel Page Table
   – Inverted Page Table
Inverted Page Table
          •“Normal” page table
              –Virtual page number == index
              –Physical page number == value
Inverted Page Table
          •“Normal” page table
              –Virtual page number == index
              –Physical page number == value

          •Inverted page table
              –Virtual page number == value
              –Physical page number == index
Inverted Page Table
          •“Normal” page table
              –Virtual page number == index
              –Physical page number == value

          •Inverted page table
              –Virtual page number == value
              –Physical page number == index

          •Need to scan the table for the right
          value to find the index
              –More efficient way: use a hash
              table
Example
      Virtual Address (1010110)

           1010    110
                  Example
      Page Table             Virtual Address (1010110)
Index Present Virtual Addr
   0     0                        1010    110
   1     1
   2     0
   3     1
   4     1
   5     0
   6     1
                  Example
      Page Table             Virtual Address (1010110)
Index Present Virtual Addr
   0     0                        1010    110
   1     1
   2     0
   3     1
   4     1     1010
   5     0
   6     1
                  Example
      Page Table             Virtual Address (1010110)
Index Present Virtual Addr
   0     0                        1010    110
   1     1
   2     0
   3     1
   4     1     1010
   5     0
   6     1
                  Example
      Page Table                 Virtual Address (1010110)
Index Present Virtual Addr
   0     0                             1010     110
   1     1
                             Index == 4 (100)
   2     0
   3     1
   4     1     1010
   5     0
   6     1
                  Example
      Page Table                 Virtual Address (1010110)
Index Present Virtual Addr
   0     0                             1010     110
   1     1
                             Index == 4 (100)
   2     0
   3     1
   4     1     1010
   5     0
   6     1
                                        100
                  Example
      Page Table                 Virtual Address (1010110)
Index Present Virtual Addr
   0     0                             1010     110
   1     1
                             Index == 4 (100)
   2     0
   3     1
   4     1     1010
   5     0
   6     1
                                        100     110
                  Example
      Page Table                 Virtual Address (1010110)
Index Present Virtual Addr
   0     0                             1010     110
   1     1
                             Index == 4 (100)
   2     0
   3     1
   4     1     1010
   5     0
   6     1
                                        100     110

                                 Physical Address (100110)
  Why use inverted page tables?
• One entry for each page of physical memory
  – vs. one per page of logical address space
  Why use inverted page tables?
• One entry for each page of physical memory
  – vs. one per page of logical address space


• Advantage: less memory needed to store the
  page table
  – If address space >> physical memory
  Why use inverted page tables?
• One entry for each page of physical memory
   – vs. one per page of logical address space


• Advantage: less memory needed to store the
  page table
   – If address space >> physical memory


• Disadvantage: increased access time on TLB miss
   – Use a hash table to limit the search to one – or at most
     a few extra memory accesses
    Summary: Address Conversion
• That 19bit page address can be optimized in a variety of
  ways
   – Translation Look-aside Buffer
       • m – memory cycle,  - hit ratio,  - TLB lookup time
       • Effective access time (Eat)
           – Eat = (m + )(2m + )(1 – ) = 2m +  – m
   – Multilevel Page Table
       • Similar to indirect pointers in I-nodes
       • Split the 19bits into multiple sections
   – Inverted Page Table
       • Much smaller, but is slower and more difficult to lookup
Summary: Page Tables
          •64kB logical address space
          •8 pages * 4kB == 32kB RAM

          •16-bit virtual address consists of:
              –Page number (4 bits)
              –Page offset (12 bits)

          •Virtual page number – table index
          •Physical frame number – value
          •Present bit – is page in memory?
               Summary: Paging
• Divide memory into pages of equal size
  – We don’t need to assign contiguous chunks

  – Internal fragmentation can only occur on the last page
    assigned to a process

  – External fragmentation cannot occur at all

  – Need to map contiguous logical memory addresses to
    disjoint pages
       Summary: Virtual Memory
• RAM is expensive (but fast), disk is cheap (but slow)

• Need to find a way to use the cheaper memory
   – Store memory that isn’t frequently used on disk
   – Swap pages between disk and memory as needed


• Treat main memory as a cache for pages on disk

				
DOCUMENT INFO
Shared By:
Categories:
Tags:
Stats:
views:1
posted:6/23/2012
language:Latin
pages:78